Timing Analyzer report for top_pci_scsn Wed Dec 14 16:16:35 2005 Version 5.0 Build 148 04/26/2005 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2. Timing Analyzer Summary 3. Timing Analyzer Settings 4. Clock Settings Summary 5. Clock Setup: 'pci_clk' 6. Clock Setup: 'CLK50M' 7. Clock Setup: 'scsn_jtg_jtgtms_reg_TCK' 8. Clock Hold: 'pci_clk' 9. Clock Hold: 'CLK50M' 10. Clock Hold: 'scsn_jtg_jtgtms_reg_TCK' 11. tsu 12. tco 13. tpd 14. th 15. Timing Analyzer Messages ---------------- ; Legal Notice ; ---------------- Copyright (C) 1991-2005 Altera Corporation Your use of Altera Corporation's design tools, logic functions and other software and tools, and its AMPP partner logic functions, and any output files any of the foregoing (including device programming or simulation files), and any associated documentation or information are expressly subject to the terms and conditions of the Altera Program License Subscription Agreement, Altera MegaCore Function License Agreement, or other applicable license agreement, including, without limitation, that your use is for the sole purpose of programming logic devices manufactured by Altera and sold by Altera or its authorized distributors. Please refer to the applicable agreement for further details. +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Timing Analyzer Summary ; +----------------------------------------+-----------+-----------------------------------+----------------------------------+-------------------------------------------------------------------------------------+------------------------------------------------------------------+-------------------------+-------------------------+--------------+ ; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ; +----------------------------------------+-----------+-----------------------------------+----------------------------------+-------------------------------------------------------------------------------------+------------------------------------------------------------------+-------------------------+-------------------------+--------------+ ; Worst-case tsu ; N/A ; None ; 8.900 ns ; digital_io[15] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[31] ; ; pci_clk ; 0 ; ; Worst-case tco ; N/A ; None ; 19.700 ns ; sg_reg_mx_q ; R7S[1] ; CLK50M ; ; 0 ; ; Worst-case tpd ; N/A ; None ; 7.900 ns ; CLK50M ; LVDS_out[0] ; ; ; 0 ; ; Worst-case th ; N/A ; None ; -2.200 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LXFR_r[2] ; ; pci_clk ; 0 ; ; Clock Setup: 'CLK50M' ; -0.567 ns ; 120.00 MHz ( period = 8.333 ns ) ; 112.36 MHz ( period = 8.900 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 11 ; ; Clock Setup: 'pci_clk' ; 9.500 ns ; 40.00 MHz ( period = 25.000 ns ) ; 64.52 MHz ( period = 15.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data_out_3 ; pci_clk ; pci_clk ; 0 ; ; Clock Setup: 'scsn_jtg_jtgtms_reg_TCK' ; 44.500 ns ; 10.00 MHz ( period = 100.000 ns ) ; 90.91 MHz ( period = 11.000 ns ) ; scsn_jtg_jtgsm_reg_PresentState_3 ; scsn_jtg_reg_TDI ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0 ; ; Clock Hold: 'scsn_jtg_jtgtms_reg_TCK' ; -1.300 ns ; 10.00 MHz ( period = 100.000 ns ) ; N/A ; scsn_jtg_jtgrcv_reg_seribf_t_25 ; scsn_jtg_jtgrcv_reg_seribf_t_26 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 4 ; ; Clock Hold: 'pci_clk' ; 0.600 ns ; 40.00 MHz ( period = 25.000 ns ) ; N/A ; scsn_jtg_jtgsnd_reg_ser_i_2 ; scsn_jtg_jtgsnd_reg_ser_i_3 ; pci_clk ; pci_clk ; 0 ; ; Clock Hold: 'CLK50M' ; 0.600 ns ; 120.00 MHz ( period = 8.333 ns ) ; N/A ; sg_reg_mx_q ; sg_reg_mx_q ; CLK50M ; CLK50M ; 0 ; ; Total number of failed paths ; ; ; ; ; ; ; ; 15 ; +----------------------------------------+-----------+-----------------------------------+----------------------------------+-------------------------------------------------------------------------------------+------------------------------------------------------------------+-------------------------+-------------------------+--------------+ +---------------------------------------------------------------------------------------------------------------------------+ ; Timing Analyzer Settings ; +-------------------------------------------------------+--------------------+------+-------------------------+-------------+ ; Option ; Setting ; From ; To ; Entity Name ; +-------------------------------------------------------+--------------------+------+-------------------------+-------------+ ; Device Name ; EP1K100QC208-1 ; ; ; ; ; Timing Models ; Final ; ; ; ; ; Number of source nodes to report per destination node ; 10 ; ; ; ; ; Number of destination nodes to report ; 10 ; ; ; ; ; Number of paths to report ; 200 ; ; ; ; ; Report Minimum Timing Checks ; Off ; ; ; ; ; Use Fast Timing Models ; Off ; ; ; ; ; Report IO Paths Separately ; Off ; ; ; ; ; Default hold multicycle ; Same as Multicycle ; ; ; ; ; Cut paths between unrelated clock domains ; On ; ; ; ; ; Cut off read during write signal paths ; On ; ; ; ; ; Cut off feedback from I/O pins ; On ; ; ; ; ; Report Combined Fast/Slow Timing ; Off ; ; ; ; ; Ignore Clock Settings ; Off ; ; ; ; ; Analyze latches as synchronous elements ; Off ; ; ; ; ; Enable Recovery/Removal analysis ; Off ; ; ; ; ; Enable Clock Latency ; Off ; ; ; ; ; Clock Settings ; clk scsn ; ; CLK50M ; ; ; Clock Settings ; clk pci ; ; pci_clk ; ; ; Clock Settings ; tck ; ; scsn_jtg_jtgtms_reg_TCK ; ; +-------------------------------------------------------+--------------------+------+-------------------------+-------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Clock Settings Summary ; +-------------------------+--------------------+---------------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+ ; Clock Node Name ; Clock Setting Name ; Type ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ; +-------------------------+--------------------+---------------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+ ; pci_clk ; clk_pci ; User Pin ; 40.0 MHz ; 0.000 ns ; 0.000 ns ; NONE ; N/A ; N/A ; N/A ; ; ; CLK50M ; clk_scsn ; User Pin ; 120.0 MHz ; 0.000 ns ; 0.000 ns ; NONE ; N/A ; N/A ; N/A ; ; ; scsn_jtg_jtgtms_reg_TCK ; tck ; Internal Node ; 10.0 MHz ; 0.000 ns ; 0.000 ns ; NONE ; N/A ; N/A ; N/A ; ; +-------------------------+--------------------+---------------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Clock Setup: 'pci_clk' ; +-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------------+----------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+ ; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ; +-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------------+----------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+ ; 9.500 ns ; 64.52 MHz ( period = 15.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data_out_3 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 14.500 ns ; ; 10.000 ns ; 66.67 MHz ( period = 15.000 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 14.000 ns ; ; 10.200 ns ; 67.57 MHz ( period = 14.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_scsn_reg_data_out_3 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.800 ns ; ; 10.200 ns ; 67.57 MHz ( period = 14.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_13 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.800 ns ; ; 10.200 ns ; 67.57 MHz ( period = 14.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_14 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.800 ns ; ; 10.300 ns ; 68.03 MHz ( period = 14.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.700 ns ; ; 10.400 ns ; 68.49 MHz ( period = 14.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_3 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.600 ns ; ; 10.400 ns ; 68.49 MHz ( period = 14.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[9] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.600 ns ; ; 10.400 ns ; 68.49 MHz ( period = 14.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[10] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.600 ns ; ; 10.400 ns ; 68.49 MHz ( period = 14.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[11] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.600 ns ; ; 10.500 ns ; 68.97 MHz ( period = 14.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[10] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.500 ns ; ; 10.500 ns ; 68.97 MHz ( period = 14.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[11] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.500 ns ; ; 10.500 ns ; 68.97 MHz ( period = 14.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data_out_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.500 ns ; ; 10.500 ns ; 68.97 MHz ( period = 14.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_12 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.500 ns ; ; 10.500 ns ; 68.97 MHz ( period = 14.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[12] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.500 ns ; ; 10.600 ns ; 69.44 MHz ( period = 14.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[9] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.400 ns ; ; 10.600 ns ; 69.44 MHz ( period = 14.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[12] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.400 ns ; ; 10.600 ns ; 69.44 MHz ( period = 14.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_scsn_reg_data_out_3 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.400 ns ; ; 10.600 ns ; 69.44 MHz ( period = 14.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[13] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.400 ns ; ; 10.700 ns ; 69.93 MHz ( period = 14.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[13] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.300 ns ; ; 10.700 ns ; 69.93 MHz ( period = 14.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_scsn_reg_data_out_3 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.300 ns ; ; 10.800 ns ; 70.42 MHz ( period = 14.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_16 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.200 ns ; ; 10.800 ns ; 70.42 MHz ( period = 14.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_13 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.200 ns ; ; 10.800 ns ; 70.42 MHz ( period = 14.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_14 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.200 ns ; ; 10.800 ns ; 70.42 MHz ( period = 14.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.200 ns ; ; 10.800 ns ; 70.42 MHz ( period = 14.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_1 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.200 ns ; ; 10.900 ns ; 70.92 MHz ( period = 14.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_22 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.100 ns ; ; 10.900 ns ; 70.92 MHz ( period = 14.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_26 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.100 ns ; ; 10.900 ns ; 70.92 MHz ( period = 14.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_6 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.100 ns ; ; 10.900 ns ; 70.92 MHz ( period = 14.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.100 ns ; ; 11.000 ns ; 71.43 MHz ( period = 14.000 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_29 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.000 ns ; ; 11.000 ns ; 71.43 MHz ( period = 14.000 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 13.000 ns ; ; 11.100 ns ; 71.94 MHz ( period = 13.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_24 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.900 ns ; ; 11.100 ns ; 71.94 MHz ( period = 13.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_scsn_reg_data_out_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.900 ns ; ; 11.100 ns ; 71.94 MHz ( period = 13.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_12 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.900 ns ; ; 11.100 ns ; 71.94 MHz ( period = 13.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data0_1s_14 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.900 ns ; ; 11.200 ns ; 72.46 MHz ( period = 13.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data_out_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.800 ns ; ; 11.200 ns ; 72.46 MHz ( period = 13.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[5] ; scsn_scsn_reg_data_out_3 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.800 ns ; ; 11.200 ns ; 72.46 MHz ( period = 13.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[7] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.800 ns ; ; 11.300 ns ; 72.99 MHz ( period = 13.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[7] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.700 ns ; ; 11.300 ns ; 72.99 MHz ( period = 13.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_25 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.700 ns ; ; 11.300 ns ; 72.99 MHz ( period = 13.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_7 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.700 ns ; ; 11.300 ns ; 72.99 MHz ( period = 13.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_13 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.700 ns ; ; 11.300 ns ; 72.99 MHz ( period = 13.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_14 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.700 ns ; ; 11.400 ns ; 73.53 MHz ( period = 13.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_16 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.600 ns ; ; 11.400 ns ; 73.53 MHz ( period = 13.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.600 ns ; ; 11.400 ns ; 73.53 MHz ( period = 13.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[2] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.600 ns ; ; 11.400 ns ; 73.53 MHz ( period = 13.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_3 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.600 ns ; ; 11.400 ns ; 73.53 MHz ( period = 13.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_8 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.600 ns ; ; 11.400 ns ; 73.53 MHz ( period = 13.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.600 ns ; ; 11.400 ns ; 73.53 MHz ( period = 13.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_13 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.600 ns ; ; 11.400 ns ; 73.53 MHz ( period = 13.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data_out_13 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.600 ns ; ; 11.400 ns ; 73.53 MHz ( period = 13.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_14 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.600 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_73 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[2] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_22 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_26 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[7] ; scsn_jtg_reg_bus_dout_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[4] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[6] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[14] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_66 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_65 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_41 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_38 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.500 ns ; 74.07 MHz ( period = 13.500 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_1 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.500 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[4] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[6] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[14] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_29 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_9 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_scsn_reg_data_out_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_scsn_reg_data_out_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_12 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_61 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_58 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_56 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_54 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_47 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_44 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r4 ; scsn_jtg_jtgsnd_reg_ser_t_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.600 ns ; 74.63 MHz ( period = 13.400 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r4 ; scsn_jtg_jtgsnd_reg_ser_t_1 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.400 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_72 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_dec_reg_digital_oe_i_11 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_dec_reg_digital_oe_i_12 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_69 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_24 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[0] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_1 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_3 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[8] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_12 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data_out_14 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_55 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_53 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_52 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_51 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_jtgsnd_reg_ser_t_17 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r3 ; scsn_jtg_jtgsnd_reg_ser_t_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.700 ns ; 75.19 MHz ( period = 13.300 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r3 ; scsn_jtg_jtgsnd_reg_ser_t_1 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.300 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[8] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[0] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_dec_reg_digital_oe_i_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_dec_reg_digital_oe_i_13 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_scsn_reg_data_out_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_6 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[7] ; scsn_jtg_reg_bus_dout_13 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[7] ; scsn_jtg_reg_bus_dout_14 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data0_1s_3 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data0_1s_4 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data0_1s_5 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r1 ; scsn_jtg_jtgsnd_reg_ser_t_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|TS_IDLE_NOT ; scsn_jtg_jtgsnd_reg_ser_t_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data0_1s_13 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r1 ; scsn_jtg_jtgsnd_reg_ser_t_1 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.800 ns ; 75.76 MHz ( period = 13.200 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|TS_IDLE_NOT ; scsn_jtg_jtgsnd_reg_ser_t_1 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.200 ns ; ; 11.900 ns ; 76.34 MHz ( period = 13.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[15] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.100 ns ; ; 11.900 ns ; 76.34 MHz ( period = 13.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_16 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.100 ns ; ; 11.900 ns ; 76.34 MHz ( period = 13.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_25 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.100 ns ; ; 11.900 ns ; 76.34 MHz ( period = 13.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.100 ns ; ; 11.900 ns ; 76.34 MHz ( period = 13.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[7] ; scsn_jtg_reg_bus_dout_3 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.100 ns ; ; 11.900 ns ; 76.34 MHz ( period = 13.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_5 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.100 ns ; ; 11.900 ns ; 76.34 MHz ( period = 13.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_6 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.100 ns ; ; 11.900 ns ; 76.34 MHz ( period = 13.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_7 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.100 ns ; ; 11.900 ns ; 76.34 MHz ( period = 13.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[7] ; scsn_jtg_reg_bus_dout_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.100 ns ; ; 11.900 ns ; 76.34 MHz ( period = 13.100 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_d1_mask ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.100 ns ; ; 12.000 ns ; 76.92 MHz ( period = 13.000 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_16 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.000 ns ; ; 12.000 ns ; 76.92 MHz ( period = 13.000 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_22 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.000 ns ; ; 12.000 ns ; 76.92 MHz ( period = 13.000 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_26 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.000 ns ; ; 12.000 ns ; 76.92 MHz ( period = 13.000 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_8 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 12.000 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_dec_reg_digital_oe_i_14 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_21 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_22 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_26 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_29 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[9] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[10] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[11] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[7] ; scsn_jtg_reg_bus_dout_12 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_scsn_reg_data_out_13 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[30] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_addr0_s_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_addr0_s_11 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_addr0_s_12 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_addr0_s_13 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_addr0_s_14 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.100 ns ; 77.52 MHz ( period = 12.900 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_addr0_s_15 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.900 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[10] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[11] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_dec_reg_digital_oe_i_15 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[30] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_jtg_reg_bus_dout_17 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_24 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_29 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_3 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_jtg_reg_bus_dout_9 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[5] ; scsn_scsn_reg_data_out_10 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[12] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_66 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_65 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_41 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_38 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.200 ns ; 78.13 MHz ( period = 12.800 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_scsn_reg_data0_1s_15 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.800 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[9] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_dec_reg_digital_oe_i_6 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1] ; scsn_dec_reg_digital_oe_i_7 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[12] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_jtg_reg_bus_dout_24 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[8] ; scsn_jtg_reg_bus_dout_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[9] ; scsn_jtg_reg_bus_dout_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; scsn_scsn_reg_data_out_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_scsn_reg_data_out_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; scsn_jtg_reg_bus_dout_6 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[8] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[9] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[9] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[9] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[8] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[10] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[9] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[10] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[8] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[11] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[9] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[11] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[13] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; scsn_scsn_reg_data_out_14 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r4 ; scsn_jtg_jtgsnd_reg_ser_t_66 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r4 ; scsn_jtg_jtgsnd_reg_ser_t_65 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_61 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_58 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_56 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_47 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_44 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r4 ; scsn_jtg_jtgsnd_reg_ser_t_41 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r4 ; scsn_jtg_jtgsnd_reg_ser_t_38 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar_hitR[0] ; scsn_jtg_jtgsnd_reg_ser_t_2 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.300 ns ; 78.74 MHz ( period = 12.700 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar_hitR[0] ; scsn_jtg_jtgsnd_reg_ser_t_1 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.700 ns ; ; 12.400 ns ; 79.37 MHz ( period = 12.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; scsn_jtg_jtgsnd_reg_ser_t_72 ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.600 ns ; ; 12.400 ns ; 79.37 MHz ( period = 12.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[8] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[10] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.600 ns ; ; 12.400 ns ; 79.37 MHz ( period = 12.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[9] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[10] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.600 ns ; ; 12.400 ns ; 79.37 MHz ( period = 12.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[8] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[11] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.600 ns ; ; 12.400 ns ; 79.37 MHz ( period = 12.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[9] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[11] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.600 ns ; ; 12.400 ns ; 79.37 MHz ( period = 12.600 ns ) ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[13] ; pci_clk ; pci_clk ; 25.000 ns ; 24.000 ns ; 11.600 ns ; ; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ; +-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------------+----------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Clock Setup: 'CLK50M' ; +-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+ ; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ; +-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+ ; -0.567 ns ; 112.36 MHz ( period = 8.900 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.900 ns ; ; -0.467 ns ; 113.64 MHz ( period = 8.800 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.800 ns ; ; -0.467 ns ; 113.64 MHz ( period = 8.800 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.800 ns ; ; -0.367 ns ; 114.94 MHz ( period = 8.700 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.700 ns ; ; -0.367 ns ; 114.94 MHz ( period = 8.700 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.700 ns ; ; -0.267 ns ; 116.28 MHz ( period = 8.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.600 ns ; ; -0.267 ns ; 116.28 MHz ( period = 8.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.600 ns ; ; -0.167 ns ; 117.65 MHz ( period = 8.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.500 ns ; ; -0.167 ns ; 117.65 MHz ( period = 8.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.500 ns ; ; -0.067 ns ; 119.05 MHz ( period = 8.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.400 ns ; ; -0.067 ns ; 119.05 MHz ( period = 8.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.400 ns ; ; 0.033 ns ; 120.48 MHz ( period = 8.300 ns ) ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_1 ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.300 ns ; ; 0.033 ns ; 120.48 MHz ( period = 8.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.300 ns ; ; 0.033 ns ; 120.48 MHz ( period = 8.300 ns ) ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.300 ns ; ; 0.033 ns ; 120.48 MHz ( period = 8.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.300 ns ; ; 0.033 ns ; 120.48 MHz ( period = 8.300 ns ) ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.300 ns ; ; 0.033 ns ; 120.48 MHz ( period = 8.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.300 ns ; ; 0.133 ns ; 121.95 MHz ( period = 8.200 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.200 ns ; ; 0.133 ns ; 121.95 MHz ( period = 8.200 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.200 ns ; ; 0.133 ns ; 121.95 MHz ( period = 8.200 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.200 ns ; ; 0.133 ns ; 121.95 MHz ( period = 8.200 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.200 ns ; ; 0.233 ns ; 123.46 MHz ( period = 8.100 ns ) ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_2 ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.100 ns ; ; 0.233 ns ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.100 ns ; ; 0.233 ns ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.100 ns ; ; 0.233 ns ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.100 ns ; ; 0.233 ns ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.100 ns ; ; 0.333 ns ; 125.00 MHz ( period = 8.000 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.000 ns ; ; 0.333 ns ; 125.00 MHz ( period = 8.000 ns ) ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_2 ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.000 ns ; ; 0.333 ns ; 125.00 MHz ( period = 8.000 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.000 ns ; ; 0.333 ns ; 125.00 MHz ( period = 8.000 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.000 ns ; ; 0.333 ns ; 125.00 MHz ( period = 8.000 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 7.000 ns ; ; 0.433 ns ; 126.58 MHz ( period = 7.900 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.900 ns ; ; 0.433 ns ; 126.58 MHz ( period = 7.900 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.900 ns ; ; 0.433 ns ; 126.58 MHz ( period = 7.900 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_reg_d0_recieved_r ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.900 ns ; ; 0.433 ns ; 126.58 MHz ( period = 7.900 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.900 ns ; ; 0.433 ns ; 126.58 MHz ( period = 7.900 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.900 ns ; ; 0.533 ns ; 128.21 MHz ( period = 7.800 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.800 ns ; ; 0.533 ns ; 128.21 MHz ( period = 7.800 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.800 ns ; ; 0.533 ns ; 128.21 MHz ( period = 7.800 ns ) ; scsn_scsn_nw_dll_ib0_reg_b_crc_12 ; scsn_scsn_reg_d0_recieved_r ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.800 ns ; ; 0.533 ns ; 128.21 MHz ( period = 7.800 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_reg_d0_recieved_r ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.800 ns ; ; 0.533 ns ; 128.21 MHz ( period = 7.800 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.800 ns ; ; 0.633 ns ; 129.87 MHz ( period = 7.700 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.700 ns ; ; 0.633 ns ; 129.87 MHz ( period = 7.700 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.700 ns ; ; 0.633 ns ; 129.87 MHz ( period = 7.700 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.700 ns ; ; 0.633 ns ; 129.87 MHz ( period = 7.700 ns ) ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_1 ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.700 ns ; ; 0.633 ns ; 129.87 MHz ( period = 7.700 ns ) ; scsn_scsn_nw_dll_ib0_reg_b_crc_13 ; scsn_scsn_reg_d0_recieved_r ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.700 ns ; ; 0.633 ns ; 129.87 MHz ( period = 7.700 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_reg_d0_recieved_r ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.700 ns ; ; 0.633 ns ; 129.87 MHz ( period = 7.700 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.700 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; scsn_scsn_nw_dll_st0_h1_reg_data_out_0 ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; scsn_scsn_nw_dll_st0_h1_reg_data_out_0 ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; scsn_scsn_nw_dll_st0_h1_reg_data_out_0 ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; scsn_scsn_nw_dll_bt0_timer_in_reg_state_1 ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; scsn_scsn_nw_dll_bt1_timer_in_reg_state_0 ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; scsn_scsn_nw_dll_bt1_timer_in_reg_state_1 ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_56 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_55 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_54 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_53 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; scsn_scsn_nw_dll_ib0_reg_b_crc_14 ; scsn_scsn_reg_d0_recieved_r ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; scsn_scsn_nw_dll_ib0_reg_b_crc_8 ; scsn_scsn_reg_d0_recieved_r ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; scsn_scsn_reg_d0_recieved_r ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_65 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_64 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.733 ns ; 131.58 MHz ( period = 7.600 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.600 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; scsn_scsn_nw_dll_st1_h1_reg_data_out_0 ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; scsn_scsn_nw_dll_st1_h1_reg_data_out_0 ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; scsn_scsn_nw_dll_st1_h1_reg_data_out_0 ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_49 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_48 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_3 ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_3 ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_59 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_58 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_57 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_56 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_55 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_54 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_53 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; scsn_scsn_nw_dll_ib0_reg_b_crc_15 ; scsn_scsn_reg_d0_recieved_r ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; scsn_scsn_nw_dll_ib0_reg_b_crc_9 ; scsn_scsn_reg_d0_recieved_r ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_52 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_51 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_67 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_47 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_46 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_65 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_45 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_38 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_64 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.833 ns ; 133.33 MHz ( period = 7.500 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.500 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; scsn_scsn_nw_dll_st0_h1_reg_data_out_0 ; scsn_scsn_nw_dll_st0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; scsn_scsn_nw_dll_st1_h1_reg_data_out_2 ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; scsn_scsn_nw_dll_st1_h1_reg_data_out_2 ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; scsn_scsn_nw_dll_st1_h1_reg_data_out_2 ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_49 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_48 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_27 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; scsn_scsn_nw_dll_bt0_timer_in_reg_state_0 ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_2 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_26 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_25 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_24 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_41 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_40 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_60 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_59 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_58 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_57 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_ib0_reg_b_data_56 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_ib0_reg_b_data_55 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_ib0_reg_b_data_54 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_ib0_reg_b_data_53 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_16 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_15 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; scsn_scsn_reg_d0_recieved_r ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_52 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_51 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_67 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_47 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_14 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_31 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_30 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_50 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_66 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_46 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_13 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_29 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_ib0_reg_b_data_65 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_45 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_12 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_28 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_44 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_43 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_42 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_23 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_39 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_22 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib1_reg_b_data_6 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_38 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_21 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_37 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_20 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_19 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_18 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_17 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_61 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_ib0_reg_b_data_64 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_63 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_62 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 0.933 ns ; 135.14 MHz ( period = 7.400 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ob0_reg_ob_data_1 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.400 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; scsn_scsn_nw_dll_st1_h1_reg_data_out_1 ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; scsn_scsn_nw_dll_st1_h1_reg_data_out_1 ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; scsn_scsn_nw_dll_st1_h1_reg_data_out_1 ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_ib0_reg_b_data_49 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_ib0_reg_b_data_48 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_27 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; scsn_scsn_nw_dll_bt0_timer_in_reg_state_2 ; scsn_scsn_nw_dll_bt0_h1_reg_data_out_0 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_26 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib1_reg_b_data_11 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_25 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_24 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_41 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_40 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_8 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; scsn_scsn_nw_dll_ib0_reg_b_data_7 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_60 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_ib0_reg_b_data_59 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_ib0_reg_b_data_58 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; scsn_scsn_nw_dll_ib0_reg_b_data_57 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; scsn_scsn_nw_dll_ib0_reg_b_data_56 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; scsn_scsn_nw_dll_ib0_reg_b_data_55 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; scsn_scsn_nw_dll_ib0_reg_b_data_54 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; scsn_scsn_nw_dll_ib0_reg_b_data_53 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; 1.033 ns ; 136.99 MHz ( period = 7.300 ns ) ; lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; scsn_scsn_nw_dll_ib0_reg_b_data_16 ; CLK50M ; CLK50M ; 8.333 ns ; 7.333 ns ; 6.300 ns ; ; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ; +-----------------------------------------+-----------------------------------------------------+-------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Clock Setup: 'scsn_jtg_jtgtms_reg_TCK' ; +-----------------------------------------+-----------------------------------------------------+------------------------------------+------------------------------------+-------------------------+-------------------------+-----------------------------+---------------------------+-------------------------+ ; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ; +-----------------------------------------+-----------------------------------------------------+------------------------------------+------------------------------------+-------------------------+-------------------------+-----------------------------+---------------------------+-------------------------+ ; 44.500 ns ; 90.91 MHz ( period = 11.000 ns ) ; scsn_jtg_jtgsm_reg_PresentState_3 ; scsn_jtg_reg_TDI ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 50.000 ns ; 48.600 ns ; 4.100 ns ; ; 45.100 ns ; 102.04 MHz ( period = 9.800 ns ) ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_reg_TDI ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 50.000 ns ; 48.600 ns ; 3.500 ns ; ; 45.200 ns ; 104.17 MHz ( period = 9.600 ns ) ; scsn_jtg_jtgsm_reg_PresentState_10 ; scsn_jtg_reg_TDI ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 50.000 ns ; 48.600 ns ; 3.400 ns ; ; 45.500 ns ; 111.11 MHz ( period = 9.000 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_reg_TDI ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 50.000 ns ; 48.800 ns ; 3.300 ns ; ; 92.900 ns ; 140.85 MHz ( period = 7.100 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_40 ; scsn_jtg_jtgrcv_reg_seribf_t_41 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 95.500 ns ; 2.600 ns ; ; 93.100 ns ; 144.93 MHz ( period = 6.900 ns ) ; scsn_jtg_jtgsm_reg_PresentState_3 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 5.800 ns ; ; 93.300 ns ; 149.25 MHz ( period = 6.700 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_31 ; scsn_jtg_jtgrcv_reg_seribf_t_32 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 95.800 ns ; 2.500 ns ; ; 93.400 ns ; 151.52 MHz ( period = 6.600 ns ) ; scsn_jtg_jtgsm_reg_PresentState_15 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 5.400 ns ; ; 93.600 ns ; 156.25 MHz ( period = 6.400 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_24 ; scsn_jtg_jtgrcv_reg_seribf_t_25 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 95.700 ns ; 2.100 ns ; ; 93.600 ns ; 156.25 MHz ( period = 6.400 ns ) ; scsn_jtg_jtgsm_reg_PresentState_15 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 5.300 ns ; ; 94.000 ns ; 166.67 MHz ( period = 6.000 ns ) ; scsn_jtg_jtgsm_reg_PresentState_5 ; scsn_jtg_jtgsm_reg_state_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 5.100 ns ; ; 94.000 ns ; 166.67 MHz ( period = 6.000 ns ) ; scsn_jtg_jtgsm_reg_PresentState_8 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 5.000 ns ; ; 94.100 ns ; 169.49 MHz ( period = 5.900 ns ) ; scsn_jtg_jtgsm_reg_PresentState_7 ; scsn_jtg_jtgsm_reg_state_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 5.000 ns ; ; 94.100 ns ; 169.49 MHz ( period = 5.900 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 5.000 ns ; ; 94.200 ns ; 172.41 MHz ( period = 5.800 ns ) ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 4.600 ns ; ; 94.200 ns ; 172.41 MHz ( period = 5.800 ns ) ; scsn_jtg_jtgsm_reg_PresentState_8 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 4.900 ns ; ; 94.300 ns ; 175.44 MHz ( period = 5.700 ns ) ; scsn_jtg_jtgsm_reg_PresentState_10 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 4.500 ns ; ; 94.500 ns ; 181.82 MHz ( period = 5.500 ns ) ; scsn_jtg_jtgsm_reg_PresentState_0 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.200 ns ; 4.700 ns ; ; 94.600 ns ; 185.19 MHz ( period = 5.400 ns ) ; scsn_jtg_jtgsm_reg_PresentState_15 ; scsn_jtg_jtgsm_reg_state_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 4.300 ns ; ; 94.600 ns ; 185.19 MHz ( period = 5.400 ns ) ; scsn_jtg_jtgsm_reg_PresentState_1 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.200 ns ; 4.600 ns ; ; 94.700 ns ; 188.68 MHz ( period = 5.300 ns ) ; scsn_jtg_jtgsm_reg_PresentState_0 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.300 ns ; 4.600 ns ; ; 94.800 ns ; 192.31 MHz ( period = 5.200 ns ) ; scsn_jtg_jtgsm_reg_PresentState_3 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 4.000 ns ; ; 94.800 ns ; 192.31 MHz ( period = 5.200 ns ) ; scsn_jtg_jtgsm_reg_PresentState_1 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.300 ns ; 4.500 ns ; ; 94.900 ns ; 196.08 MHz ( period = 5.100 ns ) ; scsn_jtg_jtgsm_reg_PresentState_13 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 3.900 ns ; ; 95.100 ns ; 204.08 MHz ( period = 4.900 ns ) ; scsn_jtg_jtgsm_reg_PresentState_15 ; scsn_jtg_jtgsm_reg_state_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 3.800 ns ; ; 95.200 ns ; 208.33 MHz ( period = 4.800 ns ) ; scsn_jtg_jtgsm_reg_PresentState_8 ; scsn_jtg_jtgsm_reg_state_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 3.900 ns ; ; 95.300 ns ; 212.77 MHz ( period = 4.700 ns ) ; scsn_jtg_jtgsm_reg_PresentState_13 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 3.600 ns ; ; 95.700 ns ; 232.56 MHz ( period = 4.300 ns ) ; scsn_jtg_jtgsm_reg_PresentState_8 ; scsn_jtg_jtgsm_reg_state_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 3.400 ns ; ; 95.700 ns ; 232.56 MHz ( period = 4.300 ns ) ; scsn_jtg_jtgsm_reg_PresentState_0 ; scsn_jtg_jtgsm_reg_state_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.300 ns ; 3.600 ns ; ; 95.800 ns ; 238.10 MHz ( period = 4.200 ns ) ; scsn_jtg_jtgsm_reg_PresentState_1 ; scsn_jtg_jtgsm_reg_state_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.300 ns ; 3.500 ns ; ; 95.800 ns ; 238.10 MHz ( period = 4.200 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 3.200 ns ; ; 95.900 ns ; 243.90 MHz ( period = 4.100 ns ) ; scsn_jtg_jtgsm_reg_PresentState_9 ; scsn_jtg_jtgsm_reg_state_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.200 ns ; 3.300 ns ; ; 95.900 ns ; 243.90 MHz ( period = 4.100 ns ) ; scsn_jtg_jtgsm_reg_PresentState_12 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 3.000 ns ; ; 96.000 ns ; 250.00 MHz ( period = 4.000 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_53 ; scsn_jtg_jtgrcv_reg_seribf_t_54 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 97.900 ns ; 1.900 ns ; ; 96.000 ns ; 250.00 MHz ( period = 4.000 ns ) ; scsn_jtg_jtgsm_reg_PresentState_9 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.200 ns ; 3.200 ns ; ; 96.100 ns ; 256.41 MHz ( period = 3.900 ns ) ; scsn_jtg_jtgsm_reg_PresentState_15 ; scsn_jtg_jtgsm_reg_PresentState_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.600 ns ; 2.500 ns ; ; 96.100 ns ; 256.41 MHz ( period = 3.900 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_63 ; scsn_jtg_jtgrcv_reg_seribf_t_64 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 97.800 ns ; 1.700 ns ; ; 96.200 ns ; 263.16 MHz ( period = 3.800 ns ) ; scsn_jtg_jtgsm_reg_PresentState_0 ; scsn_jtg_jtgsm_reg_state_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.300 ns ; 3.100 ns ; ; 96.200 ns ; 263.16 MHz ( period = 3.800 ns ) ; scsn_jtg_jtgsm_reg_PresentState_5 ; scsn_jtg_jtgsm_reg_state_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 2.900 ns ; ; 96.300 ns ; 270.27 MHz ( period = 3.700 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_16 ; scsn_jtg_jtgrcv_reg_seribf_t_17 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 97.900 ns ; 1.600 ns ; ; 96.300 ns ; 270.27 MHz ( period = 3.700 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_18 ; scsn_jtg_jtgrcv_reg_seribf_t_19 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 97.800 ns ; 1.500 ns ; ; 96.300 ns ; 270.27 MHz ( period = 3.700 ns ) ; scsn_jtg_jtgsm_reg_PresentState_1 ; scsn_jtg_jtgsm_reg_state_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.300 ns ; 3.000 ns ; ; 96.300 ns ; 270.27 MHz ( period = 3.700 ns ) ; scsn_jtg_jtgsm_reg_PresentState_7 ; scsn_jtg_jtgsm_reg_state_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 2.800 ns ; ; 96.300 ns ; 270.27 MHz ( period = 3.700 ns ) ; scsn_jtg_jtgsm_reg_PresentState_5 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 2.800 ns ; ; 96.400 ns ; 277.78 MHz ( period = 3.600 ns ) ; scsn_jtg_jtgsm_reg_PresentState_3 ; scsn_jtg_jtgsm_reg_state_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 2.500 ns ; ; 96.400 ns ; 277.78 MHz ( period = 3.600 ns ) ; scsn_jtg_jtgsm_reg_PresentState_10 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 2.500 ns ; ; 96.400 ns ; 277.78 MHz ( period = 3.600 ns ) ; scsn_jtg_jtgsm_reg_PresentState_7 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 2.700 ns ; ; 96.500 ns ; 285.71 MHz ( period = 3.500 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_23 ; scsn_jtg_jtgrcv_reg_seribf_t_24 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.400 ns ; 1.900 ns ; ; 96.500 ns ; 285.71 MHz ( period = 3.500 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_60 ; scsn_jtg_jtgrcv_reg_seribf_t_61 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.400 ns ; 1.900 ns ; ; 96.500 ns ; 285.71 MHz ( period = 3.500 ns ) ; scsn_jtg_jtgsm_reg_PresentState_14 ; scsn_jtg_jtgsm_reg_state_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 2.400 ns ; ; 96.500 ns ; 285.71 MHz ( period = 3.500 ns ) ; scsn_jtg_jtgsm_reg_PresentState_2 ; scsn_jtg_jtgsm_reg_state_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.300 ns ; 2.800 ns ; ; 96.600 ns ; 294.12 MHz ( period = 3.400 ns ) ; scsn_jtg_jtgsm_reg_PresentState_10 ; scsn_jtg_jtgsm_reg_state_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 2.300 ns ; ; 96.600 ns ; 294.12 MHz ( period = 3.400 ns ) ; scsn_jtg_jtgsm_reg_PresentState_2 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.300 ns ; 2.700 ns ; ; 96.600 ns ; 294.12 MHz ( period = 3.400 ns ) ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_jtgsm_reg_state_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 2.300 ns ; ; 96.700 ns ; 303.03 MHz ( period = 3.300 ns ) ; scsn_jtg_jtgsm_reg_PresentState_8 ; scsn_jtg_jtgsm_reg_PresentState_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 2.100 ns ; ; 96.700 ns ; 303.03 MHz ( period = 3.300 ns ) ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_jtgsm_reg_state_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 2.200 ns ; ; 96.700 ns ; 303.03 MHz ( period = 3.300 ns ) ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_jtgrcv_reg_seribf_i_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 2.100 ns ; ; 96.800 ns ; 312.50 MHz ( period = 3.200 ns ) ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_jtgrcv_reg_seribf_i_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 2.000 ns ; ; 96.900 ns ; 322.58 MHz ( period = 3.100 ns ) ; scsn_jtg_jtgsm_reg_PresentState_3 ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.900 ns ; ; 96.900 ns ; 322.58 MHz ( period = 3.100 ns ) ; scsn_jtg_jtgsm_reg_PresentState_3 ; scsn_jtg_jtgsm_reg_PresentState_5 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.900 ns ; ; 96.900 ns ; 322.58 MHz ( period = 3.100 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_68 ; scsn_jtg_jtgrcv_reg_seribf_t_69 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.600 ns ; 1.700 ns ; ; 97.000 ns ; 333.33 MHz ( period = 3.000 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_4 ; scsn_jtg_jtgrcv_reg_seribf_t_5 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.700 ns ; 1.700 ns ; ; 97.100 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_15 ; scsn_jtg_jtgsm_reg_PresentState_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.600 ns ; 1.500 ns ; ; 97.200 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_0 ; scsn_jtg_jtgsm_reg_PresentState_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 1.800 ns ; ; 97.200 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_9 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 1.900 ns ; ; 97.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_1 ; scsn_jtg_jtgsm_reg_PresentState_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 1.700 ns ; ; 97.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_25 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.500 ns ; 1.200 ns ; ; 97.400 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_27 ; scsn_jtg_jtgrcv_reg_seribf_t_28 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.500 ns ; ; 97.400 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_11 ; scsn_jtg_jtgrcv_reg_seribf_t_12 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 1.700 ns ; ; 97.400 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_29 ; scsn_jtg_jtgrcv_reg_seribf_t_30 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.500 ns ; ; 97.400 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_10 ; scsn_jtg_jtgrcv_reg_seribf_t_11 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.500 ns ; ; 97.400 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_13 ; scsn_jtg_jtgrcv_reg_seribf_t_14 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 1.700 ns ; ; 97.400 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_47 ; scsn_jtg_jtgrcv_reg_seribf_t_48 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 1.700 ns ; ; 97.400 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_57 ; scsn_jtg_jtgrcv_reg_seribf_t_58 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 1.600 ns ; ; 97.400 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_12 ; scsn_jtg_jtgrcv_reg_seribf_t_13 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 1.600 ns ; ; 97.400 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgsm_reg_state_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 1.700 ns ; ; 97.500 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_30 ; scsn_jtg_jtgrcv_reg_seribf_t_31 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.200 ns ; 1.700 ns ; ; 97.500 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.300 ns ; ; 97.500 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_56 ; scsn_jtg_jtgrcv_reg_seribf_t_57 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 1.600 ns ; ; 97.500 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_6 ; scsn_jtg_jtgrcv_reg_seribf_t_7 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 1.500 ns ; ; 97.500 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_67 ; scsn_jtg_jtgrcv_reg_seribf_t_68 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.700 ns ; 1.200 ns ; ; 97.500 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_2 ; scsn_jtg_jtgsm_reg_state_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.300 ns ; 1.800 ns ; ; 97.500 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_41 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.300 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_32 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.300 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_49 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.300 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_48 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.300 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.200 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_9 ; scsn_jtg_jtgsm_reg_state_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.200 ns ; 1.600 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_6 ; scsn_jtg_jtgsm_reg_state_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 1.500 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_38 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.200 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_37 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.200 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_36 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.300 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_35 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.300 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_34 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.300 ns ; ; 97.600 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_33 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.300 ns ; ; 97.700 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_8 ; scsn_jtg_jtgsm_reg_PresentState_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.100 ns ; ; 97.700 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_15 ; scsn_jtg_jtgrcv_reg_seribf_t_16 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.100 ns ; ; 97.700 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_7 ; scsn_jtg_jtgrcv_reg_seribf_t_8 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.200 ns ; ; 97.700 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_47 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.100 ns ; ; 97.700 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_46 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.100 ns ; ; 97.700 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_45 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.100 ns ; ; 97.700 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_44 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.100 ns ; ; 97.700 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_43 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.100 ns ; ; 97.700 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_42 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.800 ns ; 1.100 ns ; ; 97.700 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_5 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 1.300 ns ; ; 97.800 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_9 ; scsn_jtg_jtgsm_reg_PresentState_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.100 ns ; ; 97.800 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_7 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 1.200 ns ; ; 97.900 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_36 ; scsn_jtg_jtgrcv_reg_seribf_t_37 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 98.900 ns ; 1.000 ns ; ; 97.900 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_41 ; scsn_jtg_jtgrcv_reg_seribf_t_42 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 1.100 ns ; ; 98.100 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_2 ; scsn_jtg_jtgsm_reg_PresentState_9 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.100 ns ; 1.000 ns ; ; 98.200 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_17 ; scsn_jtg_jtgrcv_reg_seribf_t_18 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 100.100 ns ; 1.900 ns ; ; 98.200 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_62 ; scsn_jtg_jtgrcv_reg_seribf_t_63 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.300 ns ; 1.100 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_14 ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_7 ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_2 ; scsn_jtg_jtgsm_reg_PresentState_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.400 ns ; 1.100 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_1 ; scsn_jtg_jtgsm_reg_PresentState_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_9 ; scsn_jtg_jtgsm_reg_PresentState_10 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.300 ns ; 1.000 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_28 ; scsn_jtg_jtgrcv_reg_seribf_t_28 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_28 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.000 ns ; 3.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_31 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.100 ns ; 3.800 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_32 ; scsn_jtg_jtgrcv_reg_seribf_t_32 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_12 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.300 ns ; 4.000 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_16 ; scsn_jtg_jtgrcv_reg_seribf_t_16 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_16 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.200 ns ; 3.900 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_15 ; scsn_jtg_jtgrcv_reg_seribf_t_15 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_15 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.400 ns ; 4.100 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_30 ; scsn_jtg_jtgrcv_reg_seribf_t_30 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_11 ; scsn_jtg_jtgrcv_reg_seribf_t_11 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_11 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.200 ns ; 3.900 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_26 ; scsn_jtg_jtgrcv_reg_seribf_t_27 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_27 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.100 ns ; 3.800 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_28 ; scsn_jtg_jtgrcv_reg_seribf_t_29 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_29 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.000 ns ; 3.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_10 ; scsn_jtg_jtgrcv_reg_seribf_t_10 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_10 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.300 ns ; 4.000 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_14 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.400 ns ; 4.100 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_1 ; scsn_jtg_jtgrcv_reg_seribf_t_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_49 ; scsn_jtg_jtgrcv_reg_seribf_t_49 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_48 ; scsn_jtg_jtgrcv_reg_seribf_t_48 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_17 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.100 ns ; 2.800 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_26 ; scsn_jtg_jtgrcv_reg_seribf_t_26 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_26 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.100 ns ; 3.800 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_25 ; scsn_jtg_jtgrcv_reg_seribf_t_25 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_2 ; scsn_jtg_jtgrcv_reg_seribf_t_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_51 ; scsn_jtg_jtgrcv_reg_seribf_t_52 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_52 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.200 ns ; 2.900 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_18 ; scsn_jtg_jtgrcv_reg_seribf_t_18 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_18 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.200 ns ; 3.900 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_24 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.800 ns ; 3.500 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_23 ; scsn_jtg_jtgrcv_reg_seribf_t_23 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_23 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.400 ns ; 4.100 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_22 ; scsn_jtg_jtgrcv_reg_seribf_t_22 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_22 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.000 ns ; 2.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_19 ; scsn_jtg_jtgrcv_reg_seribf_t_19 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_19 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.000 ns ; 2.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_54 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.200 ns ; 2.900 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_20 ; scsn_jtg_jtgrcv_reg_seribf_t_21 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_21 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.000 ns ; 2.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_20 ; scsn_jtg_jtgrcv_reg_seribf_t_20 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_20 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.000 ns ; 2.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_55 ; scsn_jtg_jtgrcv_reg_seribf_t_56 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_55 ; scsn_jtg_jtgrcv_reg_seribf_t_55 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_58 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.400 ns ; 4.100 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_57 ; scsn_jtg_jtgrcv_reg_seribf_t_57 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_58 ; scsn_jtg_jtgrcv_reg_seribf_t_59 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_59 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.400 ns ; 4.100 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_13 ; scsn_jtg_jtgrcv_reg_seribf_t_13 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_13 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.300 ns ; 4.000 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_61 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.800 ns ; 3.500 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_60 ; scsn_jtg_jtgrcv_reg_seribf_t_60 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_60 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.400 ns ; 4.100 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_61 ; scsn_jtg_jtgrcv_reg_seribf_t_62 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_62 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.800 ns ; 3.500 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_8 ; scsn_jtg_jtgrcv_reg_seribf_t_9 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_9 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.300 ns ; 4.000 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_63 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.100 ns ; 3.800 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_8 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.300 ns ; 4.000 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_7 ; scsn_jtg_jtgrcv_reg_seribf_t_7 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_7 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.400 ns ; 4.100 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_65 ; scsn_jtg_jtgrcv_reg_seribf_t_66 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_65 ; scsn_jtg_jtgrcv_reg_seribf_t_65 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_5 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.700 ns ; 3.400 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_4 ; scsn_jtg_jtgrcv_reg_seribf_t_4 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_4 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.000 ns ; 3.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_69 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.700 ns ; 3.400 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_68 ; scsn_jtg_jtgrcv_reg_seribf_t_68 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_68 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.100 ns ; 3.800 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_72 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.400 ns ; 4.100 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_71 ; scsn_jtg_jtgrcv_reg_seribf_t_71 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_71 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.700 ns ; 3.400 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_3 ; scsn_jtg_jtgrcv_reg_seribf_t_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 102.000 ns ; 3.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_70 ; scsn_jtg_jtgrcv_reg_seribf_t_70 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_70 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.700 ns ; 3.400 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_67 ; scsn_jtg_jtgrcv_reg_seribf_t_67 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_46 ; scsn_jtg_jtgrcv_reg_seribf_t_47 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_46 ; scsn_jtg_jtgrcv_reg_seribf_t_46 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_40 ; scsn_jtg_jtgrcv_reg_seribf_t_40 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgrcv_reg_seribf_t_50 ; scsn_jtg_jtgrcv_reg_seribf_t_51 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 99.000 ns ; 0.700 ns ; ; 98.300 ns ; Restricted to 333.33 MHz ( period = 3.0 ns ) ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_51 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 100.000 ns ; 101.200 ns ; 2.900 ns ; ; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ; +-----------------------------------------+-----------------------------------------------------+------------------------------------+------------------------------------+-------------------------+-------------------------+-----------------------------+---------------------------+-------------------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Clock Hold: 'pci_clk' ; +-----------------------------------------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+ ; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ; +-----------------------------------------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+ ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_i_2 ; scsn_jtg_jtgsnd_reg_ser_i_3 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_71 ; scsn_jtg_jtgsnd_reg_ser_t_72 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_i_1 ; scsn_jtg_jtgsnd_reg_ser_i_2 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_70 ; scsn_jtg_jtgsnd_reg_ser_t_71 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_i_0 ; scsn_jtg_jtgsnd_reg_ser_i_1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|perr_oer ; pci_contr:pci|pci_mt32:pci_mt32_inst|perr_oe_r ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_69 ; scsn_jtg_jtgsnd_reg_ser_t_70 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|frame_IR ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|frame_I1R ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LW_WAIT ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LW_WAIT ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_dec_reg_tmp ; scsn_dec_reg_LT_RDY_n_pci ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar_hitR[0] ; scsn_dec_reg_tmp ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_reg_new_data0 ; scsn_scsn_reg_new_data0 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_reg_new_data1 ; scsn_scsn_reg_new_data1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_67 ; scsn_jtg_jtgsnd_reg_ser_t_68 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_WAIT ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_WAIT ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_66 ; scsn_jtg_jtgsnd_reg_ser_t_67 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|cache_line[2] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|ad_dat_out[2] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|cache_line[3] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|ad_dat_out[3] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|cache_line[7] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|ad_dat_out[7] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|lat_tmr_reg[4] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|ad_dat_out[15] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar0_reg[21] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|ad_dat_out[21] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[22] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar0_reg[22] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[23] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar0_reg[23] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[25] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar0_reg[25] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[26] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar0_reg[26] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[27] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar0_reg[27] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[28] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar0_reg[28] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[30] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar0_reg[30] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_65 ; scsn_jtg_jtgsnd_reg_ser_t_66 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|TS_ADR_CLMD ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|trg_OR_advance ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_TAR_R ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|perr_rep_setR ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_pk:parity_Chk|perr_det_setR_r3 ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|pcimt32_sr:$00219|REG ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_64 ; scsn_jtg_jtgsnd_reg_ser_t_65 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_reg_d0_mask ; scsn_scsn_reg_status_2 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_62 ; scsn_jtg_jtgsnd_reg_ser_t_63 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_reg_d1_mask ; scsn_scsn_reg_status_4 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_reg_d1_mask ; scsn_scsn_reg_status_5 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_reg_d1_mask ; scsn_scsn_reg_status_6 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_61 ; scsn_jtg_jtgsnd_reg_ser_t_62 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_60 ; scsn_jtg_jtgsnd_reg_ser_t_61 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_59 ; scsn_jtg_jtgsnd_reg_ser_t_60 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_58 ; scsn_jtg_jtgsnd_reg_ser_t_59 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_57 ; scsn_jtg_jtgsnd_reg_ser_t_58 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_56 ; scsn_jtg_jtgsnd_reg_ser_t_57 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_52 ; scsn_jtg_jtgsnd_reg_ser_t_53 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_51 ; scsn_jtg_jtgsnd_reg_ser_t_52 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_50 ; scsn_jtg_jtgsnd_reg_ser_t_51 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_48 ; scsn_jtg_jtgsnd_reg_ser_t_49 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_47 ; scsn_jtg_jtgsnd_reg_ser_t_48 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_46 ; scsn_jtg_jtgsnd_reg_ser_t_47 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_45 ; scsn_jtg_jtgsnd_reg_ser_t_46 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_44 ; scsn_jtg_jtgsnd_reg_ser_t_45 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_43 ; scsn_jtg_jtgsnd_reg_ser_t_44 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_42 ; scsn_jtg_jtgsnd_reg_ser_t_43 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_40 ; scsn_jtg_jtgsnd_reg_ser_t_41 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_39 ; scsn_jtg_jtgsnd_reg_ser_t_40 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_38 ; scsn_jtg_jtgsnd_reg_ser_t_39 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_37 ; scsn_jtg_jtgsnd_reg_ser_t_38 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_36 ; scsn_jtg_jtgsnd_reg_ser_t_37 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_35 ; scsn_jtg_jtgsnd_reg_ser_t_36 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_34 ; scsn_jtg_jtgsnd_reg_ser_t_35 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_32 ; scsn_jtg_jtgsnd_reg_ser_t_33 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_31 ; scsn_jtg_jtgsnd_reg_ser_t_32 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_30 ; scsn_jtg_jtgsnd_reg_ser_t_31 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_29 ; scsn_jtg_jtgsnd_reg_ser_t_30 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_27 ; scsn_jtg_jtgsnd_reg_ser_t_28 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_26 ; scsn_jtg_jtgsnd_reg_ser_t_27 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_25 ; scsn_jtg_jtgsnd_reg_ser_t_26 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_24 ; scsn_jtg_jtgsnd_reg_ser_t_25 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_23 ; scsn_jtg_jtgsnd_reg_ser_t_24 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_21 ; scsn_jtg_jtgsnd_reg_ser_t_22 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_20 ; scsn_jtg_jtgsnd_reg_ser_t_21 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_19 ; scsn_jtg_jtgsnd_reg_ser_t_20 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_18 ; scsn_jtg_jtgsnd_reg_ser_t_19 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_17 ; scsn_jtg_jtgsnd_reg_ser_t_18 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_16 ; scsn_jtg_jtgsnd_reg_ser_t_17 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_15 ; scsn_jtg_jtgsnd_reg_ser_t_16 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_13 ; scsn_jtg_jtgsnd_reg_ser_t_14 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_12 ; scsn_jtg_jtgsnd_reg_ser_t_13 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_11 ; scsn_jtg_jtgsnd_reg_ser_t_12 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_10 ; scsn_jtg_jtgsnd_reg_ser_t_11 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_8 ; scsn_jtg_jtgsnd_reg_ser_t_9 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_7 ; scsn_jtg_jtgsnd_reg_ser_t_8 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_6 ; scsn_jtg_jtgsnd_reg_ser_t_7 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_5 ; scsn_jtg_jtgsnd_reg_ser_t_6 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_4 ; scsn_jtg_jtgsnd_reg_ser_t_5 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_3 ; scsn_jtg_jtgsnd_reg_ser_t_4 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsnd_reg_ser_t_1 ; scsn_jtg_jtgsnd_reg_ser_t_2 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_8 ; scsn_dec_reg_rdata_conf_8 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_9 ; scsn_dec_reg_rdata_conf_9 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_10 ; scsn_dec_reg_rdata_conf_10 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_1 ; scsn_jtg_jtgtms_reg_s_reg_0 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_2 ; scsn_jtg_jtgtms_reg_s_reg_1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_1 ; scsn_dec_reg_rdata_conf_1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_5 ; scsn_dec_reg_rdata_conf_5 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_0 ; scsn_dec_reg_rdata_conf_0 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_4 ; scsn_dec_reg_rdata_conf_4 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_3 ; scsn_dec_reg_rdata_conf_3 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_7 ; scsn_dec_reg_rdata_conf_7 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_3 ; scsn_jtg_jtgtms_reg_s_reg_2 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_pre_reg_FUNC_s_2 ; scsn_pre_reg_FUNC_s_2 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_pre_reg_FUNC_s_1 ; scsn_pre_reg_FUNC_s_1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_pre_reg_FUNC_s_0 ; scsn_pre_reg_FUNC_s_0 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_2 ; scsn_dec_reg_rdata_conf_2 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_6 ; scsn_dec_reg_rdata_conf_6 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_tms_sm_0 ; scsn_jtg_jtgtms_reg_tck_ena ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[3] ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[4] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[4] ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[4] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_0 ; scsn_dec_reg_digital_oe_i_0 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_1 ; scsn_dec_reg_digital_oe_i_1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_2 ; scsn_dec_reg_digital_oe_i_2 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_3 ; scsn_dec_reg_digital_oe_i_3 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_4 ; scsn_dec_reg_digital_oe_i_4 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_5 ; scsn_dec_reg_digital_oe_i_5 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_6 ; scsn_dec_reg_digital_oe_i_6 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_7 ; scsn_dec_reg_digital_oe_i_7 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_8 ; scsn_dec_reg_digital_oe_i_8 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_9 ; scsn_dec_reg_digital_oe_i_9 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_10 ; scsn_dec_reg_digital_oe_i_10 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_11 ; scsn_dec_reg_rdata_conf_11 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_11 ; scsn_dec_reg_digital_oe_i_11 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_12 ; scsn_dec_reg_rdata_conf_12 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_12 ; scsn_dec_reg_digital_oe_i_12 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_13 ; scsn_dec_reg_rdata_conf_13 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_13 ; scsn_dec_reg_digital_oe_i_13 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_14 ; scsn_dec_reg_rdata_conf_14 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_14 ; scsn_dec_reg_digital_oe_i_14 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_15 ; scsn_dec_reg_rdata_conf_15 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_digital_oe_i_15 ; scsn_dec_reg_digital_oe_i_15 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_sr:wr_rdn_FF|REG ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_sr:wr_rdn_FF|REG ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lm_adr_ack_R ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lm_adr_ack_R ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_PARK ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_PARK ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_ENA ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|dac_cyc_strobe ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|TS_DISC ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|TS_DISC ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar_hitR[0] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|bar_hitR[0] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_5 ; scsn_jtg_jtgtms_reg_s_reg_4 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|wr_rdn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|wr_rdn ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_flag_wrote ; scsn_jtg_jtgtms_reg_flag_start ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_6 ; scsn_jtg_jtgtms_reg_s_reg_5 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_8 ; scsn_dec_reg_rdata_conf_8~1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_dec_reg_rdata_conf_9 ; scsn_dec_reg_rdata_conf_9~1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[0] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[1] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[1] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[2] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[2] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[3] ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[3] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_jtg_jtgtms_b_cnt_ix11|alt_counter_f10ke:wysi_counter|q[3] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|retry ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|retry ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr0_s_0 ; scsn_scsn_reg_mcmaddr0_s_0 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr1_s_0 ; scsn_scsn_reg_mcmaddr1_s_0 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_reg_cfr_0 ; scsn_jtg_reg_cfr_0 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_reg_cfr_1 ; scsn_jtg_reg_cfr_1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_8 ; scsn_jtg_jtgtms_reg_s_reg_7 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|cache_line[5] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|ad_dat_out[5] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|lat_tmr_reg[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|ad_dat_out[12] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_WAIT_32 ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_WAIT_32 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr0_s_1 ; scsn_scsn_reg_mcmaddr0_s_1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr1_s_1 ; scsn_scsn_reg_mcmaddr1_s_1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_9 ; scsn_jtg_jtgtms_reg_s_reg_8 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|stat_reg[8] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|stat_reg[8] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|pcimt32_sr:$00213|REG ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|pcimt32_sr:$00213|REG ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|pcimt32_sr:$00215|REG ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|pcimt32_sr:$00215|REG ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|pcimt32_sr:$00217|REG ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_c:cfg|pcimt32_sr:$00217|REG ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|perr_vldR ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_pk:parity_Chk|perr_det_setR_r1 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_ADR ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|adr_phase ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lreg_busy ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lreg_busy ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[0] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[0] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[2] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[2] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[2] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[1] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[0] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[1] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr0_s_2 ; scsn_scsn_reg_mcmaddr0_s_2 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr1_s_2 ; scsn_scsn_reg_mcmaddr1_s_2 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_10 ; scsn_jtg_jtgtms_reg_s_reg_9 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_reg_cfr_2 ; scsn_jtg_reg_cfr_2 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_reg_cfr_3 ; scsn_jtg_reg_cfr_3 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_reg_cfr_4 ; scsn_jtg_reg_cfr_4 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr0_s_3 ; scsn_scsn_reg_mcmaddr0_s_3 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr1_s_3 ; scsn_scsn_reg_mcmaddr1_s_3 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_11 ; scsn_jtg_jtgtms_reg_s_reg_10 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_reg_cfr_5 ; scsn_jtg_reg_cfr_5 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_reg_cfr_6 ; scsn_jtg_reg_cfr_6 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr0_s_4 ; scsn_scsn_reg_mcmaddr0_s_4 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr1_s_4 ; scsn_scsn_reg_mcmaddr1_s_4 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr0_s_5 ; scsn_scsn_reg_mcmaddr0_s_5 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr1_s_5 ; scsn_scsn_reg_mcmaddr1_s_5 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_13 ; scsn_jtg_jtgtms_reg_s_reg_12 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr0_s_6 ; scsn_scsn_reg_mcmaddr0_s_6 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_mcmaddr1_s_6 ; scsn_scsn_reg_mcmaddr1_s_6 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_14 ; scsn_jtg_jtgtms_reg_s_reg_13 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgtms_reg_s_reg_15 ; scsn_jtg_jtgtms_reg_s_reg_14 ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[3] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[4] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[4] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[4] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[2] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[3] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[3] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[3] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[2] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[2] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[2] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[0] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[1] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:latcntr|alt_counter_f10ke:wysi_counter|q[1] ; pci_clk ; pci_clk ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; +-----------------------------------------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Clock Hold: 'CLK50M' ; +-----------------------------------------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+ ; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ; +-----------------------------------------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+ ; 0.600 ns ; sg_reg_mx_q ; sg_reg_mx_q ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_st0_stuff_in_reg_data ; scsn_scsn_nw_dll_st0_stuff_in_reg_data_tx ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_st1_stuff_in_reg_data ; scsn_scsn_nw_dll_st1_stuff_in_reg_data_tx ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_pre_reg_send_sm ; scsn_pre_reg_send_sm ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_pre_counter_ix9 ; scsn_pre_counter_ix9 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_st0_h1_reg_data_out_2 ; scsn_scsn_nw_dll_st0_sleeptimer_reg_state_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_reg_current_state0_1 ; scsn_scsn_reg_current_state0_0 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_reg_current_state0_1 ; scsn_scsn_reg_current_state0_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_st1_h1_reg_data_out_2 ; scsn_scsn_nw_dll_st1_sleeptimer_reg_state_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_reg_current_state1_1 ; scsn_scsn_reg_current_state1_0 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_reg_current_state1_1 ; scsn_scsn_reg_current_state1_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_66 ; scsn_scsn_nw_dll_ob0_reg_ob_data_67 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_66 ; scsn_scsn_nw_dll_ob1_reg_ob_data_67 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_crc_13 ; scsn_scsn_nw_dll_ob1_reg_ob_crc_14 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_65 ; scsn_scsn_nw_dll_ob0_reg_ob_data_66 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_pre_reg_shiftd_3 ; scsn_pre_reg_shiftd_3 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_64 ; scsn_scsn_nw_dll_ob0_reg_ob_data_65 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_crc_12 ; scsn_scsn_nw_dll_ob0_reg_ob_crc_13 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_64 ; scsn_scsn_nw_dll_ob1_reg_ob_data_65 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_1 ; scsn_scsn_nw_dll_bt1_h1_reg_data_out_3 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_63 ; scsn_scsn_nw_dll_ob0_reg_ob_data_64 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_crc_11 ; scsn_scsn_nw_dll_ob0_reg_ob_crc_12 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_crc_11 ; scsn_scsn_nw_dll_ob1_reg_ob_crc_12 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_data_61 ; scsn_scsn_reg_d0_revieved_data61_r ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_data_32 ; scsn_scsn_nw_dll_ib0_reg_b_data_33 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_data_32 ; scsn_scsn_nw_dll_ib1_reg_b_data_33 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_pl_reg_SAMPLES1_0 ; scsn_scsn_nw_pl_reg_d1_to_dll ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_62 ; scsn_scsn_nw_dll_ob0_reg_ob_data_63 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_crc_10 ; scsn_scsn_nw_dll_ob0_reg_ob_crc_11 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_62 ; scsn_scsn_nw_dll_ob1_reg_ob_data_63 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; reg_d_in_1 ; scsn_scsn_nw_pl_reg_SAMPLES1_0 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_pl_reg_SAMPLES1_0 ; scsn_scsn_nw_pl_reg_SAMPLES1_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_61 ; scsn_scsn_nw_dll_ob0_reg_ob_data_62 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_crc_9 ; scsn_scsn_nw_dll_ob0_reg_ob_crc_10 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_61 ; scsn_scsn_nw_dll_ob1_reg_ob_data_62 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_crc_9 ; scsn_scsn_nw_dll_ob1_reg_ob_crc_10 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_pl_reg_SAMPLES0_0 ; scsn_scsn_nw_pl_reg_d0_to_dll ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_crc_8 ; scsn_scsn_nw_dll_ob0_reg_ob_crc_9 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_crc_7 ; scsn_scsn_nw_dll_ib0_reg_b_crc_8 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_crc_10 ; scsn_scsn_nw_dll_ib0_reg_b_crc_11 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_crc_0 ; scsn_scsn_nw_dll_ib0_reg_b_crc_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_crc_3 ; scsn_scsn_nw_dll_ib0_reg_b_crc_4 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_crc_4 ; scsn_scsn_nw_dll_ib0_reg_b_crc_5 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_crc_5 ; scsn_scsn_nw_dll_ib0_reg_b_crc_6 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_crc_6 ; scsn_scsn_nw_dll_ib0_reg_b_crc_7 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; reg_d_in_0 ; scsn_scsn_nw_pl_reg_SAMPLES0_0 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_pl_reg_SAMPLES0_0 ; scsn_scsn_nw_pl_reg_SAMPLES0_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_crc_15 ; scsn_scsn_nw_dll_ib0_reg_b_crc_15 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_crc_13 ; scsn_scsn_nw_dll_ib0_reg_b_crc_14 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_7 ; scsn_scsn_nw_dll_ib1_reg_b_crc_8 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_8 ; scsn_scsn_nw_dll_ib1_reg_b_crc_9 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_10 ; scsn_scsn_nw_dll_ib1_reg_b_crc_11 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_0 ; scsn_scsn_nw_dll_ib1_reg_b_crc_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_2 ; scsn_scsn_nw_dll_ib1_reg_b_crc_3 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_4 ; scsn_scsn_nw_dll_ib1_reg_b_crc_5 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_5 ; scsn_scsn_nw_dll_ib1_reg_b_crc_6 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_6 ; scsn_scsn_nw_dll_ib1_reg_b_crc_7 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_crc_12 ; scsn_scsn_nw_dll_ib0_reg_b_crc_13 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib0_reg_b_crc_11 ; scsn_scsn_nw_dll_ib0_reg_b_crc_12 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_15 ; scsn_scsn_nw_dll_ib1_reg_b_crc_15 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_13 ; scsn_scsn_nw_dll_ib1_reg_b_crc_14 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_12 ; scsn_scsn_nw_dll_ib1_reg_b_crc_13 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ib1_reg_b_crc_11 ; scsn_scsn_nw_dll_ib1_reg_b_crc_12 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_51 ; scsn_scsn_nw_dll_ob0_reg_ob_data_52 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_51 ; scsn_scsn_nw_dll_ob1_reg_ob_data_52 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_50 ; scsn_scsn_nw_dll_ob0_reg_ob_data_51 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_49 ; scsn_scsn_nw_dll_ob0_reg_ob_data_50 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_49 ; scsn_scsn_nw_dll_ob1_reg_ob_data_50 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_48 ; scsn_scsn_nw_dll_ob0_reg_ob_data_49 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_48 ; scsn_scsn_nw_dll_ob1_reg_ob_data_49 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_47 ; scsn_scsn_nw_dll_ob0_reg_ob_data_48 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_47 ; scsn_scsn_nw_dll_ob1_reg_ob_data_48 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_46 ; scsn_scsn_nw_dll_ob1_reg_ob_data_47 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_45 ; scsn_scsn_nw_dll_ob0_reg_ob_data_46 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_44 ; scsn_scsn_nw_dll_ob1_reg_ob_data_45 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_43 ; scsn_scsn_nw_dll_ob0_reg_ob_data_44 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_43 ; scsn_scsn_nw_dll_ob1_reg_ob_data_44 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_42 ; scsn_scsn_nw_dll_ob0_reg_ob_data_43 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_41 ; scsn_scsn_nw_dll_ob1_reg_ob_data_42 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_40 ; scsn_scsn_nw_dll_ob0_reg_ob_data_41 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_40 ; scsn_scsn_nw_dll_ob1_reg_ob_data_41 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_39 ; scsn_scsn_nw_dll_ob0_reg_ob_data_40 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_38 ; scsn_scsn_nw_dll_ob0_reg_ob_data_39 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_37 ; scsn_scsn_nw_dll_ob0_reg_ob_data_38 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_35 ; scsn_scsn_nw_dll_ob0_reg_ob_data_36 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_35 ; scsn_scsn_nw_dll_ob1_reg_ob_data_36 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_34 ; scsn_scsn_nw_dll_ob0_reg_ob_data_35 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_34 ; scsn_scsn_nw_dll_ob1_reg_ob_data_35 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_33 ; scsn_scsn_nw_dll_ob0_reg_ob_data_34 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_33 ; scsn_scsn_nw_dll_ob1_reg_ob_data_34 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_30 ; scsn_scsn_nw_dll_ob0_reg_ob_data_31 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_30 ; scsn_scsn_nw_dll_ob1_reg_ob_data_31 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_28 ; scsn_scsn_nw_dll_ob0_reg_ob_data_29 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_28 ; scsn_scsn_nw_dll_ob1_reg_ob_data_29 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_27 ; scsn_scsn_nw_dll_ob1_reg_ob_data_28 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_25 ; scsn_scsn_nw_dll_ob0_reg_ob_data_26 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_25 ; scsn_scsn_nw_dll_ob1_reg_ob_data_26 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_23 ; scsn_scsn_nw_dll_ob0_reg_ob_data_24 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_21 ; scsn_scsn_nw_dll_ob1_reg_ob_data_22 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_20 ; scsn_scsn_nw_dll_ob0_reg_ob_data_21 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_19 ; scsn_scsn_nw_dll_ob1_reg_ob_data_20 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_18 ; scsn_scsn_nw_dll_ob0_reg_ob_data_19 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_18 ; scsn_scsn_nw_dll_ob1_reg_ob_data_19 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_17 ; scsn_scsn_nw_dll_ob0_reg_ob_data_18 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_17 ; scsn_scsn_nw_dll_ob1_reg_ob_data_18 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_15 ; scsn_scsn_nw_dll_ob0_reg_ob_data_16 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_15 ; scsn_scsn_nw_dll_ob1_reg_ob_data_16 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_14 ; scsn_scsn_nw_dll_ob0_reg_ob_data_15 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_14 ; scsn_scsn_nw_dll_ob1_reg_ob_data_15 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_13 ; scsn_scsn_nw_dll_ob0_reg_ob_data_14 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_12 ; scsn_scsn_nw_dll_ob1_reg_ob_data_13 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_11 ; scsn_scsn_nw_dll_ob0_reg_ob_data_12 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_11 ; scsn_scsn_nw_dll_ob1_reg_ob_data_12 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_10 ; scsn_scsn_nw_dll_ob0_reg_ob_data_11 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_8 ; scsn_scsn_nw_dll_ob0_reg_ob_data_9 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_7 ; scsn_scsn_nw_dll_ob0_reg_ob_data_8 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_7 ; scsn_scsn_nw_dll_ob1_reg_ob_data_8 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_6 ; scsn_scsn_nw_dll_ob1_reg_ob_data_7 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_5 ; scsn_scsn_nw_dll_ob0_reg_ob_data_6 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_5 ; scsn_scsn_nw_dll_ob1_reg_ob_data_6 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_4 ; scsn_scsn_nw_dll_ob0_reg_ob_data_5 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob0_reg_ob_data_3 ; scsn_scsn_nw_dll_ob0_reg_ob_data_4 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_3 ; scsn_scsn_nw_dll_ob1_reg_ob_data_4 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_2 ; scsn_scsn_nw_dll_ob1_reg_ob_data_3 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_scsn_nw_dll_ob1_reg_ob_data_0 ; scsn_scsn_nw_dll_ob1_reg_ob_data_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.700 ns ; scsn_scsn_nw_dll_st1_h1_reg_data_out_1 ; scsn_scsn_nw_dll_st1_reg_data_out_to_pl ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[14] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|q[15] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|q[15] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|q[15] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_nw_dll_st0_h1_reg_data_out_1 ; scsn_scsn_nw_dll_st0_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_nw_dll_st1_h1_reg_data_out_1 ; scsn_scsn_nw_dll_st1_h1_reg_data_out_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_pre_counter_ix6 ; scsn_pre_counter_ix6 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[13] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[14] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[14] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[14] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[12] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[13] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[13] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[13] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[11] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[12] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[12] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[12] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[10] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[11] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[11] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[11] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[9] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[10] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[10] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[10] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[8] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[9] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[9] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[9] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[8] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[8] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[6] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[7] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[7] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[7] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[5] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[6] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[6] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[6] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[4] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[5] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[5] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[5] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[3] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[4] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[4] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[4] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[2] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[3] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[3] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[3] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[1] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[2] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[2] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[2] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[0] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[1] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[1] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[1] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[0] ; lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[0] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_pre_reg_bitcnt_0 ; scsn_pre_reg_bitcnt_0 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[6] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[4] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[5] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_nw_dll_st0_sleeptimer_reg_state_1 ; scsn_scsn_nw_dll_st0_sleeptimer_reg_event ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_ob0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_current_state0_0 ; scsn_scsn_reg_current_state0_0 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_current_state0_0 ; scsn_scsn_reg_current_state0_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_nw_dll_st1_sleeptimer_reg_state_1 ; scsn_scsn_nw_dll_st1_sleeptimer_reg_event ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_ob1_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[3] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_current_state1_0 ; scsn_scsn_reg_current_state1_0 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_scsn_reg_current_state1_0 ; scsn_scsn_reg_current_state1_1 ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_st0_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[2] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[0] ; lpm_counter:scsn_scsn_nw_dll_st1_stuff_in_state_ix9|alt_counter_f10ke:wysi_counter|q[1] ; CLK50M ; CLK50M ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; +-----------------------------------------+-----------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Clock Hold: 'scsn_jtg_jtgtms_reg_TCK' ; +-----------------------------------------+-----------------------------------------------------+------------------------------------+-------------------------+-------------------------+----------------------------+----------------------------+--------------------------+ ; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ; +-----------------------------------------+-----------------------------------------------------+------------------------------------+-------------------------+-------------------------+----------------------------+----------------------------+--------------------------+ ; -1.300 ns ; scsn_jtg_jtgrcv_reg_seribf_t_25 ; scsn_jtg_jtgrcv_reg_seribf_t_26 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.500 ns ; 2.200 ns ; ; -1.200 ns ; scsn_jtg_jtgrcv_reg_seribf_t_38 ; scsn_jtg_jtgrcv_reg_seribf_t_39 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.400 ns ; 2.200 ns ; ; -0.900 ns ; scsn_jtg_jtgrcv_reg_seribf_t_2 ; scsn_jtg_jtgrcv_reg_seribf_t_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.100 ns ; 2.200 ns ; ; -0.100 ns ; scsn_jtg_jtgrcv_reg_seribf_t_49 ; scsn_jtg_jtgrcv_reg_seribf_t_50 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.200 ns ; 2.100 ns ; ; 0.200 ns ; scsn_jtg_jtgrcv_reg_seribf_t_54 ; scsn_jtg_jtgrcv_reg_seribf_t_55 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 1.000 ns ; 1.200 ns ; ; 0.300 ns ; scsn_jtg_jtgrcv_reg_seribf_t_52 ; scsn_jtg_jtgrcv_reg_seribf_t_53 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 1.000 ns ; 1.300 ns ; ; 0.600 ns ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsm_reg_PresentState_6 ; scsn_jtg_jtgsm_reg_PresentState_7 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsm_reg_PresentState_13 ; scsn_jtg_jtgsm_reg_PresentState_14 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsm_reg_PresentState_6 ; scsn_jtg_jtgsm_reg_PresentState_6 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsm_reg_PresentState_14 ; scsn_jtg_jtgsm_reg_PresentState_15 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsm_reg_PresentState_7 ; scsn_jtg_jtgsm_reg_PresentState_8 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsm_reg_PresentState_13 ; scsn_jtg_jtgsm_reg_PresentState_13 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgsm_reg_PresentState_5 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_jtgsm_reg_PresentState_12 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.600 ns ; scsn_jtg_jtgrcv_reg_seribf_t_64 ; scsn_jtg_jtgrcv_reg_seribf_t_65 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 1.400 ns ; 2.000 ns ; ; 0.600 ns ; scsn_jtg_jtgrcv_reg_seribf_t_71 ; scsn_jtg_jtgrcv_reg_seribf_t_72 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 0.600 ns ; 1.200 ns ; ; 0.600 ns ; scsn_jtg_jtgrcv_reg_seribf_t_5 ; scsn_jtg_jtgrcv_reg_seribf_t_6 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 0.600 ns ; 1.200 ns ; ; 0.600 ns ; scsn_jtg_jtgsm_reg_PresentState_6 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.500 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_10 ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_5 ; scsn_jtg_jtgsm_reg_PresentState_6 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_12 ; scsn_jtg_jtgsm_reg_PresentState_15 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_5 ; scsn_jtg_jtgsm_reg_PresentState_8 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_12 ; scsn_jtg_jtgsm_reg_PresentState_13 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_10 ; scsn_jtg_jtgsm_reg_PresentState_12 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_31 ; scsn_jtg_jtgrcv_reg_seribf_t_31 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_12 ; scsn_jtg_jtgrcv_reg_seribf_t_12 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_14 ; scsn_jtg_jtgrcv_reg_seribf_t_15 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_30 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.800 ns ; 3.500 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_0 ; scsn_jtg_jtgsm_reg_PresentState_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_27 ; scsn_jtg_jtgrcv_reg_seribf_t_27 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_29 ; scsn_jtg_jtgrcv_reg_seribf_t_29 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_9 ; scsn_jtg_jtgrcv_reg_seribf_t_10 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_14 ; scsn_jtg_jtgrcv_reg_seribf_t_14 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_48 ; scsn_jtg_jtgrcv_reg_seribf_t_49 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_17 ; scsn_jtg_jtgrcv_reg_seribf_t_17 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_1 ; scsn_jtg_jtgrcv_reg_seribf_t_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_53 ; scsn_jtg_jtgrcv_reg_seribf_t_53 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_53 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.200 ns ; 3.900 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_52 ; scsn_jtg_jtgrcv_reg_seribf_t_52 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_24 ; scsn_jtg_jtgrcv_reg_seribf_t_24 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_22 ; scsn_jtg_jtgrcv_reg_seribf_t_23 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 1.300 ns ; 2.000 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_21 ; scsn_jtg_jtgrcv_reg_seribf_t_22 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_54 ; scsn_jtg_jtgrcv_reg_seribf_t_54 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_21 ; scsn_jtg_jtgrcv_reg_seribf_t_21 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_19 ; scsn_jtg_jtgrcv_reg_seribf_t_20 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_56 ; scsn_jtg_jtgrcv_reg_seribf_t_56 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_56 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.200 ns ; 3.900 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_55 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.200 ns ; 3.900 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_58 ; scsn_jtg_jtgrcv_reg_seribf_t_58 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_57 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.000 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_59 ; scsn_jtg_jtgrcv_reg_seribf_t_59 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_61 ; scsn_jtg_jtgrcv_reg_seribf_t_61 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_59 ; scsn_jtg_jtgrcv_reg_seribf_t_60 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_62 ; scsn_jtg_jtgrcv_reg_seribf_t_62 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_9 ; scsn_jtg_jtgrcv_reg_seribf_t_9 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_63 ; scsn_jtg_jtgrcv_reg_seribf_t_63 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_8 ; scsn_jtg_jtgrcv_reg_seribf_t_8 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_66 ; scsn_jtg_jtgrcv_reg_seribf_t_66 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_66 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.000 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_65 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.000 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_5 ; scsn_jtg_jtgrcv_reg_seribf_t_5 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_3 ; scsn_jtg_jtgrcv_reg_seribf_t_4 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_69 ; scsn_jtg_jtgrcv_reg_seribf_t_69 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_72 ; scsn_jtg_jtgrcv_reg_seribf_t_72 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_70 ; scsn_jtg_jtgrcv_reg_seribf_t_71 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_69 ; scsn_jtg_jtgrcv_reg_seribf_t_70 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_6 ; scsn_jtg_jtgrcv_reg_seribf_t_6 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_6 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.000 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_66 ; scsn_jtg_jtgrcv_reg_seribf_t_67 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_67 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.000 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_47 ; scsn_jtg_jtgrcv_reg_seribf_t_47 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_45 ; scsn_jtg_jtgrcv_reg_seribf_t_46 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_41 ; scsn_jtg_jtgrcv_reg_seribf_t_41 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_39 ; scsn_jtg_jtgrcv_reg_seribf_t_40 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_40 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.200 ns ; 3.900 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_51 ; scsn_jtg_jtgrcv_reg_seribf_t_51 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_39 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.200 ns ; 3.900 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_38 ; scsn_jtg_jtgrcv_reg_seribf_t_38 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_35 ; scsn_jtg_jtgrcv_reg_seribf_t_36 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_34 ; scsn_jtg_jtgrcv_reg_seribf_t_35 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_34 ; scsn_jtg_jtgrcv_reg_seribf_t_34 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_32 ; scsn_jtg_jtgrcv_reg_seribf_t_33 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_44 ; scsn_jtg_jtgrcv_reg_seribf_t_45 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_44 ; scsn_jtg_jtgrcv_reg_seribf_t_44 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_t_42 ; scsn_jtg_jtgrcv_reg_seribf_t_43 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.700 ns ; scsn_jtg_jtgrcv_reg_seribf_i_1 ; scsn_jtg_jtgrcv_reg_seribf_i_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.600 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_14 ; scsn_jtg_jtgsm_reg_PresentState_11 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_7 ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_2 ; scsn_jtg_jtgsm_reg_PresentState_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 0.300 ns ; 1.100 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_1 ; scsn_jtg_jtgsm_reg_PresentState_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_9 ; scsn_jtg_jtgsm_reg_PresentState_10 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 0.200 ns ; 1.000 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_28 ; scsn_jtg_jtgrcv_reg_seribf_t_28 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_28 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.900 ns ; 3.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_31 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.000 ns ; 3.800 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_32 ; scsn_jtg_jtgrcv_reg_seribf_t_32 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_12 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.200 ns ; 4.000 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_16 ; scsn_jtg_jtgrcv_reg_seribf_t_16 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_16 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.100 ns ; 3.900 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_15 ; scsn_jtg_jtgrcv_reg_seribf_t_15 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_15 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.100 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_30 ; scsn_jtg_jtgrcv_reg_seribf_t_30 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_11 ; scsn_jtg_jtgrcv_reg_seribf_t_11 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_11 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.100 ns ; 3.900 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_26 ; scsn_jtg_jtgrcv_reg_seribf_t_27 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_27 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.000 ns ; 3.800 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_28 ; scsn_jtg_jtgrcv_reg_seribf_t_29 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_29 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.900 ns ; 3.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_10 ; scsn_jtg_jtgrcv_reg_seribf_t_10 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_10 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.200 ns ; 4.000 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_14 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.100 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_1 ; scsn_jtg_jtgrcv_reg_seribf_t_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_49 ; scsn_jtg_jtgrcv_reg_seribf_t_49 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_48 ; scsn_jtg_jtgrcv_reg_seribf_t_48 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_17 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.000 ns ; 2.800 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_26 ; scsn_jtg_jtgrcv_reg_seribf_t_26 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_26 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.000 ns ; 3.800 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_25 ; scsn_jtg_jtgrcv_reg_seribf_t_25 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_2 ; scsn_jtg_jtgrcv_reg_seribf_t_2 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_51 ; scsn_jtg_jtgrcv_reg_seribf_t_52 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_52 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.100 ns ; 2.900 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_18 ; scsn_jtg_jtgrcv_reg_seribf_t_18 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_18 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.100 ns ; 3.900 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_24 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.700 ns ; 3.500 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_23 ; scsn_jtg_jtgrcv_reg_seribf_t_23 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_23 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.100 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_22 ; scsn_jtg_jtgrcv_reg_seribf_t_22 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_22 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 1.900 ns ; 2.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_19 ; scsn_jtg_jtgrcv_reg_seribf_t_19 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_19 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 1.900 ns ; 2.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_54 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.100 ns ; 2.900 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_20 ; scsn_jtg_jtgrcv_reg_seribf_t_21 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_21 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 1.900 ns ; 2.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_20 ; scsn_jtg_jtgrcv_reg_seribf_t_20 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_20 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 1.900 ns ; 2.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_55 ; scsn_jtg_jtgrcv_reg_seribf_t_56 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_55 ; scsn_jtg_jtgrcv_reg_seribf_t_55 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_58 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.100 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_57 ; scsn_jtg_jtgrcv_reg_seribf_t_57 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_58 ; scsn_jtg_jtgrcv_reg_seribf_t_59 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_59 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.100 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_13 ; scsn_jtg_jtgrcv_reg_seribf_t_13 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_13 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.200 ns ; 4.000 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_61 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.700 ns ; 3.500 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_60 ; scsn_jtg_jtgrcv_reg_seribf_t_60 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_60 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.100 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_61 ; scsn_jtg_jtgrcv_reg_seribf_t_62 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_62 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.700 ns ; 3.500 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_8 ; scsn_jtg_jtgrcv_reg_seribf_t_9 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_9 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.200 ns ; 4.000 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_63 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.000 ns ; 3.800 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_8 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.200 ns ; 4.000 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_7 ; scsn_jtg_jtgrcv_reg_seribf_t_7 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_7 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.100 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_65 ; scsn_jtg_jtgrcv_reg_seribf_t_66 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_65 ; scsn_jtg_jtgrcv_reg_seribf_t_65 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_5 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.600 ns ; 3.400 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_4 ; scsn_jtg_jtgrcv_reg_seribf_t_4 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_4 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.900 ns ; 3.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_69 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.600 ns ; 3.400 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_68 ; scsn_jtg_jtgrcv_reg_seribf_t_68 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_68 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.000 ns ; 3.800 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_72 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 3.300 ns ; 4.100 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_71 ; scsn_jtg_jtgrcv_reg_seribf_t_71 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_71 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.600 ns ; 3.400 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_3 ; scsn_jtg_jtgrcv_reg_seribf_t_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_3 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.900 ns ; 3.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_70 ; scsn_jtg_jtgrcv_reg_seribf_t_70 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_70 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.600 ns ; 3.400 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_67 ; scsn_jtg_jtgrcv_reg_seribf_t_67 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_46 ; scsn_jtg_jtgrcv_reg_seribf_t_47 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_46 ; scsn_jtg_jtgrcv_reg_seribf_t_46 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_40 ; scsn_jtg_jtgrcv_reg_seribf_t_40 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_50 ; scsn_jtg_jtgrcv_reg_seribf_t_51 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_51 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.100 ns ; 2.900 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_39 ; scsn_jtg_jtgrcv_reg_seribf_t_39 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_37 ; scsn_jtg_jtgrcv_reg_seribf_t_38 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_37 ; scsn_jtg_jtgrcv_reg_seribf_t_37 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_36 ; scsn_jtg_jtgrcv_reg_seribf_t_36 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_35 ; scsn_jtg_jtgrcv_reg_seribf_t_35 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_33 ; scsn_jtg_jtgrcv_reg_seribf_t_34 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_64 ; scsn_jtg_jtgrcv_reg_seribf_t_64 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_64 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 1.800 ns ; 2.600 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_50 ; scsn_jtg_jtgrcv_reg_seribf_t_50 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgsm_reg_PresentState_4 ; scsn_jtg_jtgrcv_reg_seribf_t_50 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 2.100 ns ; 2.900 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_33 ; scsn_jtg_jtgrcv_reg_seribf_t_33 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_i_0 ; scsn_jtg_jtgrcv_reg_seribf_i_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_45 ; scsn_jtg_jtgrcv_reg_seribf_t_45 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_43 ; scsn_jtg_jtgrcv_reg_seribf_t_44 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_43 ; scsn_jtg_jtgrcv_reg_seribf_t_43 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_t_42 ; scsn_jtg_jtgrcv_reg_seribf_t_42 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.800 ns ; scsn_jtg_jtgrcv_reg_seribf_i_0 ; scsn_jtg_jtgrcv_reg_seribf_i_1 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 0.700 ns ; ; 0.900 ns ; scsn_jtg_jtgrcv_reg_seribf_t_17 ; scsn_jtg_jtgrcv_reg_seribf_t_18 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 1.000 ns ; 1.900 ns ; ; 0.900 ns ; scsn_jtg_jtgrcv_reg_seribf_t_62 ; scsn_jtg_jtgrcv_reg_seribf_t_63 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 0.200 ns ; 1.100 ns ; ; 1.000 ns ; scsn_jtg_jtgsm_reg_PresentState_2 ; scsn_jtg_jtgsm_reg_PresentState_9 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; 0.000 ns ; 1.000 ns ; ; 1.200 ns ; scsn_jtg_jtgrcv_reg_seribf_t_36 ; scsn_jtg_jtgrcv_reg_seribf_t_37 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.200 ns ; 1.000 ns ; ; 1.200 ns ; scsn_jtg_jtgrcv_reg_seribf_t_41 ; scsn_jtg_jtgrcv_reg_seribf_t_42 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 1.100 ns ; ; 1.300 ns ; scsn_jtg_jtgsm_reg_PresentState_9 ; scsn_jtg_jtgsm_reg_PresentState_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.200 ns ; 1.100 ns ; ; 1.300 ns ; scsn_jtg_jtgsm_reg_PresentState_7 ; scsn_jtg_jtgsm_reg_state_0 ; scsn_jtg_jtgtms_reg_TCK ; scsn_jtg_jtgtms_reg_TCK ; 0.000 ns ; -0.100 ns ; 1.200 ns ; ; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; +-----------------------------------------+-----------------------------------------------------+------------------------------------+-------------------------+-------------------------+----------------------------+----------------------------+--------------------------+ +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; tsu ; +-----------------------------------------+-----------------------------------------------------+------------+----------------+-----------------------------------------------------------------------------------------------------------------+----------+ ; Slack ; Required tsu ; Actual tsu ; From ; To ; To Clock ; +-----------------------------------------+-----------------------------------------------------+------------+----------------+-----------------------------------------------------------------------------------------------------------------+----------+ ; N/A ; None ; 8.900 ns ; digital_io[15] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[31] ; pci_clk ; ; N/A ; None ; 8.800 ns ; digital_io[15] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[31] ; pci_clk ; ; N/A ; None ; 8.800 ns ; digital_io[14] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[30] ; pci_clk ; ; N/A ; None ; 8.700 ns ; digital_io[14] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[30] ; pci_clk ; ; N/A ; None ; 7.700 ns ; digital_io[9] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[25] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[1] ; pci_clk ; ; N/A ; None ; 7.600 ns ; digital_io[9] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[25] ; pci_clk ; ; N/A ; None ; 7.600 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[1] ; pci_clk ; ; N/A ; None ; 7.300 ns ; pci_cben[3] ; pci_contr:pci|pci_mt32:pci_mt32_inst|par_or ; pci_clk ; ; N/A ; None ; 7.200 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[26] ; pci_clk ; ; N/A ; None ; 7.200 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[26] ; pci_clk ; ; N/A ; None ; 7.100 ns ; pci_cben[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|par_or ; pci_clk ; ; N/A ; None ; 7.100 ns ; pci_cben[0] ; pci_contr:pci|pci_mt32:pci_mt32_inst|par_or ; pci_clk ; ; N/A ; None ; 6.900 ns ; digital_io[12] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[28] ; pci_clk ; ; N/A ; None ; 6.800 ns ; digital_io[12] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[28] ; pci_clk ; ; N/A ; None ; 6.800 ns ; pci_cben[3] ; pci_contr:pci|pci_mt32:pci_mt32_inst|cben_ir_address[3] ; pci_clk ; ; N/A ; None ; 6.800 ns ; pci_cben[2] ; pci_contr:pci|pci_mt32:pci_mt32_inst|par_or ; pci_clk ; ; N/A ; None ; 6.800 ns ; pci_cben[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|cben_ir_address[1] ; pci_clk ; ; N/A ; None ; 6.800 ns ; pci_cben[0] ; pci_contr:pci|pci_mt32:pci_mt32_inst|cben_ir_address[0] ; pci_clk ; ; N/A ; None ; 6.800 ns ; pci_cben[0] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_cben_IR_data[0] ; pci_clk ; ; N/A ; None ; 6.700 ns ; pci_cben[3] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_cben_IR_data[3] ; pci_clk ; ; N/A ; None ; 6.700 ns ; pci_cben[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_cben_IR_data[1] ; pci_clk ; ; N/A ; None ; 6.600 ns ; TDO ; scsn_jtg_reg_bus_dout_4 ; pci_clk ; ; N/A ; None ; 6.600 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[6] ; pci_clk ; ; N/A ; None ; 6.600 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[6] ; pci_clk ; ; N/A ; None ; 6.500 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[2] ; pci_clk ; ; N/A ; None ; 6.500 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[4] ; pci_clk ; ; N/A ; None ; 6.400 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[2] ; pci_clk ; ; N/A ; None ; 6.400 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[4] ; pci_clk ; ; N/A ; None ; 6.400 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|irdy_or_not ; pci_clk ; ; N/A ; None ; 6.300 ns ; digital_io[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[26] ; pci_clk ; ; N/A ; None ; 6.300 ns ; pci_cben[2] ; pci_contr:pci|pci_mt32:pci_mt32_inst|cben_ir_address[2] ; pci_clk ; ; N/A ; None ; 6.300 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[11] ; pci_clk ; ; N/A ; None ; 6.300 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[12] ; pci_clk ; ; N/A ; None ; 6.200 ns ; digital_io[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[26] ; pci_clk ; ; N/A ; None ; 6.200 ns ; pci_cben[2] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_cben_IR_data[2] ; pci_clk ; ; N/A ; None ; 6.200 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[13] ; pci_clk ; ; N/A ; None ; 6.200 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[14] ; pci_clk ; ; N/A ; None ; 6.200 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[15] ; pci_clk ; ; N/A ; None ; 6.200 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[11] ; pci_clk ; ; N/A ; None ; 6.200 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[12] ; pci_clk ; ; N/A ; None ; 6.100 ns ; digital_io[13] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[29] ; pci_clk ; ; N/A ; None ; 6.100 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[0] ; pci_clk ; ; N/A ; None ; 6.100 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[0] ; pci_clk ; ; N/A ; None ; 6.100 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[13] ; pci_clk ; ; N/A ; None ; 6.100 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[14] ; pci_clk ; ; N/A ; None ; 6.100 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[15] ; pci_clk ; ; N/A ; None ; 6.000 ns ; digital_io[13] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[29] ; pci_clk ; ; N/A ; None ; 6.000 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[8] ; pci_clk ; ; N/A ; None ; 6.000 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|irdy_or_not ; pci_clk ; ; N/A ; None ; 6.000 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|WAIT_WAIT32 ; pci_clk ; ; N/A ; None ; 5.900 ns ; digital_io[11] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[27] ; pci_clk ; ; N/A ; None ; 5.900 ns ; digital_io[3] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[19] ; pci_clk ; ; N/A ; None ; 5.900 ns ; digital_io[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[17] ; pci_clk ; ; N/A ; None ; 5.900 ns ; digital_io[0] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[16] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[9] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[10] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[3] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[5] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_PXFR_r2 ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[8] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[9] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[10] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[3] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[5] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LAST_r[1] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LAST_r[3] ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_r4 ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_r1 ; pci_clk ; ; N/A ; None ; 5.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_WAIT ; pci_clk ; ; N/A ; None ; 5.800 ns ; digital_io[11] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[27] ; pci_clk ; ; N/A ; None ; 5.800 ns ; digital_io[3] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[19] ; pci_clk ; ; N/A ; None ; 5.800 ns ; digital_io[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[17] ; pci_clk ; ; N/A ; None ; 5.800 ns ; digital_io[0] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[16] ; pci_clk ; ; N/A ; None ; 5.800 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|perr_vldR ; pci_clk ; ; N/A ; None ; 5.800 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_END ; pci_clk ; ; N/A ; None ; 5.700 ns ; digital_io[2] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[18] ; pci_clk ; ; N/A ; None ; 5.700 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[27] ; pci_clk ; ; N/A ; None ; 5.700 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_END ; pci_clk ; ; N/A ; None ; 5.600 ns ; digital_io[6] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[22] ; pci_clk ; ; N/A ; None ; 5.600 ns ; digital_io[2] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[18] ; pci_clk ; ; N/A ; None ; 5.600 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[21] ; pci_clk ; ; N/A ; None ; 5.600 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|cbe_oer_not ; pci_clk ; ; N/A ; None ; 5.600 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|WAIT_WAIT32 ; pci_clk ; ; N/A ; None ; 5.600 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_END_r[2] ; pci_clk ; ; N/A ; None ; 5.600 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_WAIT_32_r[1] ; pci_clk ; ; N/A ; None ; 5.500 ns ; digital_io[8] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[24] ; pci_clk ; ; N/A ; None ; 5.500 ns ; digital_io[6] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[22] ; pci_clk ; ; N/A ; None ; 5.500 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[16] ; pci_clk ; ; N/A ; None ; 5.500 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[19] ; pci_clk ; ; N/A ; None ; 5.500 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[20] ; pci_clk ; ; N/A ; None ; 5.500 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_r4 ; pci_clk ; ; N/A ; None ; 5.500 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_WAIT_32_r[2] ; pci_clk ; ; N/A ; None ; 5.400 ns ; digital_io[8] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[24] ; pci_clk ; ; N/A ; None ; 5.400 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[17] ; pci_clk ; ; N/A ; None ; 5.400 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[30] ; pci_clk ; ; N/A ; None ; 5.400 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[31] ; pci_clk ; ; N/A ; None ; 5.400 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|frame_or_not ; pci_clk ; ; N/A ; None ; 5.400 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|frame_or_not ; pci_clk ; ; N/A ; None ; 5.400 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_32_r[3] ; pci_clk ; ; N/A ; None ; 5.400 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_32_r[1] ; pci_clk ; ; N/A ; None ; 5.300 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[7] ; pci_clk ; ; N/A ; None ; 5.300 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LAST_r[3] ; pci_clk ; ; N/A ; None ; 5.300 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_WAIT ; pci_clk ; ; N/A ; None ; 5.300 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[18] ; pci_clk ; ; N/A ; None ; 5.300 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[27] ; pci_clk ; ; N/A ; None ; 5.200 ns ; LVDS_in[2] ; reg_d_in_0 ; CLK50M ; ; N/A ; None ; 5.200 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[18] ; pci_clk ; ; N/A ; None ; 5.200 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LAST_r[1] ; pci_clk ; ; N/A ; None ; 5.200 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_r1 ; pci_clk ; ; N/A ; None ; 5.200 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[7] ; pci_clk ; ; N/A ; None ; 5.200 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[23] ; pci_clk ; ; N/A ; None ; 5.200 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[24] ; pci_clk ; ; N/A ; None ; 5.200 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[25] ; pci_clk ; ; N/A ; None ; 5.200 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[30] ; pci_clk ; ; N/A ; None ; 5.100 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[23] ; pci_clk ; ; N/A ; None ; 5.100 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[24] ; pci_clk ; ; N/A ; None ; 5.100 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[25] ; pci_clk ; ; N/A ; None ; 5.100 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|perr_vldR ; pci_clk ; ; N/A ; None ; 5.100 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_PXFR_r2 ; pci_clk ; ; N/A ; None ; 5.100 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_clk ; ; N/A ; None ; 5.100 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|cbe_oer_not ; pci_clk ; ; N/A ; None ; 5.100 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_DXFR ; pci_clk ; ; N/A ; None ; 5.100 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[22] ; pci_clk ; ; N/A ; None ; 5.100 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[31] ; pci_clk ; ; N/A ; None ; 5.100 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_PXFR_r2 ; pci_clk ; ; N/A ; None ; 5.000 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[22] ; pci_clk ; ; N/A ; None ; 5.000 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[20] ; pci_clk ; ; N/A ; None ; 5.000 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[21] ; pci_clk ; ; N/A ; None ; 5.000 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_END_r[1] ; pci_clk ; ; N/A ; None ; 4.900 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|devsel_toR ; pci_clk ; ; N/A ; None ; 4.900 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_32_r[2] ; pci_clk ; ; N/A ; None ; 4.900 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_WAIT_32_r[1] ; pci_clk ; ; N/A ; None ; 4.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[16] ; pci_clk ; ; N/A ; None ; 4.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[17] ; pci_clk ; ; N/A ; None ; 4.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[19] ; pci_clk ; ; N/A ; None ; 4.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LLXFR_r2 ; pci_clk ; ; N/A ; None ; 4.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LWAIT ; pci_clk ; ; N/A ; None ; 4.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LPXFR_r1 ; pci_clk ; ; N/A ; None ; 4.900 ns ; pci_ad[28] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[28] ; pci_clk ; ; N/A ; None ; 4.800 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_clk ; ; N/A ; None ; 4.800 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LPXFR_r1 ; pci_clk ; ; N/A ; None ; 4.800 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|tabrt_set ; pci_clk ; ; N/A ; None ; 4.800 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_WAIT_32_r[2] ; pci_clk ; ; N/A ; None ; 4.800 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_32_r[3] ; pci_clk ; ; N/A ; None ; 4.800 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LLWAIT_r2 ; pci_clk ; ; N/A ; None ; 4.800 ns ; pci_par ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_pk:parity_Chk|perr_det_setR_r1 ; pci_clk ; ; N/A ; None ; 4.700 ns ; LVDS_in[3] ; reg_d_in_1 ; CLK50M ; ; N/A ; None ; 4.700 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|idle_reg ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|park ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_sr:burst_trans|REG ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|idle_reg ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|park ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_WAIT ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_PXFR_32_r2 ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|irdy_or_not ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[0] ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|devselR ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[2] ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[1] ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LWAIT ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_TAR ; pci_clk ; ; N/A ; None ; 4.700 ns ; pci_par ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_pk:parity_Chk|perr_or_not ; pci_clk ; ; N/A ; None ; 4.600 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[28] ; pci_clk ; ; N/A ; None ; 4.600 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|WAIT_wait32 ; pci_clk ; ; N/A ; None ; 4.600 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_clk ; ; N/A ; None ; 4.600 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|devsel_OR_not ; pci_clk ; ; N/A ; None ; 4.600 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_sr:burst_trans|REG ; pci_clk ; ; N/A ; None ; 4.600 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_TAR ; pci_clk ; ; N/A ; None ; 4.600 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LLWAIT_r1 ; pci_clk ; ; N/A ; None ; 4.600 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_PXFR_r2 ; pci_clk ; ; N/A ; None ; 4.600 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_PXFR_r1 ; pci_clk ; ; N/A ; None ; 4.600 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_32_r[1] ; pci_clk ; ; N/A ; None ; 4.500 ns ; TDO ; scsn_jtg_jtgrcv_reg_seribf_t_1 ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_ad[27] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[27] ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_ad[27] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[27] ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_ad[19] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[19] ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_ad[18] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[18] ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LW_DONE ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LW_WAIT ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|stop_OR_NOT ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_LXFR ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_PXFR_r1 ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_WAIT_32 ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_32_r[2] ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|cbe_oer_not ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_DXFR ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|tabrt_set ; pci_clk ; ; N/A ; None ; 4.500 ns ; pci_ad[28] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[28] ; pci_clk ; ; N/A ; None ; 4.400 ns ; TDO ; scsn_jtg_jtgrcv_reg_seribf_i_0 ; pci_clk ; ; N/A ; None ; 4.400 ns ; pci_ad[26] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[26] ; pci_clk ; ; N/A ; None ; 4.400 ns ; pci_ad[26] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[26] ; pci_clk ; ; N/A ; None ; 4.400 ns ; pci_ad[19] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[19] ; pci_clk ; ; N/A ; None ; 4.400 ns ; pci_ad[18] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[18] ; pci_clk ; ; N/A ; None ; 4.400 ns ; pci_ad[17] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[17] ; pci_clk ; ; N/A ; None ; 4.400 ns ; pci_ad[17] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[17] ; pci_clk ; ; N/A ; None ; 4.400 ns ; pci_ad[16] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[16] ; pci_clk ; ; N/A ; None ; 4.400 ns ; pci_ad[16] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[16] ; pci_clk ; ; N/A ; None ; 4.400 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[29] ; pci_clk ; ; N/A ; None ; 4.400 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LW_LXFR ; pci_clk ; ; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; +-----------------------------------------+-----------------------------------------------------+------------+----------------+-----------------------------------------------------------------------------------------------------------------+----------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; tco ; +-----------------------------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------+----------------+------------+ ; Slack ; Required tco ; Actual tco ; From ; To ; From Clock ; +-----------------------------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------+----------------+------------+ ; N/A ; None ; 19.700 ns ; sg_reg_mx_q ; R7S[1] ; CLK50M ; ; N/A ; None ; 19.400 ns ; sg_reg_mx_q ; R7S[4] ; CLK50M ; ; N/A ; None ; 19.000 ns ; sg_reg_mx_q ; R7S[6] ; CLK50M ; ; N/A ; None ; 18.500 ns ; sg_reg_mx_q ; R7S[5] ; CLK50M ; ; N/A ; None ; 18.200 ns ; sg_reg_mx_q ; R7S[2] ; CLK50M ; ; N/A ; None ; 17.800 ns ; scsn_dec_reg_rdata_conf_2 ; R7S[1] ; pci_clk ; ; N/A ; None ; 17.800 ns ; scsn_dec_reg_rdata_conf_6 ; R7S[1] ; pci_clk ; ; N/A ; None ; 17.500 ns ; scsn_dec_reg_rdata_conf_2 ; R7S[4] ; pci_clk ; ; N/A ; None ; 17.500 ns ; scsn_dec_reg_rdata_conf_6 ; R7S[4] ; pci_clk ; ; N/A ; None ; 17.300 ns ; scsn_dec_reg_rdata_conf_3 ; R7S[1] ; pci_clk ; ; N/A ; None ; 17.200 ns ; scsn_dec_reg_rdata_conf_7 ; R7S[1] ; pci_clk ; ; N/A ; None ; 17.100 ns ; scsn_dec_reg_rdata_conf_2 ; R7S[6] ; pci_clk ; ; N/A ; None ; 17.100 ns ; scsn_dec_reg_rdata_conf_6 ; R7S[6] ; pci_clk ; ; N/A ; None ; 17.100 ns ; sg_reg_mx_q ; R7S[7] ; CLK50M ; ; N/A ; None ; 17.000 ns ; scsn_dec_reg_rdata_conf_3 ; R7S[4] ; pci_clk ; ; N/A ; None ; 16.900 ns ; scsn_dec_reg_rdata_conf_7 ; R7S[4] ; pci_clk ; ; N/A ; None ; 16.800 ns ; sg_reg_mx_q ; R7S[3] ; CLK50M ; ; N/A ; None ; 16.600 ns ; scsn_dec_reg_rdata_conf_0 ; R7S[2] ; pci_clk ; ; N/A ; None ; 16.600 ns ; scsn_dec_reg_rdata_conf_2 ; R7S[5] ; pci_clk ; ; N/A ; None ; 16.600 ns ; scsn_dec_reg_rdata_conf_6 ; R7S[5] ; pci_clk ; ; N/A ; None ; 16.600 ns ; scsn_dec_reg_rdata_conf_3 ; R7S[6] ; pci_clk ; ; N/A ; None ; 16.500 ns ; scsn_dec_reg_rdata_conf_7 ; R7S[6] ; pci_clk ; ; N/A ; None ; 16.400 ns ; scsn_dec_reg_rdata_conf_4 ; R7S[2] ; pci_clk ; ; N/A ; None ; 16.200 ns ; scsn_dec_reg_rdata_conf_5 ; R7S[2] ; pci_clk ; ; N/A ; None ; 16.100 ns ; scsn_dec_reg_rdata_conf_1 ; R7S[2] ; pci_clk ; ; N/A ; None ; 16.100 ns ; scsn_dec_reg_rdata_conf_3 ; R7S[5] ; pci_clk ; ; N/A ; None ; 16.000 ns ; scsn_dec_reg_rdata_conf_7 ; R7S[5] ; pci_clk ; ; N/A ; None ; 15.900 ns ; scsn_dec_reg_rdata_conf_2 ; R7S[2] ; pci_clk ; ; N/A ; None ; 15.800 ns ; scsn_dec_reg_rdata_conf_6 ; R7S[2] ; pci_clk ; ; N/A ; None ; 15.700 ns ; scsn_dec_reg_rdata_conf_0 ; R7S[1] ; pci_clk ; ; N/A ; None ; 15.500 ns ; scsn_dec_reg_rdata_conf_4 ; R7S[1] ; pci_clk ; ; N/A ; None ; 15.500 ns ; scsn_dec_reg_rdata_conf_3 ; R7S[2] ; pci_clk ; ; N/A ; None ; 15.400 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[15] ; pci_clk ; ; N/A ; None ; 15.400 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[14] ; pci_clk ; ; N/A ; None ; 15.400 ns ; scsn_dec_reg_rdata_conf_7 ; R7S[2] ; pci_clk ; ; N/A ; None ; 15.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[13] ; pci_clk ; ; N/A ; None ; 15.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[12] ; pci_clk ; ; N/A ; None ; 15.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[11] ; pci_clk ; ; N/A ; None ; 15.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[7] ; pci_clk ; ; N/A ; None ; 15.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[10] ; pci_clk ; ; N/A ; None ; 15.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[9] ; pci_clk ; ; N/A ; None ; 15.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[8] ; pci_clk ; ; N/A ; None ; 15.300 ns ; scsn_dec_reg_rdata_conf_5 ; R7S[1] ; pci_clk ; ; N/A ; None ; 15.300 ns ; scsn_dec_reg_rdata_conf_2 ; R7S[7] ; pci_clk ; ; N/A ; None ; 15.300 ns ; scsn_dec_reg_rdata_conf_6 ; R7S[7] ; pci_clk ; ; N/A ; None ; 15.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[6] ; pci_clk ; ; N/A ; None ; 15.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[5] ; pci_clk ; ; N/A ; None ; 15.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[4] ; pci_clk ; ; N/A ; None ; 15.200 ns ; scsn_dec_reg_rdata_conf_1 ; R7S[1] ; pci_clk ; ; N/A ; None ; 15.100 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[2] ; pci_clk ; ; N/A ; None ; 15.100 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[3] ; pci_clk ; ; N/A ; None ; 15.100 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[1] ; pci_clk ; ; N/A ; None ; 15.100 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[0] ; pci_clk ; ; N/A ; None ; 15.000 ns ; scsn_dec_reg_rdata_conf_0 ; R7S[4] ; pci_clk ; ; N/A ; None ; 14.800 ns ; scsn_dec_reg_rdata_conf_2 ; R7S[3] ; pci_clk ; ; N/A ; None ; 14.800 ns ; scsn_dec_reg_rdata_conf_6 ; R7S[3] ; pci_clk ; ; N/A ; None ; 14.800 ns ; scsn_dec_reg_rdata_conf_4 ; R7S[4] ; pci_clk ; ; N/A ; None ; 14.800 ns ; scsn_dec_reg_rdata_conf_5 ; R7S[6] ; pci_clk ; ; N/A ; None ; 14.800 ns ; scsn_dec_reg_rdata_conf_3 ; R7S[7] ; pci_clk ; ; N/A ; None ; 14.700 ns ; scsn_dec_reg_rdata_conf_7 ; R7S[7] ; pci_clk ; ; N/A ; None ; 14.600 ns ; scsn_dec_reg_rdata_conf_1 ; R7S[6] ; pci_clk ; ; N/A ; None ; 14.600 ns ; scsn_dec_reg_rdata_conf_0 ; R7S[6] ; pci_clk ; ; N/A ; None ; 14.500 ns ; scsn_dec_reg_rdata_conf_5 ; R7S[4] ; pci_clk ; ; N/A ; None ; 14.400 ns ; scsn_dec_reg_rdata_conf_4 ; R7S[6] ; pci_clk ; ; N/A ; None ; 14.400 ns ; scsn_dec_reg_rdata_conf_5 ; R7S[7] ; pci_clk ; ; N/A ; None ; 14.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[22] ; pci_clk ; ; N/A ; None ; 14.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[21] ; pci_clk ; ; N/A ; None ; 14.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[20] ; pci_clk ; ; N/A ; None ; 14.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[19] ; pci_clk ; ; N/A ; None ; 14.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[18] ; pci_clk ; ; N/A ; None ; 14.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[17] ; pci_clk ; ; N/A ; None ; 14.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[16] ; pci_clk ; ; N/A ; None ; 14.300 ns ; scsn_dec_reg_rdata_conf_3 ; R7S[3] ; pci_clk ; ; N/A ; None ; 14.300 ns ; scsn_dec_reg_rdata_conf_1 ; R7S[4] ; pci_clk ; ; N/A ; None ; 14.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[25] ; pci_clk ; ; N/A ; None ; 14.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[24] ; pci_clk ; ; N/A ; None ; 14.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[23] ; pci_clk ; ; N/A ; None ; 14.200 ns ; scsn_dec_reg_rdata_conf_7 ; R7S[3] ; pci_clk ; ; N/A ; None ; 14.200 ns ; scsn_dec_reg_rdata_conf_1 ; R7S[7] ; pci_clk ; ; N/A ; None ; 14.100 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[27] ; pci_clk ; ; N/A ; None ; 14.100 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[26] ; pci_clk ; ; N/A ; None ; 14.100 ns ; scsn_dec_reg_rdata_conf_0 ; R7S[5] ; pci_clk ; ; N/A ; None ; 14.000 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[30] ; pci_clk ; ; N/A ; None ; 14.000 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[29] ; pci_clk ; ; N/A ; None ; 14.000 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[28] ; pci_clk ; ; N/A ; None ; 13.900 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_ad[31] ; pci_clk ; ; N/A ; None ; 13.900 ns ; scsn_dec_reg_rdata_conf_4 ; R7S[5] ; pci_clk ; ; N/A ; None ; 13.600 ns ; scsn_dec_reg_rdata_conf_5 ; R7S[5] ; pci_clk ; ; N/A ; None ; 13.400 ns ; scsn_dec_reg_rdata_conf_1 ; R7S[5] ; pci_clk ; ; N/A ; None ; 13.300 ns ; scsn_dec_reg_digital_oe_i_1 ; digital_io[1] ; pci_clk ; ; N/A ; None ; 13.000 ns ; scsn_dec_reg_rdata_conf_0 ; R7S[7] ; pci_clk ; ; N/A ; None ; 12.900 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[15] ; pci_clk ; ; N/A ; None ; 12.900 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[14] ; pci_clk ; ; N/A ; None ; 12.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[13] ; pci_clk ; ; N/A ; None ; 12.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[12] ; pci_clk ; ; N/A ; None ; 12.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[11] ; pci_clk ; ; N/A ; None ; 12.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[7] ; pci_clk ; ; N/A ; None ; 12.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[10] ; pci_clk ; ; N/A ; None ; 12.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[9] ; pci_clk ; ; N/A ; None ; 12.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[8] ; pci_clk ; ; N/A ; None ; 12.800 ns ; scsn_dec_reg_rdata_conf_4 ; R7S[7] ; pci_clk ; ; N/A ; None ; 12.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[6] ; pci_clk ; ; N/A ; None ; 12.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[5] ; pci_clk ; ; N/A ; None ; 12.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[4] ; pci_clk ; ; N/A ; None ; 12.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[2] ; pci_clk ; ; N/A ; None ; 12.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[3] ; pci_clk ; ; N/A ; None ; 12.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[1] ; pci_clk ; ; N/A ; None ; 12.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[0] ; pci_clk ; ; N/A ; None ; 12.600 ns ; scsn_dec_reg_rdata_conf_5 ; R7S[3] ; pci_clk ; ; N/A ; None ; 12.400 ns ; scsn_dec_reg_rdata_conf_1 ; R7S[3] ; pci_clk ; ; N/A ; None ; 12.300 ns ; scsn_dec_reg_rdata_conf_0 ; R7S[3] ; pci_clk ; ; N/A ; None ; 12.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|cbe_oer_not ; pci_cben[1] ; pci_clk ; ; N/A ; None ; 12.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|cbe_oer_not ; pci_cben[0] ; pci_clk ; ; N/A ; None ; 12.100 ns ; scsn_dec_reg_rdata_conf_4 ; R7S[3] ; pci_clk ; ; N/A ; None ; 11.900 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|cbe_oer_not ; pci_cben[3] ; pci_clk ; ; N/A ; None ; 11.900 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|cbe_oer_not ; pci_cben[2] ; pci_clk ; ; N/A ; None ; 11.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[22] ; pci_clk ; ; N/A ; None ; 11.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[21] ; pci_clk ; ; N/A ; None ; 11.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[20] ; pci_clk ; ; N/A ; None ; 11.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[19] ; pci_clk ; ; N/A ; None ; 11.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[18] ; pci_clk ; ; N/A ; None ; 11.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[17] ; pci_clk ; ; N/A ; None ; 11.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[16] ; pci_clk ; ; N/A ; None ; 11.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[25] ; pci_clk ; ; N/A ; None ; 11.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[24] ; pci_clk ; ; N/A ; None ; 11.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[23] ; pci_clk ; ; N/A ; None ; 11.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[27] ; pci_clk ; ; N/A ; None ; 11.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[26] ; pci_clk ; ; N/A ; None ; 11.500 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[30] ; pci_clk ; ; N/A ; None ; 11.500 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[29] ; pci_clk ; ; N/A ; None ; 11.500 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[28] ; pci_clk ; ; N/A ; None ; 11.400 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_ad[31] ; pci_clk ; ; N/A ; None ; 11.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|cbe_oer_not ; pci_framen ; pci_clk ; ; N/A ; None ; 10.900 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|irdy_or_not ; pci_irdyn ; pci_clk ; ; N/A ; None ; 10.600 ns ; scsn_jtg_jtgtms_reg_TCK ; TCK ; pci_clk ; ; N/A ; None ; 10.200 ns ; scsn_dec_reg_digital_oe_i_0 ; digital_io[0] ; pci_clk ; ; N/A ; None ; 10.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|trdy_OR_NOT ; pci_trdyn ; pci_clk ; ; N/A ; None ; 9.800 ns ; scsn_jtg_reg_TDI ; TDI ; pci_clk ; ; N/A ; None ; 9.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|par_oeR ; pci_par ; pci_clk ; ; N/A ; None ; 9.600 ns ; scsn_dec_reg_digital_oe_i_3 ; digital_io[3] ; pci_clk ; ; N/A ; None ; 9.400 ns ; scsn_dec_reg_digital_oe_i_9 ; digital_io[9] ; pci_clk ; ; N/A ; None ; 9.400 ns ; scsn_dec_reg_digital_oe_i_2 ; digital_io[2] ; pci_clk ; ; N/A ; None ; 9.200 ns ; sg_reg_mx_q ; R7S_mux ; CLK50M ; ; N/A ; None ; 8.800 ns ; scsn_dec_reg_digital_oe_i_4 ; digital_io[4] ; pci_clk ; ; N/A ; None ; 8.700 ns ; scsn_dec_reg_rdata_conf_9~1 ; digital_io[9] ; pci_clk ; ; N/A ; None ; 8.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|frame_or_not ; pci_framen ; pci_clk ; ; N/A ; None ; 8.600 ns ; scsn_jtg_jtgtms_reg_s_reg_0 ; TMS ; pci_clk ; ; N/A ; None ; 8.500 ns ; scsn_dec_reg_rdata_conf_10 ; digital_io[10] ; pci_clk ; ; N/A ; None ; 8.500 ns ; scsn_dec_reg_digital_oe_i_8 ; digital_io[8] ; pci_clk ; ; N/A ; None ; 8.500 ns ; scsn_dec_reg_rdata_conf_4 ; digital_io[4] ; pci_clk ; ; N/A ; None ; 8.400 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[30] ; pci_ad[30] ; pci_clk ; ; N/A ; None ; 8.400 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|targ_oeR_reg ; pci_devseln ; pci_clk ; ; N/A ; None ; 8.400 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|targ_oeR_reg ; pci_stopn ; pci_clk ; ; N/A ; None ; 8.400 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|targ_oeR_reg ; pci_trdyn ; pci_clk ; ; N/A ; None ; 8.400 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|par_or ; pci_par ; pci_clk ; ; N/A ; None ; 8.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_pk:parity_Chk|perr_or_not ; pci_perrn ; pci_clk ; ; N/A ; None ; 8.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[4] ; pci_ad[4] ; pci_clk ; ; N/A ; None ; 8.300 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[2] ; pci_ad[2] ; pci_clk ; ; N/A ; None ; 8.300 ns ; reg_LVDS_out_2 ; LVDS_out[2] ; CLK50M ; ; N/A ; None ; 8.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[31] ; pci_ad[31] ; pci_clk ; ; N/A ; None ; 8.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|devsel_OR_not ; pci_devseln ; pci_clk ; ; N/A ; None ; 8.200 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|stop_OR_NOT ; pci_stopn ; pci_clk ; ; N/A ; None ; 8.200 ns ; scsn_dec_reg_rdata_conf_9 ; LED_RED ; pci_clk ; ; N/A ; None ; 8.100 ns ; scsn_dec_reg_rdata_conf_7 ; digital_io[7] ; pci_clk ; ; N/A ; None ; 8.100 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[15] ; pci_ad[15] ; pci_clk ; ; N/A ; None ; 8.100 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[14] ; pci_ad[14] ; pci_clk ; ; N/A ; None ; 8.100 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[13] ; pci_ad[13] ; pci_clk ; ; N/A ; None ; 8.100 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[12] ; pci_ad[12] ; pci_clk ; ; N/A ; None ; 8.100 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[11] ; pci_ad[11] ; pci_clk ; ; N/A ; None ; 8.100 ns ; reg_LVDS_out_3 ; LVDS_out[3] ; CLK50M ; ; N/A ; None ; 8.100 ns ; scsn_pre_reg_shiftd_6 ; LVDS_out[1] ; CLK50M ; ; N/A ; None ; 8.000 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_cben_or[1] ; pci_cben[1] ; pci_clk ; ; N/A ; None ; 7.900 ns ; scsn_dec_reg_rdata_conf_2 ; digital_io[2] ; pci_clk ; ; N/A ; None ; 7.900 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[8] ; pci_ad[8] ; pci_clk ; ; N/A ; None ; 7.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[27] ; pci_ad[27] ; pci_clk ; ; N/A ; None ; 7.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[26] ; pci_ad[26] ; pci_clk ; ; N/A ; None ; 7.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[25] ; pci_ad[25] ; pci_clk ; ; N/A ; None ; 7.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[24] ; pci_ad[24] ; pci_clk ; ; N/A ; None ; 7.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[23] ; pci_ad[23] ; pci_clk ; ; N/A ; None ; 7.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[22] ; pci_ad[22] ; pci_clk ; ; N/A ; None ; 7.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[18] ; pci_ad[18] ; pci_clk ; ; N/A ; None ; 7.800 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|irdy_oer ; pci_irdyn ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|perr_oe_r ; pci_perrn ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[21] ; pci_ad[21] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[20] ; pci_ad[20] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[19] ; pci_ad[19] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[17] ; pci_ad[17] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[16] ; pci_ad[16] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[6] ; pci_ad[6] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[5] ; pci_ad[5] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[3] ; pci_ad[3] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[10] ; pci_ad[10] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[1] ; pci_ad[1] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[0] ; pci_ad[0] ; pci_clk ; ; N/A ; None ; 7.700 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[9] ; pci_ad[9] ; pci_clk ; ; N/A ; None ; 7.600 ns ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_cben_or[0] ; pci_cben[0] ; pci_clk ; ; N/A ; None ; 7.600 ns ; scsn_dec_reg_rdata_conf_8 ; LED_GRN ; pci_clk ; ; N/A ; None ; 7.500 ns ; scsn_dec_reg_rdata_conf_15 ; digital_io[15] ; pci_clk ; ; N/A ; None ; 7.500 ns ; scsn_dec_reg_rdata_conf_12 ; digital_io[12] ; pci_clk ; ; N/A ; None ; 7.500 ns ; scsn_dec_reg_rdata_conf_11 ; digital_io[11] ; pci_clk ; ; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; +-----------------------------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------+----------------+------------+ +--------------------------------------------------------------------+ ; tpd ; +-------+-------------------+-----------------+--------+-------------+ ; Slack ; Required P2P Time ; Actual P2P Time ; From ; To ; +-------+-------------------+-----------------+--------+-------------+ ; N/A ; None ; 7.900 ns ; CLK50M ; LVDS_out[0] ; +-------+-------------------+-----------------+--------+-------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; th ; +-----------------------------------------+-----------------------------------------------------+-----------+---------------+-----------------------------------------------------------------------------------------------------------------+----------+ ; Minimum Slack ; Required th ; Actual th ; From ; To ; To Clock ; +-----------------------------------------+-----------------------------------------------------+-----------+---------------+-----------------------------------------------------------------------------------------------------------------+----------+ ; N/A ; None ; -2.200 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LXFR_r[2] ; pci_clk ; ; N/A ; None ; -2.300 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r2 ; pci_clk ; ; N/A ; None ; -2.300 ns ; pci_ad[12] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[12] ; pci_clk ; ; N/A ; None ; -2.300 ns ; pci_ad[12] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[12] ; pci_clk ; ; N/A ; None ; -2.300 ns ; pci_ad[7] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[7] ; pci_clk ; ; N/A ; None ; -2.400 ns ; pci_ad[15] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[15] ; pci_clk ; ; N/A ; None ; -2.400 ns ; pci_ad[15] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[15] ; pci_clk ; ; N/A ; None ; -2.500 ns ; pci_par ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_pk:parity_Chk|serr_or ; pci_clk ; ; N/A ; None ; -2.500 ns ; pci_par ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_pk:parity_Chk|perr_det_setR_r3 ; pci_clk ; ; N/A ; None ; -2.600 ns ; pci_ad[7] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[7] ; pci_clk ; ; N/A ; None ; -2.700 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|TS_TURN_AR ; pci_clk ; ; N/A ; None ; -2.700 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_ADR ; pci_clk ; ; N/A ; None ; -2.700 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LXFR_r[1] ; pci_clk ; ; N/A ; None ; -2.700 ns ; pci_ad[11] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[11] ; pci_clk ; ; N/A ; None ; -2.700 ns ; pci_ad[8] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[8] ; pci_clk ; ; N/A ; None ; -2.800 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|trdy_OR_NOT ; pci_clk ; ; N/A ; None ; -2.800 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r4 ; pci_clk ; ; N/A ; None ; -2.800 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_PXFR_32_r1 ; pci_clk ; ; N/A ; None ; -2.800 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_WAIT_32 ; pci_clk ; ; N/A ; None ; -2.800 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|irdy_oer ; pci_clk ; ; N/A ; None ; -2.800 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|adr_phase_end ; pci_clk ; ; N/A ; None ; -2.800 ns ; pci_ad[3] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[3] ; pci_clk ; ; N/A ; None ; -2.800 ns ; pci_ad[9] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[9] ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r3 ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_LXFR ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_PXFR_r1 ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r3 ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r4 ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|WAIT_wait32 ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|frame_or_not ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|adr_phase ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|DXFR_write ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_ad[13] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[13] ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_ad[11] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[11] ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_ad[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[10] ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_ad[10] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[10] ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_ad[9] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[9] ; pci_clk ; ; N/A ; None ; -2.900 ns ; pci_ad[8] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[8] ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_ad[31] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[31] ; pci_clk ; ; N/A ; None ; -3.000 ns ; digital_io[7] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[23] ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|devsel_OR_not ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|stop_OR_NOT ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_WAIT ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_PXFR_32_r2 ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_ack_R_r1 ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|TS_DISC ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|frame_IR ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_IDLE_not ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_IDLE_not ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_REQ ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LXFR_r[1] ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_ad[14] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[14] ; pci_clk ; ; N/A ; None ; -3.000 ns ; pci_ad[14] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[14] ; pci_clk ; ; N/A ; None ; -3.100 ns ; pci_ad[30] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[30] ; pci_clk ; ; N/A ; None ; -3.100 ns ; pci_ad[20] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[20] ; pci_clk ; ; N/A ; None ; -3.100 ns ; pci_idsel ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|idsel_IR ; pci_clk ; ; N/A ; None ; -3.100 ns ; digital_io[7] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[23] ; pci_clk ; ; N/A ; None ; -3.100 ns ; digital_io[5] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[21] ; pci_clk ; ; N/A ; None ; -3.100 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|stop_OR_NOT ; pci_clk ; ; N/A ; None ; -3.100 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|trdy_OR_NOT ; pci_clk ; ; N/A ; None ; -3.100 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_PARK ; pci_clk ; ; N/A ; None ; -3.100 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|par_oeR ; pci_clk ; ; N/A ; None ; -3.100 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_HOLD ; pci_clk ; ; N/A ; None ; -3.100 ns ; pci_ad[13] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[13] ; pci_clk ; ; N/A ; None ; -3.100 ns ; pci_ad[6] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[6] ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_ad[25] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[25] ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_ad[22] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[22] ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_ad[21] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[21] ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_ad[20] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[20] ; pci_clk ; ; N/A ; None ; -3.200 ns ; digital_io[5] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[21] ; pci_clk ; ; N/A ; None ; -3.200 ns ; digital_io[4] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[20] ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_ad[29] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[29] ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|TS_DXFR ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|dac_cyc_strobe ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|latcntr_toR ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_ad[5] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[5] ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_ad[5] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[5] ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_ad[4] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[4] ; pci_clk ; ; N/A ; None ; -3.200 ns ; pci_ad[4] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[4] ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_ad[31] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[31] ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_ad[30] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[30] ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_ad[25] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[25] ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_ad[24] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[24] ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_ad[23] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[23] ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_ad[22] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[22] ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_ad[21] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[21] ; pci_clk ; ; N/A ; None ; -3.300 ns ; digital_io[4] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[20] ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_ad[29] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[29] ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_DONE ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_ENA ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lm_adr_ack_R ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|park ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LLWAIT_r1 ; pci_clk ; ; N/A ; None ; -3.300 ns ; pci_ad[6] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[6] ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_perrn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|perr_rep_setR ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_ad[24] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[24] ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_ad[23] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[23] ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LLXFR_r1 ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[29] ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_ad[2] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[2] ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_ad[2] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[2] ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_ad[3] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[3] ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_ad[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[1] ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_ad[1] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[1] ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_ad[0] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[0] ; pci_clk ; ; N/A ; None ; -3.400 ns ; pci_ad[0] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[0] ; pci_clk ; ; N/A ; None ; -3.500 ns ; TDO ; scsn_jtg_jtgrcv_reg_seribf_i_0 ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_ad[26] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[26] ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_ad[26] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[26] ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_ad[19] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[19] ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_ad[18] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[18] ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_ad[17] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[17] ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_ad[17] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[17] ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_ad[16] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[16] ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_ad[16] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[16] ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[29] ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LW_LXFR ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_PXFR_32_r1 ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_HOLD ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|tabrt_set ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|DXFR_write ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[28] ; pci_clk ; ; N/A ; None ; -3.500 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LLXFR_r1 ; pci_clk ; ; N/A ; None ; -3.600 ns ; TDO ; scsn_jtg_jtgrcv_reg_seribf_t_1 ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_ad[27] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[27] ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_ad[27] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[27] ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_ad[19] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[19] ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_ad[18] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[18] ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LW_DONE ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LW_WAIT ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_LXFR ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_PXFR_r1 ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_WAIT_32 ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_32_r[2] ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|cbe_oer_not ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_DXFR ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|tabrt_set ; pci_clk ; ; N/A ; None ; -3.600 ns ; pci_ad[28] ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_IR_data[28] ; pci_clk ; ; N/A ; None ; -3.700 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[28] ; pci_clk ; ; N/A ; None ; -3.700 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|WAIT_wait32 ; pci_clk ; ; N/A ; None ; -3.700 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|adoe ; pci_clk ; ; N/A ; None ; -3.700 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|devsel_OR_not ; pci_clk ; ; N/A ; None ; -3.700 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_sr:burst_trans|REG ; pci_clk ; ; N/A ; None ; -3.700 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_TAR ; pci_clk ; ; N/A ; None ; -3.700 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LLWAIT_r1 ; pci_clk ; ; N/A ; None ; -3.700 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_PXFR_r2 ; pci_clk ; ; N/A ; None ; -3.700 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_PXFR_r1 ; pci_clk ; ; N/A ; None ; -3.700 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_32_r[1] ; pci_clk ; ; N/A ; None ; -3.800 ns ; LVDS_in[3] ; reg_d_in_1 ; CLK50M ; ; N/A ; None ; -3.800 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|idle_reg ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|park ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|pcimt32_sr:burst_trans|REG ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|idle_reg ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|park ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_WAIT ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_framen ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_PXFR_32_r2 ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|irdy_or_not ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[0] ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|devselR ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[2] ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|lpm_counter:devsel_cntr|alt_counter_f10ke:wysi_counter|q[1] ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LWAIT ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_TAR ; pci_clk ; ; N/A ; None ; -3.800 ns ; pci_par ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_pk:parity_Chk|perr_or_not ; pci_clk ; ; N/A ; None ; -3.900 ns ; pci_gntn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_clk ; ; N/A ; None ; -3.900 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LPXFR_r1 ; pci_clk ; ; N/A ; None ; -3.900 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|tabrt_set ; pci_clk ; ; N/A ; None ; -3.900 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_WAIT_32_r[2] ; pci_clk ; ; N/A ; None ; -3.900 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_32_r[3] ; pci_clk ; ; N/A ; None ; -3.900 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LLWAIT_r2 ; pci_clk ; ; N/A ; None ; -3.900 ns ; pci_par ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_pk:parity_Chk|perr_det_setR_r1 ; pci_clk ; ; N/A ; None ; -4.000 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|devsel_toR ; pci_clk ; ; N/A ; None ; -4.000 ns ; pci_devseln ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_DXFR_32_r[2] ; pci_clk ; ; N/A ; None ; -4.000 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_WAIT_32_r[1] ; pci_clk ; ; N/A ; None ; -4.000 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[16] ; pci_clk ; ; N/A ; None ; -4.000 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[17] ; pci_clk ; ; N/A ; None ; -4.000 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[19] ; pci_clk ; ; N/A ; None ; -4.000 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LLXFR_r2 ; pci_clk ; ; N/A ; None ; -4.000 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LWAIT ; pci_clk ; ; N/A ; None ; -4.000 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_LPXFR_r1 ; pci_clk ; ; N/A ; None ; -4.000 ns ; pci_ad[28] ; pci_contr:pci|pci_mt32:pci_mt32_inst|ad_ir_address[28] ; pci_clk ; ; N/A ; None ; -4.100 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[22] ; pci_clk ; ; N/A ; None ; -4.100 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[20] ; pci_clk ; ; N/A ; None ; -4.100 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[21] ; pci_clk ; ; N/A ; None ; -4.100 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_END_r[1] ; pci_clk ; ; N/A ; None ; -4.200 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[23] ; pci_clk ; ; N/A ; None ; -4.200 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[24] ; pci_clk ; ; N/A ; None ; -4.200 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[25] ; pci_clk ; ; N/A ; None ; -4.200 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|perr_vldR ; pci_clk ; ; N/A ; None ; -4.200 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|LR_PXFR_r2 ; pci_clk ; ; N/A ; None ; -4.200 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|ad_oer ; pci_clk ; ; N/A ; None ; -4.200 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|cbe_oer_not ; pci_clk ; ; N/A ; None ; -4.200 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MS_DXFR ; pci_clk ; ; N/A ; None ; -4.200 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[22] ; pci_clk ; ; N/A ; None ; -4.200 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[31] ; pci_clk ; ; N/A ; None ; -4.200 ns ; pci_trdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MR_PXFR_r2 ; pci_clk ; ; N/A ; None ; -4.300 ns ; LVDS_in[2] ; reg_d_in_0 ; CLK50M ; ; N/A ; None ; -4.300 ns ; pci_irdyn ; pci_contr:pci|pci_mt32:pci_mt32_inst|low_ad_or[18] ; pci_clk ; ; N/A ; None ; -4.300 ns ; pci_stopn ; pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LAST_r[1] ; pci_clk ; ; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; +-----------------------------------------+-----------------------------------------------------+-----------+---------------+-----------------------------------------------------------------------------------------------------------------+----------+ +--------------------------+ ; Timing Analyzer Messages ; +--------------------------+ Info: ******************************************************************* Info: Running Quartus II Timing Analyzer Info: Version 5.0 Build 148 04/26/2005 SJ Full Version Info: Processing started: Wed Dec 14 16:16:29 2005 Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off top_pci_scsn -c top_pci_scsn Info: Started post-fitting delay annotation Info: Delay annotation completed successfully Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew Info: Detected ripple clock "lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|q[15]" as buffer Info: Slack time is 9.5 ns for clock "pci_clk" between source register "pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1]" and destination register "scsn_scsn_reg_data_out_3" Info: Fmax is 64.52 MHz (period= 15.5 ns) Info: + Largest register to register requirement is 24.000 ns Info: + Setup relationship between source and destination is 25.000 ns Info: + Latch edge is 25.000 ns Info: Clock period of Destination clock "pci_clk" is 25.000 ns with offset of 0.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Destination register is 1 Info: - Launch edge is 0.000 ns Info: Clock period of Source clock "pci_clk" is 25.000 ns with offset of 0.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Source register is 1 Info: + Largest clock skew is 0.000 ns Info: + Shortest clock path from clock "pci_clk" to destination register is 1.100 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_79; Fanout = 687; CLK Node = 'pci_clk' Info: 2: + IC(0.800 ns) + CELL(0.000 ns) = 1.100 ns; Loc. = LC5_H25; Fanout = 1; REG Node = 'scsn_scsn_reg_data_out_3' Info: Total cell delay = 0.300 ns ( 27.27 % ) Info: Total interconnect delay = 0.800 ns ( 72.73 % ) Info: - Longest clock path from clock "pci_clk" to source register is 1.100 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_79; Fanout = 687; CLK Node = 'pci_clk' Info: 2: + IC(0.800 ns) + CELL(0.000 ns) = 1.100 ns; Loc. = LC1_J32; Fanout = 52; REG Node = 'pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1]' Info: Total cell delay = 0.300 ns ( 27.27 % ) Info: Total interconnect delay = 0.800 ns ( 72.73 % ) Info: - Micro clock to output delay of source is 0.600 ns Info: - Micro setup delay of destination is 0.400 ns Info: - Longest register to register delay is 14.500 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1_J32; Fanout = 52; REG Node = 'pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|no_op_reg[1]' Info: 2: + IC(1.800 ns) + CELL(0.600 ns) = 2.400 ns; Loc. = LC7_J24; Fanout = 42; COMB Node = 'pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_t:trg|lt_adr[2]' Info: 3: + IC(2.200 ns) + CELL(0.800 ns) = 5.400 ns; Loc. = LC1_K27; Fanout = 15; COMB Node = 'ix6058_lc' Info: 4: + IC(2.100 ns) + CELL(0.800 ns) = 8.300 ns; Loc. = LC2_K3; Fanout = 1; COMB Node = 'ix6338~0' Info: 5: + IC(2.400 ns) + CELL(0.700 ns) = 11.400 ns; Loc. = LC5_K46; Fanout = 1; COMB Node = 'ix5876~0' Info: 6: + IC(3.000 ns) + CELL(0.100 ns) = 14.500 ns; Loc. = LC5_H25; Fanout = 1; REG Node = 'scsn_scsn_reg_data_out_3' Info: Total cell delay = 3.000 ns ( 20.69 % ) Info: Total interconnect delay = 11.500 ns ( 79.31 % ) Info: Slack time is -567 ps for clock "CLK50M" between source register "lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2]" and destination register "scsn_scsn_nw_dll_bt0_h1_reg_data_out_0" Info: Fmax is 112.36 MHz (period= 8.9 ns) Info: + Largest register to register requirement is 7.333 ns Info: + Setup relationship between source and destination is 8.333 ns Info: + Latch edge is 8.333 ns Info: Clock period of Destination clock "CLK50M" is 8.333 ns with offset of 0.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Destination register is 1 Info: - Launch edge is 0.000 ns Info: Clock period of Source clock "CLK50M" is 8.333 ns with offset of 0.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Source register is 1 Info: + Largest clock skew is 0.000 ns Info: + Shortest clock path from clock "CLK50M" to destination register is 1.100 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_182; Fanout = 505; CLK Node = 'CLK50M' Info: 2: + IC(0.800 ns) + CELL(0.000 ns) = 1.100 ns; Loc. = LC7_D13; Fanout = 30; REG Node = 'scsn_scsn_nw_dll_bt0_h1_reg_data_out_0' Info: Total cell delay = 0.300 ns ( 27.27 % ) Info: Total interconnect delay = 0.800 ns ( 72.73 % ) Info: - Longest clock path from clock "CLK50M" to source register is 1.100 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_182; Fanout = 505; CLK Node = 'CLK50M' Info: 2: + IC(0.800 ns) + CELL(0.000 ns) = 1.100 ns; Loc. = LC4_D19; Fanout = 3; REG Node = 'lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2]' Info: Total cell delay = 0.300 ns ( 27.27 % ) Info: Total interconnect delay = 0.800 ns ( 72.73 % ) Info: - Micro clock to output delay of source is 0.600 ns Info: - Micro setup delay of destination is 0.400 ns Info: - Longest register to register delay is 7.900 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC4_D19; Fanout = 3; REG Node = 'lpm_counter:scsn_scsn_nw_dll_ib0_bitcounter_ix8|alt_counter_f10ke:wysi_counter|q[2]' Info: 2: + IC(0.400 ns) + CELL(0.800 ns) = 1.200 ns; Loc. = LC1_D19; Fanout = 3; COMB Node = 'ix6026_lc' Info: 3: + IC(0.800 ns) + CELL(0.600 ns) = 2.600 ns; Loc. = LC4_D16; Fanout = 10; COMB Node = 'ix6330~0' Info: 4: + IC(0.900 ns) + CELL(0.800 ns) = 4.300 ns; Loc. = LC6_D13; Fanout = 1; COMB Node = 'ix6073_lc' Info: 5: + IC(0.400 ns) + CELL(0.700 ns) = 5.400 ns; Loc. = LC4_D13; Fanout = 1; COMB Node = 'ix6593' Info: 6: + IC(0.400 ns) + CELL(0.600 ns) = 6.400 ns; Loc. = LC5_D13; Fanout = 1; COMB Node = 'ix6232_lc' Info: 7: + IC(0.400 ns) + CELL(0.600 ns) = 7.400 ns; Loc. = LC3_D13; Fanout = 1; COMB Node = 'ix5910~0' Info: 8: + IC(0.400 ns) + CELL(0.100 ns) = 7.900 ns; Loc. = LC7_D13; Fanout = 30; REG Node = 'scsn_scsn_nw_dll_bt0_h1_reg_data_out_0' Info: Total cell delay = 4.200 ns ( 53.16 % ) Info: Total interconnect delay = 3.700 ns ( 46.84 % ) Warning: Can't achieve timing requirement Clock Setup: 'CLK50M' along 11 path(s). See Report window for details. Info: Slack time is 44.5 ns for clock "scsn_jtg_jtgtms_reg_TCK" between source register "scsn_jtg_jtgsm_reg_PresentState_3" and destination register "scsn_jtg_reg_TDI" Info: Fmax is 90.91 MHz (period= 11.0 ns) Info: + Largest register to register requirement is 48.600 ns Info: + Setup relationship between source and destination is 50.000 ns Info: + Latch edge is 50.000 ns Info: Clock period of Destination clock "scsn_jtg_jtgtms_reg_TCK" is 100.000 ns with , Inverted offset of 50.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Destination register is 1 Info: - Launch edge is 0.000 ns Info: Clock period of Source clock "scsn_jtg_jtgtms_reg_TCK" is 100.000 ns with offset of 0.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Source register is 1 Info: + Largest clock skew is -0.400 ns Info: + Shortest clock path from clock "scsn_jtg_jtgtms_reg_TCK" to destination register is 0.700 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC8_H19; Fanout = 97; CLK Node = 'scsn_jtg_jtgtms_reg_TCK' Info: 2: + IC(0.700 ns) + CELL(0.000 ns) = 0.700 ns; Loc. = LC5_H20; Fanout = 1; REG Node = 'scsn_jtg_reg_TDI' Info: Total interconnect delay = 0.700 ns ( 100.00 % ) Info: - Longest clock path from clock "scsn_jtg_jtgtms_reg_TCK" to source register is 1.100 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC8_H19; Fanout = 97; CLK Node = 'scsn_jtg_jtgtms_reg_TCK' Info: 2: + IC(1.100 ns) + CELL(0.000 ns) = 1.100 ns; Loc. = LC7_H2; Fanout = 5; REG Node = 'scsn_jtg_jtgsm_reg_PresentState_3' Info: Total interconnect delay = 1.100 ns ( 100.00 % ) Info: - Micro clock to output delay of source is 0.600 ns Info: - Micro setup delay of destination is 0.400 ns Info: - Longest register to register delay is 4.100 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC7_H2; Fanout = 5; REG Node = 'scsn_jtg_jtgsm_reg_PresentState_3' Info: 2: + IC(1.700 ns) + CELL(0.600 ns) = 2.300 ns; Loc. = LC2_H26; Fanout = 3; COMB Node = 'ix6063_lc' Info: 3: + IC(1.500 ns) + CELL(0.300 ns) = 4.100 ns; Loc. = LC5_H20; Fanout = 1; REG Node = 'scsn_jtg_reg_TDI' Info: Total cell delay = 0.900 ns ( 21.95 % ) Info: Total interconnect delay = 3.200 ns ( 78.05 % ) Info: Minimum slack time is 600 ps for clock "pci_clk" between source register "scsn_jtg_jtgsnd_reg_ser_i_2" and destination register "scsn_jtg_jtgsnd_reg_ser_i_3" Info: + Shortest register to register delay is 0.500 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC2_H23; Fanout = 1; REG Node = 'scsn_jtg_jtgsnd_reg_ser_i_2' Info: 2: + IC(0.400 ns) + CELL(0.100 ns) = 0.500 ns; Loc. = LC1_H23; Fanout = 1; REG Node = 'scsn_jtg_jtgsnd_reg_ser_i_3' Info: Total cell delay = 0.100 ns ( 20.00 % ) Info: Total interconnect delay = 0.400 ns ( 80.00 % ) Info: - Smallest register to register requirement is -0.100 ns Info: + Hold relationship between source and destination is 0.000 ns Info: + Latch edge is 0.000 ns Info: Clock period of Destination clock "pci_clk" is 25.000 ns with offset of 0.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Destination register is 1 Info: Multicycle Hold factor for Destination register is 1 Info: - Launch edge is 0.000 ns Info: Clock period of Source clock "pci_clk" is 25.000 ns with offset of 0.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Source register is 1 Info: Multicycle Hold factor for Source register is 1 Info: + Smallest clock skew is 0.000 ns Info: + Longest clock path from clock "pci_clk" to destination register is 1.100 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_79; Fanout = 687; CLK Node = 'pci_clk' Info: 2: + IC(0.800 ns) + CELL(0.000 ns) = 1.100 ns; Loc. = LC1_H23; Fanout = 1; REG Node = 'scsn_jtg_jtgsnd_reg_ser_i_3' Info: Total cell delay = 0.300 ns ( 27.27 % ) Info: Total interconnect delay = 0.800 ns ( 72.73 % ) Info: - Shortest clock path from clock "pci_clk" to source register is 1.100 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_79; Fanout = 687; CLK Node = 'pci_clk' Info: 2: + IC(0.800 ns) + CELL(0.000 ns) = 1.100 ns; Loc. = LC2_H23; Fanout = 1; REG Node = 'scsn_jtg_jtgsnd_reg_ser_i_2' Info: Total cell delay = 0.300 ns ( 27.27 % ) Info: Total interconnect delay = 0.800 ns ( 72.73 % ) Info: - Micro clock to output delay of source is 0.600 ns Info: + Micro hold delay of destination is 0.500 ns Info: Minimum slack time is 600 ps for clock "CLK50M" between source register "sg_reg_mx_q" and destination register "sg_reg_mx_q" Info: + Shortest register to register delay is 0.500 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC2_B26; Fanout = 18; REG Node = 'sg_reg_mx_q' Info: 2: + IC(0.400 ns) + CELL(0.100 ns) = 0.500 ns; Loc. = LC2_B26; Fanout = 18; REG Node = 'sg_reg_mx_q' Info: Total cell delay = 0.100 ns ( 20.00 % ) Info: Total interconnect delay = 0.400 ns ( 80.00 % ) Info: - Smallest register to register requirement is -0.100 ns Info: + Hold relationship between source and destination is 0.000 ns Info: + Latch edge is 0.000 ns Info: Clock period of Destination clock "CLK50M" is 8.333 ns with offset of 0.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Destination register is 1 Info: Multicycle Hold factor for Destination register is 1 Info: - Launch edge is 0.000 ns Info: Clock period of Source clock "CLK50M" is 8.333 ns with offset of 0.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Source register is 1 Info: Multicycle Hold factor for Source register is 1 Info: + Smallest clock skew is 0.000 ns Info: + Longest clock path from clock "CLK50M" to destination register is 2.900 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_182; Fanout = 505; CLK Node = 'CLK50M' Info: 2: + IC(0.800 ns) + CELL(0.600 ns) = 1.700 ns; Loc. = LC8_B20; Fanout = 2; REG Node = 'lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|q[15]' Info: 3: + IC(1.200 ns) + CELL(0.000 ns) = 2.900 ns; Loc. = LC2_B26; Fanout = 18; REG Node = 'sg_reg_mx_q' Info: Total cell delay = 0.900 ns ( 31.03 % ) Info: Total interconnect delay = 2.000 ns ( 68.97 % ) Info: - Shortest clock path from clock "CLK50M" to source register is 2.900 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_182; Fanout = 505; CLK Node = 'CLK50M' Info: 2: + IC(0.800 ns) + CELL(0.600 ns) = 1.700 ns; Loc. = LC8_B20; Fanout = 2; REG Node = 'lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|q[15]' Info: 3: + IC(1.200 ns) + CELL(0.000 ns) = 2.900 ns; Loc. = LC2_B26; Fanout = 18; REG Node = 'sg_reg_mx_q' Info: Total cell delay = 0.900 ns ( 31.03 % ) Info: Total interconnect delay = 2.000 ns ( 68.97 % ) Info: - Micro clock to output delay of source is 0.600 ns Info: + Micro hold delay of destination is 0.500 ns Info: Minimum slack time is -1.3 ns for clock "scsn_jtg_jtgtms_reg_TCK" between source register "scsn_jtg_jtgrcv_reg_seribf_t_25" and destination register "scsn_jtg_jtgrcv_reg_seribf_t_26" Info: + Shortest register to register delay is 2.200 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC4_H19; Fanout = 4; REG Node = 'scsn_jtg_jtgrcv_reg_seribf_t_25' Info: 2: + IC(2.000 ns) + CELL(0.200 ns) = 2.200 ns; Loc. = LC5_H42; Fanout = 4; REG Node = 'scsn_jtg_jtgrcv_reg_seribf_t_26' Info: Total cell delay = 0.200 ns ( 9.09 % ) Info: Total interconnect delay = 2.000 ns ( 90.91 % ) Info: - Smallest register to register requirement is 3.500 ns Info: + Hold relationship between source and destination is 0.000 ns Info: + Latch edge is 0.000 ns Info: Clock period of Destination clock "scsn_jtg_jtgtms_reg_TCK" is 100.000 ns with offset of 0.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Destination register is 1 Info: Multicycle Hold factor for Destination register is 1 Info: - Launch edge is 0.000 ns Info: Clock period of Source clock "scsn_jtg_jtgtms_reg_TCK" is 100.000 ns with offset of 0.000 ns and duty cycle of 50 Info: Multicycle Setup factor for Source register is 1 Info: Multicycle Hold factor for Source register is 1 Info: + Smallest clock skew is 3.600 ns Info: + Longest clock path from clock "scsn_jtg_jtgtms_reg_TCK" to destination register is 4.000 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC8_H19; Fanout = 97; CLK Node = 'scsn_jtg_jtgtms_reg_TCK' Info: 2: + IC(4.000 ns) + CELL(0.000 ns) = 4.000 ns; Loc. = LC5_H42; Fanout = 4; REG Node = 'scsn_jtg_jtgrcv_reg_seribf_t_26' Info: Total interconnect delay = 4.000 ns ( 100.00 % ) Info: - Shortest clock path from clock "scsn_jtg_jtgtms_reg_TCK" to source register is 0.400 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC8_H19; Fanout = 97; CLK Node = 'scsn_jtg_jtgtms_reg_TCK' Info: 2: + IC(0.400 ns) + CELL(0.000 ns) = 0.400 ns; Loc. = LC4_H19; Fanout = 4; REG Node = 'scsn_jtg_jtgrcv_reg_seribf_t_25' Info: Total interconnect delay = 0.400 ns ( 100.00 % ) Info: - Micro clock to output delay of source is 0.600 ns Info: + Micro hold delay of destination is 0.500 ns Warning: Can't achieve minimum setup and hold requirement scsn_jtg_jtgtms_reg_TCK along 4 path(s). See Report window for details. Info: tsu for register "pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[31]" (data pin = "digital_io[15]", clock pin = "pci_clk") is 8.900 ns Info: + Longest pin to register delay is 9.600 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_14; Fanout = 1; PIN Node = 'digital_io[15]' Info: 2: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = IOC_14; Fanout = 1; COMB Node = 'digital_io_15' Info: 3: + IC(3.500 ns) + CELL(0.800 ns) = 6.300 ns; Loc. = LC3_H44; Fanout = 2; COMB Node = 'ix5994_lc' Info: 4: + IC(3.000 ns) + CELL(0.300 ns) = 9.600 ns; Loc. = LC1_L11; Fanout = 1; REG Node = 'pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[31]' Info: Total cell delay = 3.100 ns ( 32.29 % ) Info: Total interconnect delay = 6.500 ns ( 67.71 % ) Info: + Micro setup delay of destination is 0.400 ns Info: - Shortest clock path from clock "pci_clk" to destination register is 1.100 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_79; Fanout = 687; CLK Node = 'pci_clk' Info: 2: + IC(0.800 ns) + CELL(0.000 ns) = 1.100 ns; Loc. = LC1_L11; Fanout = 1; REG Node = 'pci_contr:pci|pci_mt32:pci_mt32_inst|low_data_out_HR[31]' Info: Total cell delay = 0.300 ns ( 27.27 % ) Info: Total interconnect delay = 0.800 ns ( 72.73 % ) Info: tco from clock "CLK50M" to destination pin "R7S[1]" through register "sg_reg_mx_q" is 19.700 ns Info: + Longest clock path from clock "CLK50M" to source register is 2.900 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_182; Fanout = 505; CLK Node = 'CLK50M' Info: 2: + IC(0.800 ns) + CELL(0.600 ns) = 1.700 ns; Loc. = LC8_B20; Fanout = 2; REG Node = 'lpm_counter:scsn_cdiv|alt_counter_f10ke:wysi_counter|q[15]' Info: 3: + IC(1.200 ns) + CELL(0.000 ns) = 2.900 ns; Loc. = LC2_B26; Fanout = 18; REG Node = 'sg_reg_mx_q' Info: Total cell delay = 0.900 ns ( 31.03 % ) Info: Total interconnect delay = 2.000 ns ( 68.97 % ) Info: + Micro clock to output delay of source is 0.600 ns Info: + Longest register to pin delay is 16.200 ns Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC2_B26; Fanout = 18; REG Node = 'sg_reg_mx_q' Info: 2: + IC(2.500 ns) + CELL(0.700 ns) = 3.200 ns; Loc. = LC1_B51; Fanout = 4; COMB Node = 'ix6440' Info: 3: + IC(1.300 ns) + CELL(0.600 ns) = 5.100 ns; Loc. = LC4_B50; Fanout = 6; COMB Node = 'ix5988_lc' Info: 4: + IC(1.700 ns) + CELL(0.600 ns) = 7.400 ns; Loc. = LC5_B29; Fanout = 1; COMB Node = 'ix6442' Info: 5: + IC(0.400 ns) + CELL(0.600 ns) = 8.400 ns; Loc. = LC2_B29; Fanout = 3; COMB Node = 'ix5825_lc' Info: 6: + IC(1.600 ns) + CELL(0.500 ns) = 10.500 ns; Loc. = LC2_B38; Fanout = 1; COMB Node = 'ix7502_lc' Info: 7: + IC(0.300 ns) + CELL(5.400 ns) = 16.200 ns; Loc. = PIN_192; Fanout = 0; PIN Node = 'R7S[1]' Info: Total cell delay = 8.400 ns ( 51.85 % ) Info: Total interconnect delay = 7.800 ns ( 48.15 % ) Info: Longest tpd from source pin "CLK50M" to destination pin "LVDS_out[0]" is 7.900 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_182; Fanout = 505; CLK Node = 'CLK50M' Info: 2: + IC(1.500 ns) + CELL(0.500 ns) = 2.300 ns; Loc. = LC2_A52; Fanout = 1; COMB Node = 'lc2' Info: 3: + IC(0.200 ns) + CELL(5.400 ns) = 7.900 ns; Loc. = PIN_207; Fanout = 0; PIN Node = 'LVDS_out[0]' Info: Total cell delay = 6.200 ns ( 78.48 % ) Info: Total interconnect delay = 1.700 ns ( 21.52 % ) Info: th for register "pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LXFR_r[2]" (data pin = "pci_gntn", clock pin = "pci_clk") is -2.200 ns Info: + Longest clock path from clock "pci_clk" to destination register is 1.100 ns Info: 1: + IC(0.000 ns) + CELL(0.300 ns) = 0.300 ns; Loc. = PIN_79; Fanout = 687; CLK Node = 'pci_clk' Info: 2: + IC(0.800 ns) + CELL(0.000 ns) = 1.100 ns; Loc. = LC4_J29; Fanout = 1; REG Node = 'pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LXFR_r[2]' Info: Total cell delay = 0.300 ns ( 27.27 % ) Info: Total interconnect delay = 0.800 ns ( 72.73 % ) Info: + Micro hold delay of destination is 0.500 ns Info: - Shortest pin to register delay is 3.800 ns Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_68; Fanout = 18; PIN Node = 'pci_gntn' Info: 2: + IC(1.600 ns) + CELL(0.200 ns) = 3.800 ns; Loc. = LC4_J29; Fanout = 1; REG Node = 'pci_contr:pci|pci_mt32:pci_mt32_inst|pcimt32_m:mstr|MW_LXFR_r[2]' Info: Total cell delay = 2.200 ns ( 57.89 % ) Info: Total interconnect delay = 1.600 ns ( 42.11 % ) Critical Warning: Timing requirements were not met. See Report window for details. Info: Quartus II Timing Analyzer was successful. 0 errors, 4 warnings Info: Processing ended: Wed Dec 14 16:16:35 2005 Info: Elapsed time: 00:00:07