----------------------------------------------------------------------
-- HAMMING ENCODER (5,2) & (6,3) & (7,4)
----------------------------------------------------------------------
LIBRARY IEEE;
USE  IEEE.STD_LOGIC_1164.all;

entity hamm34enc67 is
generic( Nbits : Integer range 2 to 4 := 4);
port
        (data : in  std_logic_vector(Nbits-1 downto 0);
         code : out std_logic_vector(Nbits+3 downto 0)
        );
end hamm34enc67;

architecture a of hamm34enc67 is
signal hamming : std_logic_vector(2 downto 0);
signal parity  : std_logic;
-- this code was generated by a program of Rolf Schneider
begin
h2: if Nbits=2 generate
  -- HAMMING BITS for 3 data bits:
  hamming(0) <=     data( 0) xor data( 1) ;
  hamming(1) <=     data( 0);
  hamming(2) <=     '0';
  -- PARITY
  parity <= data( 1) xor data( 0) xor hamming(1) xor hamming(0) ;
  -- OUTPUT CODE
  code <= parity & data( 1) & hamming(2) & data( 0) & hamming(1) & hamming(0) ;
        end generate;
h3: if Nbits=3 generate
  -- HAMMING BITS for 3 data bits:
  hamming(0) <=     data( 0) xor data( 1) ;
  hamming(1) <=     data( 0) xor data( 2) ;
  hamming(2) <=     data( 1) xor data( 2) ;
  -- PARITY
  parity <= data( 2) xor data( 1) xor hamming(2) xor data( 0) xor hamming(1) xor hamming(0) ;
  -- OUTPUT CODE
  code <= parity & data( 2) & data( 1) & hamming(2) & data( 0) & hamming(1) & hamming(0) ;
        end generate;
h4:     if Nbits=4 generate
  -- HAMMING BITS for 4 data bits
  hamming(0) <=     data( 0) xor data( 1) xor data( 3) ;
  hamming(1) <=     data( 0) xor data( 2) xor data( 3) ;
  hamming(2) <=     data( 1) xor data( 2) xor data( 3) ;
  -- PARITY
  parity <= data( 3) xor data( 2) xor data( 1) xor hamming(2) xor data( 0) xor hamming(1) xor hamming(0) ;
  -- OUTPUT CODE
  code <= parity & data( 3) & data( 2) & data( 1) & hamming(2) & data( 0) & hamming(1) & hamming(0) ;
        end generate;
end;