--E4_q[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:devsel_cntr|alt_counter_f10ke:wysi_counter|q[2] at LC7_C9 --operation mode is clrb_cntr E4_q[2]_lut_out = ((E4_q[2] $ (K1_$00058 & E4L5) & A1L352) # (~GND & !A1L352)) & K1L413; E4_q[2] = DFFEA(E4_q[2]_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --E4_q[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:devsel_cntr|alt_counter_f10ke:wysi_counter|q[1] at LC6_C9 --operation mode is clrb_cntr E4_q[1]_lut_out = ((E4_q[1] $ (K1_$00058 & E4L3) & A1L352) # (~GND & !A1L352)) & K1L413; E4_q[1] = DFFEA(E4_q[1]_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --E4L5 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:devsel_cntr|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC6_C9 --operation mode is clrb_cntr E4L5 = CARRY(E4_q[1] & E4L3); --E4_q[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:devsel_cntr|alt_counter_f10ke:wysi_counter|q[0] at LC5_C9 --operation mode is clrb_cntr E4_q[0]_lut_out = ((K1_$00058 $ E4_q[0] & A1L352) # (~GND & !A1L352)) & K1L413; E4_q[0] = DFFEA(E4_q[0]_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --E4L3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:devsel_cntr|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC5_C9 --operation mode is clrb_cntr E4L3 = CARRY(E4_q[0]); --E5_q[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|q[7] at LC8_J21 --operation mode is clrb_cntr E5_q[7]_lut_out = ((E5_q[7] $ (K1_latcntr_cnt_en & E5L51) & K1L413) # (Q1_lat_tmr_reg[4] & !K1L413)) & K1_$00054; E5_q[7] = DFFEA(E5_q[7]_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --E5_q[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|q[6] at LC7_J21 --operation mode is clrb_cntr E5_q[6]_lut_out = ((E5_q[6] $ (K1_latcntr_cnt_en & E5L31) & K1L413) # (Q1_lat_tmr_reg[3] & !K1L413)) & K1_$00054; E5_q[6] = DFFEA(E5_q[6]_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --E5L51 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT at LC7_J21 --operation mode is clrb_cntr E5L51 = CARRY(!E5_q[6] & E5L31); --E5_q[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|q[5] at LC6_J21 --operation mode is clrb_cntr E5_q[5]_lut_out = ((E5_q[5] $ (K1_latcntr_cnt_en & E5L11) & K1L413) # (Q1_lat_tmr_reg[2] & !K1L413)) & K1_$00054; E5_q[5] = DFFEA(E5_q[5]_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --E5L31 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT at LC6_J21 --operation mode is clrb_cntr E5L31 = CARRY(!E5_q[5] & E5L11); --E5_q[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|q[4] at LC5_J21 --operation mode is clrb_cntr E5_q[4]_lut_out = ((E5_q[4] $ (K1_latcntr_cnt_en & E5L9) & K1L413) # (Q1_lat_tmr_reg[1] & !K1L413)) & K1_$00054; E5_q[4] = DFFEA(E5_q[4]_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --E5L11 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT at LC5_J21 --operation mode is clrb_cntr E5L11 = CARRY(!E5_q[4] & E5L9); --E5_q[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|q[3] at LC4_J21 --operation mode is clrb_cntr E5_q[3]_lut_out = ((E5_q[3] $ (K1_latcntr_cnt_en & E5L7) & K1L413) # (Q1_lat_tmr_reg[0] & !K1L413)) & K1_$00054; E5_q[3] = DFFEA(E5_q[3]_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --E5L9 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT at LC4_J21 --operation mode is clrb_cntr E5L9 = CARRY(!E5_q[3] & E5L7); --E5_q[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|q[2] at LC3_J21 --operation mode is clrb_cntr E5_q[2]_lut_out = ((E5_q[2] $ (K1_latcntr_cnt_en & E5L5) & K1L413) # (~GND & !K1L413)) & K1_$00054; E5_q[2] = DFFEA(E5_q[2]_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --E5L7 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC3_J21 --operation mode is clrb_cntr E5L7 = CARRY(!E5_q[2] & E5L5); --E5_q[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|q[1] at LC2_J21 --operation mode is clrb_cntr E5_q[1]_lut_out = ((E5_q[1] $ (K1_latcntr_cnt_en & E5L3) & K1L413) # (~GND & !K1L413)) & K1_$00054; E5_q[1] = DFFEA(E5_q[1]_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --E5L5 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC2_J21 --operation mode is clrb_cntr E5L5 = CARRY(!E5_q[1] & E5L3); --E5_q[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|q[0] at LC1_J21 --operation mode is clrb_cntr E5_q[0]_lut_out = ((K1_latcntr_cnt_en $ E5_q[0] & K1L413) # (~GND & !K1L413)) & K1_$00054; E5_q[0] = DFFEA(E5_q[0]_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --E5L3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|LPM_COUNTER:latcntr|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC1_J21 --operation mode is clrb_cntr E5L3 = CARRY(!E5_q[0]); --E3_q[11] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[11] at LC6_J26 --operation mode is clrb_cntr E3_q[11]_lut_out = (E3_q[11] $ (!imm_dpm_dp_p_reg_we_p & E3L32)) & VCC; E3_q[11] = DFFEA(E3_q[11]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3_q[10] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[10] at LC5_J26 --operation mode is clrb_cntr E3_q[10]_lut_out = (E3_q[10] $ (!imm_dpm_dp_p_reg_we_p & E3L12)) & VCC; E3_q[10] = DFFEA(E3_q[10]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3L32 is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[10]~COUT at LC5_J26 --operation mode is clrb_cntr E3L32 = CARRY(E3_q[10] & E3L12); --E3_q[9] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[9] at LC4_J26 --operation mode is clrb_cntr E3_q[9]_lut_out = (E3_q[9] $ (!imm_dpm_dp_p_reg_we_p & E3L91)) & VCC; E3_q[9] = DFFEA(E3_q[9]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3L12 is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT at LC4_J26 --operation mode is clrb_cntr E3L12 = CARRY(E3_q[9] & E3L91); --E3_q[8] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[8] at LC3_J26 --operation mode is clrb_cntr E3_q[8]_lut_out = (E3_q[8] $ (!imm_dpm_dp_p_reg_we_p & E3L71)) & VCC; E3_q[8] = DFFEA(E3_q[8]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3L91 is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT at LC3_J26 --operation mode is clrb_cntr E3L91 = CARRY(E3_q[8] & E3L71); --E3_q[7] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[7] at LC2_J26 --operation mode is clrb_cntr E3_q[7]_lut_out = (E3_q[7] $ (!imm_dpm_dp_p_reg_we_p & E3L51)) & VCC; E3_q[7] = DFFEA(E3_q[7]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3L71 is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT at LC2_J26 --operation mode is clrb_cntr E3L71 = CARRY(E3_q[7] & E3L51); --E3_q[6] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[6] at LC1_J26 --operation mode is clrb_cntr E3_q[6]_lut_out = (E3_q[6] $ (!imm_dpm_dp_p_reg_we_p & E3L31)) & VCC; E3_q[6] = DFFEA(E3_q[6]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3L51 is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT at LC1_J26 --operation mode is clrb_cntr E3L51 = CARRY(E3_q[6] & E3L31); --E3_q[5] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[5] at LC8_J24 --operation mode is clrb_cntr E3_q[5]_lut_out = (E3_q[5] $ (!imm_dpm_dp_p_reg_we_p & E3L11)) & VCC; E3_q[5] = DFFEA(E3_q[5]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3L31 is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT at LC8_J24 --operation mode is clrb_cntr E3L31 = CARRY(E3_q[5] & E3L11); --E3_q[4] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[4] at LC7_J24 --operation mode is clrb_cntr E3_q[4]_lut_out = (E3_q[4] $ (!imm_dpm_dp_p_reg_we_p & E3L9)) & VCC; E3_q[4] = DFFEA(E3_q[4]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3L11 is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT at LC7_J24 --operation mode is clrb_cntr E3L11 = CARRY(E3_q[4] & E3L9); --E3_q[3] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[3] at LC6_J24 --operation mode is clrb_cntr E3_q[3]_lut_out = (E3_q[3] $ (!imm_dpm_dp_p_reg_we_p & E3L7)) & VCC; E3_q[3] = DFFEA(E3_q[3]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3L9 is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT at LC6_J24 --operation mode is clrb_cntr E3L9 = CARRY(E3_q[3] & E3L7); --E3_q[2] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[2] at LC5_J24 --operation mode is clrb_cntr E3_q[2]_lut_out = (E3_q[2] $ (!imm_dpm_dp_p_reg_we_p & E3L5)) & VCC; E3_q[2] = DFFEA(E3_q[2]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3L7 is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC5_J24 --operation mode is clrb_cntr E3L7 = CARRY(E3_q[2] & E3L5); --E3_q[1] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[1] at LC4_J24 --operation mode is clrb_cntr E3_q[1]_lut_out = (E3_q[1] $ (!imm_dpm_dp_p_reg_we_p & E3L3)) & VCC; E3_q[1] = DFFEA(E3_q[1]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3L5 is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC4_J24 --operation mode is clrb_cntr E3L5 = CARRY(E3_q[1] & E3L3); --E3_q[0] is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|q[0] at LC3_J24 --operation mode is clrb_cntr E3_q[0]_lut_out = (imm_dpm_dp_p_reg_we_p $ !E3_q[0]) & VCC; E3_q[0] = DFFEA(E3_q[0]_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E3L3 is LPM_COUNTER:imm_dpm_dp_p_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC3_J24 --operation mode is clrb_cntr E3L3 = CARRY(E3_q[0]); --E2_q[11] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[11] at LC6_K26 --operation mode is clrb_cntr E2_q[11]_lut_out = (E2_q[11] $ (!imm_dpm_dp_n_reg_we_p & E2L32)) & VCC; E2_q[11] = DFFEA(E2_q[11]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2_q[10] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[10] at LC5_K26 --operation mode is clrb_cntr E2_q[10]_lut_out = (E2_q[10] $ (!imm_dpm_dp_n_reg_we_p & E2L12)) & VCC; E2_q[10] = DFFEA(E2_q[10]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2L32 is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[10]~COUT at LC5_K26 --operation mode is clrb_cntr E2L32 = CARRY(E2_q[10] & E2L12); --E2_q[9] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[9] at LC4_K26 --operation mode is clrb_cntr E2_q[9]_lut_out = (E2_q[9] $ (!imm_dpm_dp_n_reg_we_p & E2L91)) & VCC; E2_q[9] = DFFEA(E2_q[9]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2L12 is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT at LC4_K26 --operation mode is clrb_cntr E2L12 = CARRY(E2_q[9] & E2L91); --E2_q[8] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[8] at LC3_K26 --operation mode is clrb_cntr E2_q[8]_lut_out = (E2_q[8] $ (!imm_dpm_dp_n_reg_we_p & E2L71)) & VCC; E2_q[8] = DFFEA(E2_q[8]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2L91 is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT at LC3_K26 --operation mode is clrb_cntr E2L91 = CARRY(E2_q[8] & E2L71); --E2_q[7] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[7] at LC2_K26 --operation mode is clrb_cntr E2_q[7]_lut_out = (E2_q[7] $ (!imm_dpm_dp_n_reg_we_p & E2L51)) & VCC; E2_q[7] = DFFEA(E2_q[7]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2L71 is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT at LC2_K26 --operation mode is clrb_cntr E2L71 = CARRY(E2_q[7] & E2L51); --E2_q[6] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[6] at LC1_K26 --operation mode is clrb_cntr E2_q[6]_lut_out = (E2_q[6] $ (!imm_dpm_dp_n_reg_we_p & E2L31)) & VCC; E2_q[6] = DFFEA(E2_q[6]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2L51 is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT at LC1_K26 --operation mode is clrb_cntr E2L51 = CARRY(E2_q[6] & E2L31); --E2_q[5] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[5] at LC8_K24 --operation mode is clrb_cntr E2_q[5]_lut_out = (E2_q[5] $ (!imm_dpm_dp_n_reg_we_p & E2L11)) & VCC; E2_q[5] = DFFEA(E2_q[5]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2L31 is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT at LC8_K24 --operation mode is clrb_cntr E2L31 = CARRY(E2_q[5] & E2L11); --E2_q[4] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[4] at LC7_K24 --operation mode is clrb_cntr E2_q[4]_lut_out = (E2_q[4] $ (!imm_dpm_dp_n_reg_we_p & E2L9)) & VCC; E2_q[4] = DFFEA(E2_q[4]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2L11 is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT at LC7_K24 --operation mode is clrb_cntr E2L11 = CARRY(E2_q[4] & E2L9); --E2_q[3] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[3] at LC6_K24 --operation mode is clrb_cntr E2_q[3]_lut_out = (E2_q[3] $ (!imm_dpm_dp_n_reg_we_p & E2L7)) & VCC; E2_q[3] = DFFEA(E2_q[3]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2L9 is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT at LC6_K24 --operation mode is clrb_cntr E2L9 = CARRY(E2_q[3] & E2L7); --E2_q[2] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[2] at LC5_K24 --operation mode is clrb_cntr E2_q[2]_lut_out = (E2_q[2] $ (!imm_dpm_dp_n_reg_we_p & E2L5)) & VCC; E2_q[2] = DFFEA(E2_q[2]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2L7 is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC5_K24 --operation mode is clrb_cntr E2L7 = CARRY(E2_q[2] & E2L5); --E2_q[1] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[1] at LC4_K24 --operation mode is clrb_cntr E2_q[1]_lut_out = (E2_q[1] $ (!imm_dpm_dp_n_reg_we_p & E2L3)) & VCC; E2_q[1] = DFFEA(E2_q[1]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2L5 is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC4_K24 --operation mode is clrb_cntr E2L5 = CARRY(E2_q[1] & E2L3); --E2_q[0] is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|q[0] at LC3_K24 --operation mode is clrb_cntr E2_q[0]_lut_out = (imm_dpm_dp_n_reg_we_p $ !E2_q[0]) & VCC; E2_q[0] = DFFEA(E2_q[0]_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , , , ); --E2L3 is LPM_COUNTER:imm_dpm_dp_n_wa_p|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC3_K24 --operation mode is clrb_cntr E2L3 = CARRY(E2_q[0]); --E1_q[15] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[15] at LC8_L7 --operation mode is up_dn_cntr E1_q[15]_lut_out = E1_q[15] $ E1L13; E1_q[15] = DFFEA(E1_q[15]_lut_out, GLOBAL(pci_clk), , , , , ); --E1_q[14] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[14] at LC7_L7 --operation mode is up_dn_cntr E1_q[14]_lut_out = E1_q[14] $ E1L92; E1_q[14] = DFFEA(E1_q[14]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L13 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[14]~COUT at LC7_L7 --operation mode is up_dn_cntr E1L13 = CARRY(E1_q[14] & E1L92); --E1_q[13] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[13] at LC6_L7 --operation mode is up_dn_cntr E1_q[13]_lut_out = E1_q[13] $ E1L72; E1_q[13] = DFFEA(E1_q[13]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L92 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[13]~COUT at LC6_L7 --operation mode is up_dn_cntr E1L92 = CARRY(E1_q[13] & E1L72); --E1_q[12] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[12] at LC5_L7 --operation mode is up_dn_cntr E1_q[12]_lut_out = E1_q[12] $ E1L52; E1_q[12] = DFFEA(E1_q[12]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L72 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[12]~COUT at LC5_L7 --operation mode is up_dn_cntr E1L72 = CARRY(E1_q[12] & E1L52); --E1_q[11] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[11] at LC4_L7 --operation mode is up_dn_cntr E1_q[11]_lut_out = E1_q[11] $ E1L32; E1_q[11] = DFFEA(E1_q[11]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L52 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[11]~COUT at LC4_L7 --operation mode is up_dn_cntr E1L52 = CARRY(E1_q[11] & E1L32); --E1_q[10] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[10] at LC3_L7 --operation mode is up_dn_cntr E1_q[10]_lut_out = E1_q[10] $ E1L12; E1_q[10] = DFFEA(E1_q[10]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L32 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[10]~COUT at LC3_L7 --operation mode is up_dn_cntr E1L32 = CARRY(E1_q[10] & E1L12); --E1_q[9] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[9] at LC2_L7 --operation mode is up_dn_cntr E1_q[9]_lut_out = E1_q[9] $ E1L91; E1_q[9] = DFFEA(E1_q[9]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L12 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT at LC2_L7 --operation mode is up_dn_cntr E1L12 = CARRY(E1_q[9] & E1L91); --E1_q[8] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[8] at LC1_L7 --operation mode is up_dn_cntr E1_q[8]_lut_out = E1_q[8] $ E1L71; E1_q[8] = DFFEA(E1_q[8]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L91 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT at LC1_L7 --operation mode is up_dn_cntr E1L91 = CARRY(E1_q[8] & E1L71); --E1_q[7] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[7] at LC8_L5 --operation mode is up_dn_cntr E1_q[7]_lut_out = E1_q[7] $ E1L51; E1_q[7] = DFFEA(E1_q[7]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L71 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT at LC8_L5 --operation mode is up_dn_cntr E1L71 = CARRY(E1_q[7] & E1L51); --E1_q[6] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[6] at LC7_L5 --operation mode is up_dn_cntr E1_q[6]_lut_out = E1_q[6] $ E1L31; E1_q[6] = DFFEA(E1_q[6]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L51 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT at LC7_L5 --operation mode is up_dn_cntr E1L51 = CARRY(E1_q[6] & E1L31); --E1_q[5] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[5] at LC6_L5 --operation mode is up_dn_cntr E1_q[5]_lut_out = E1_q[5] $ E1L11; E1_q[5] = DFFEA(E1_q[5]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L31 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT at LC6_L5 --operation mode is up_dn_cntr E1L31 = CARRY(E1_q[5] & E1L11); --E1_q[4] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[4] at LC5_L5 --operation mode is up_dn_cntr E1_q[4]_lut_out = E1_q[4] $ E1L9; E1_q[4] = DFFEA(E1_q[4]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L11 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT at LC5_L5 --operation mode is up_dn_cntr E1L11 = CARRY(E1_q[4] & E1L9); --E1_q[3] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[3] at LC4_L5 --operation mode is up_dn_cntr E1_q[3]_lut_out = E1_q[3] $ E1L7; E1_q[3] = DFFEA(E1_q[3]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L9 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT at LC4_L5 --operation mode is up_dn_cntr E1L9 = CARRY(E1_q[3] & E1L7); --E1_q[2] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[2] at LC3_L5 --operation mode is up_dn_cntr E1_q[2]_lut_out = E1_q[2] $ E1L5; E1_q[2] = DFFEA(E1_q[2]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L7 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC3_L5 --operation mode is up_dn_cntr E1L7 = CARRY(E1_q[2] & E1L5); --E1_q[1] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[1] at LC2_L5 --operation mode is up_dn_cntr E1_q[1]_lut_out = E1_q[1] $ E1L3; E1_q[1] = DFFEA(E1_q[1]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L5 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC2_L5 --operation mode is up_dn_cntr E1L5 = CARRY(E1_q[1] & E1L3); --E1_q[0] is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|q[0] at LC1_L5 --operation mode is up_dn_cntr E1_q[0]_lut_out = !E1_q[0]; E1_q[0] = DFFEA(E1_q[0]_lut_out, GLOBAL(pci_clk), , , , , ); --E1L3 is LPM_COUNTER:imm_dpm_cdiv|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC1_L5 --operation mode is up_dn_cntr E1L3 = CARRY(E1_q[0]); --N1L92 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00202~8 at LC6_F43 --operation mode is arithmetic N1L92 = AMPP_FUNCTION(A1L262, N1_LW_LXFR_lc[3], N1_$00203); --N1_$00202 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00202 at LC6_F43 --operation mode is arithmetic N1_$00202 = AMPP_FUNCTION(A1L262, N1_LW_LXFR_lc[3], N1_$00203); --M1L62 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|parc[11]~9 at LC6_B2 --operation mode is arithmetic M1L62 = AMPP_FUNCTION(pci_cben_3, pci_cben_2, M1_parc[10]); --M1_parc[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|parc[11] at LC6_B2 --operation mode is arithmetic M1_parc[11] = AMPP_FUNCTION(pci_cben_3, pci_cben_2, M1_parc[10]); --N1L63 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00207~8 at LC1_F18 --operation mode is arithmetic N1L63 = AMPP_FUNCTION(A1L262, N1_LW_DONE_lc[1]); --N1_$00207 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00207 at LC1_F18 --operation mode is arithmetic N1_$00207 = AMPP_FUNCTION(A1L262, N1_LW_DONE_lc[1]); --N1L94 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00229~16 at LC3_F22 --operation mode is arithmetic N1L94 = AMPP_FUNCTION(A1L652, A1L262, N1_$00230); --N1_$00229 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00229 at LC3_F22 --operation mode is arithmetic N1_$00229 = AMPP_FUNCTION(A1L652, A1L262, N1_$00230); --N1L43 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00204~11 at LC7_F18 --operation mode is arithmetic N1L43 = AMPP_FUNCTION(A1L262, N1_LW_LXFR); --N1_$00204 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00204 at LC7_F18 --operation mode is arithmetic N1_$00204 = AMPP_FUNCTION(A1L262, N1_LW_LXFR); --N1L14 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00218~17 at LC2_F16 --operation mode is arithmetic N1L14 = AMPP_FUNCTION(A1L652, A1L262, N1_$00219); --N1_$00218 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00218 at LC2_F16 --operation mode is arithmetic N1_$00218 = AMPP_FUNCTION(A1L652, A1L262, N1_$00219); --M1L42 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|parc[10]~10 at LC5_B2 --operation mode is arithmetic M1L42 = AMPP_FUNCTION(M1_par[9], M1_par[8]); --M1_parc[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|parc[10] at LC5_B2 --operation mode is arithmetic M1_parc[10] = AMPP_FUNCTION(M1_par[9], M1_par[8]); --K1L95 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00252~8 at LC7_A5 --operation mode is arithmetic K1L95 = AMPP_FUNCTION(A1L772, K1_MR_LWAIT_lc1); --K1_$00252 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00252 at LC7_A5 --operation mode is arithmetic K1_$00252 = AMPP_FUNCTION(A1L772, K1_MR_LWAIT_lc1); --K1L16 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00255~8 at LC6_A15 --operation mode is arithmetic K1L16 = AMPP_FUNCTION(A1L772, K1_MR_LLWAIT_r1_lc1); --K1_$00255 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00255 at LC6_A15 --operation mode is arithmetic K1_$00255 = AMPP_FUNCTION(A1L772, K1_MR_LLWAIT_r1_lc1); --K1L36 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00256~8 at LC2_A15 --operation mode is arithmetic K1L36 = AMPP_FUNCTION(A1L772, K1_MR_LPXFR); --K1_$00256 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00256 at LC2_A15 --operation mode is arithmetic K1_$00256 = AMPP_FUNCTION(A1L772, K1_MR_LPXFR); --K1L56 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00259~8 at LC2_A17 --operation mode is arithmetic K1L56 = AMPP_FUNCTION(A1L772, K1_MR_LLXFR_r2_d_lc1); --K1_$00259 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00259 at LC2_A17 --operation mode is arithmetic K1_$00259 = AMPP_FUNCTION(A1L772, K1_MR_LLXFR_r2_d_lc1); --K1L76 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00262~8 at LC1_A1 --operation mode is arithmetic K1L76 = AMPP_FUNCTION(A1L772, K1_MR_END_d_lc2); --K1_$00262 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00262 at LC1_A1 --operation mode is arithmetic K1_$00262 = AMPP_FUNCTION(A1L772, K1_MR_END_d_lc2); --K1L21 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00070~8 at LC3_D17 --operation mode is arithmetic K1L21 = AMPP_FUNCTION(A1L262, N1_no_op_reg[1]); --K1_$00070 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00070 at LC3_D17 --operation mode is arithmetic K1_$00070 = AMPP_FUNCTION(A1L262, N1_no_op_reg[1]); --N1L15 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00230~1 at LC2_F22 --operation mode is arithmetic N1L15 = AMPP_FUNCTION(N1_LR_PXFR_lc[2]); --N1_$00230 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00230 at LC2_F22 --operation mode is arithmetic N1_$00230 = AMPP_FUNCTION(N1_LR_PXFR_lc[2]); --N1L54 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00223~15 at LC7_F7 --operation mode is arithmetic N1L54 = AMPP_FUNCTION(A1L652, A1L262, N1_$00224); --N1_$00223 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00223 at LC7_F7 --operation mode is arithmetic N1_$00223 = AMPP_FUNCTION(A1L652, A1L262, N1_$00224); --N1L34 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00219~1 at LC1_F16 --operation mode is arithmetic N1L34 = AMPP_FUNCTION(N1_LR_LXFR_lc[4]); --N1_$00219 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00219 at LC1_F16 --operation mode is arithmetic N1_$00219 = AMPP_FUNCTION(N1_LR_LXFR_lc[4]); --N1L01 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00130~15 at LC3_C11 --operation mode is arithmetic N1L01 = AMPP_FUNCTION(N1_io_cyc, N1_lt_ldata_ack_r, N1_$00131); --N1_$00130 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00130 at LC3_C11 --operation mode is arithmetic N1_$00130 = AMPP_FUNCTION(N1_io_cyc, N1_lt_ldata_ack_r, N1_$00131); --K1L81 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00081~8 at LC4_G1 --operation mode is arithmetic K1L81 = AMPP_FUNCTION(A1L772, K1_wr_rdn); --K1_$00081 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00081 at LC4_G1 --operation mode is arithmetic K1_$00081 = AMPP_FUNCTION(A1L772, K1_wr_rdn); --K1L41 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00071~8 at LC5_D4 --operation mode is arithmetic K1L41 = AMPP_FUNCTION(A1L262, Q1_cmd_reg[2]); --K1_$00071 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00071 at LC5_D4 --operation mode is arithmetic K1_$00071 = AMPP_FUNCTION(A1L262, Q1_cmd_reg[2]); --K1L45 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00237~15 at LC2_C17 --operation mode is arithmetic K1L45 = AMPP_FUNCTION(A1L772, K1_MW_LAST); --K1_$00237 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00237 at LC2_C17 --operation mode is arithmetic K1_$00237 = AMPP_FUNCTION(A1L772, K1_MW_LAST); --N1L21 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00131~8 at LC2_C11 --operation mode is arithmetic N1L21 = AMPP_FUNCTION(N1_lt_rdynR_R, P3_REG); --N1_$00131 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00131 at LC2_C11 --operation mode is arithmetic N1_$00131 = AMPP_FUNCTION(N1_lt_rdynR_R, P3_REG); --M2L42 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|parc[10]~3 at LC7_I45 --operation mode is arithmetic M2L42 = AMPP_FUNCTION(M2_par[9], M2_par[8]); --M2_parc[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|parc[10] at LC7_I45 --operation mode is arithmetic M2_parc[10] = AMPP_FUNCTION(M2_par[9], M2_par[8]); --N1L5 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00096~8 at LC2_F50 --operation mode is arithmetic N1L5 = AMPP_FUNCTION(A1L262, N1_no_op_reg[1]); --N1_$00096 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00096 at LC2_F50 --operation mode is arithmetic N1_$00096 = AMPP_FUNCTION(A1L262, N1_no_op_reg[1]); --K1L75 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00246~8 at LC3_A19 --operation mode is arithmetic K1L75 = AMPP_FUNCTION(A1L772, N1_no_op_reg[1]); --K1_$00246 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00246 at LC3_A19 --operation mode is arithmetic K1_$00246 = AMPP_FUNCTION(A1L772, N1_no_op_reg[1]); --K1L61 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00073~8 at LC5_A17 --operation mode is arithmetic K1L61 = AMPP_FUNCTION(A1L772, K1_trdy_det_set); --K1_$00073 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00073 at LC5_A17 --operation mode is arithmetic K1_$00073 = AMPP_FUNCTION(A1L772, K1_trdy_det_set); --K1L6 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00057~8 at LC6_J12 --operation mode is arithmetic K1L6 = AMPP_FUNCTION(pci_gntn, K1L402); --K1_$00057 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00057 at LC6_J12 --operation mode is arithmetic K1_$00057 = AMPP_FUNCTION(pci_gntn, K1L402); --N1L13 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00203~1 at LC5_F43 --operation mode is arithmetic N1L13 = AMPP_FUNCTION(N1_TS_TURN_AR, N1_LW_LXFR); --N1_$00203 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00203 at LC5_F43 --operation mode is arithmetic N1_$00203 = AMPP_FUNCTION(N1_TS_TURN_AR, N1_LW_LXFR); --K1L82 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00158~1 at LC6_F17 --operation mode is arithmetic K1L82 = AMPP_FUNCTION(A1L472, K1_frame_or_lc2); --K1_$00158 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00158 at LC6_F17 --operation mode is arithmetic K1_$00158 = AMPP_FUNCTION(A1L472, K1_frame_or_lc2); --K1L62 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00152~1 at LC6_A3 --operation mode is arithmetic K1L62 = AMPP_FUNCTION(A1L772, K1_frame_or_lc3); --K1_$00152 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00152 at LC6_A3 --operation mode is arithmetic K1_$00152 = AMPP_FUNCTION(A1L772, K1_frame_or_lc3); --imm_dpm_dec_reg_rdata_LED_8 is imm_dpm_dec_reg_rdata_LED_8 at LC4_I40 --operation mode is normal imm_dpm_dec_reg_rdata_LED_8_lut_out = H1_low_ad_IR_data[8] & (H1L722 # H1L522) # !H1_low_ad_IR_data[8] & !H1L722 & H1L522; imm_dpm_dec_reg_rdata_LED_8 = DFFEA(imm_dpm_dec_reg_rdata_LED_8_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L37, , ); --imm_dpm_dec_reg_rdata_LED_9 is imm_dpm_dec_reg_rdata_LED_9 at LC2_I38 --operation mode is normal imm_dpm_dec_reg_rdata_LED_9_lut_out = H1_low_ad_IR_data[9] & (H1L722 # H1L622) # !H1_low_ad_IR_data[9] & !H1L722 & H1L622; imm_dpm_dec_reg_rdata_LED_9 = DFFEA(imm_dpm_dec_reg_rdata_LED_9_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L37, , ); --imm_dpm_dec_reg_soft_rst_n is imm_dpm_dec_reg_soft_rst_n at LC8_F23 --operation mode is normal imm_dpm_dec_reg_soft_rst_n_lut_out = N1L022 # ix1197_lc # ix1207_lc # !N1L802; imm_dpm_dec_reg_soft_rst_n = DFFEA(imm_dpm_dec_reg_soft_rst_n_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --sg_reg_mx_q is sg_reg_mx_q at LC1_L26 --operation mode is normal sg_reg_mx_q_lut_out = !sg_reg_mx_q; sg_reg_mx_q = DFFEA(sg_reg_mx_q_lut_out, E1_q[15], , , , , ); --H1_low_ad_IR_data[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[8] at LC2_I34 --operation mode is normal H1_low_ad_IR_data[8] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_8, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[9] at LC3_I38 --operation mode is normal H1_low_ad_IR_data[9] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_9, pci_rstn, GLOBAL(pci_clk)); --N1_no_op_reg[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|no_op_reg[1] at LC1_A7 --operation mode is normal N1_no_op_reg[1] = AMPP_FUNCTION(pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[13] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[13] at LC1_B4 --operation mode is normal H1_ad_ir_address[13] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_13, pci_rstn, GLOBAL(pci_clk)); --N1L022 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[13]~18 at LC7_F26 --operation mode is normal N1L022 = AMPP_FUNCTION(N1_no_op_reg[1], H1_ad_ir_address[13]); --N1_lt_ack_R_r2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r2 at LC1_F5 --operation mode is normal N1_lt_ack_R_r2 = AMPP_FUNCTION(N1L17, N1L23, N1_TS_DISC, A1L262, pci_rstn, GLOBAL(pci_clk)); --N1_lt_ack_R_r1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r1 at LC1_F14 --operation mode is normal N1_lt_ack_R_r1 = AMPP_FUNCTION(N1_lt_ack_R_r1_lc[7], N1_lt_ack_R_r1_lc[9], N1_lt_ack_R_r1_lc[8], A1L652, pci_rstn, GLOBAL(pci_clk)); --N1_lt_ack_R_r3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r3 at LC6_F5 --operation mode is normal N1_lt_ack_R_r3 = AMPP_FUNCTION(N1_lt_ack_R_r3_lc3, N1_rd_backoff, A1L652, pci_rstn, GLOBAL(pci_clk), N1L31); --N1_lt_ack_R_r4 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r4 at LC3_F5 --operation mode is normal N1_lt_ack_R_r4 = AMPP_FUNCTION(N1_LR_PXFR, N1_rd_backoff, A1L652, pci_rstn, GLOBAL(pci_clk), N1L41); --N1L802 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R~3 at LC7_F5 --operation mode is normal N1L802 = AMPP_FUNCTION(N1_lt_ack_R_r2, N1_lt_ack_R_r1, N1_lt_ack_R_r3, N1_lt_ack_R_r4); --K1_req_or is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|req_or at LC5_D22 --operation mode is normal K1_req_or = AMPP_FUNCTION(K1_req_or_lc[1], pci_gntn, K1_req_or_lc[2], pci_rstn, GLOBAL(pci_clk)); --L1_serr_or is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|serr_or at LC5_G13 --operation mode is normal L1_serr_or = AMPP_FUNCTION(L1_serr_or_lc, L1_xxlad[11], A1L662, pci_rstn, GLOBAL(pci_clk)); --ix1270_lc is ix1270_lc at LC4_L34 --operation mode is normal ix1270_lc = sg_reg_mx_q & ix1196_lc # !sg_reg_mx_q & ix1195_lc; --ix1269_lc is ix1269_lc at LC2_L35 --operation mode is normal ix1269_lc = sg_reg_mx_q & ix1194_lc # !sg_reg_mx_q & ix1193_lc; --ix1268_lc is ix1268_lc at LC2_L29 --operation mode is normal ix1268_lc = sg_reg_mx_q & ix1192_lc # !sg_reg_mx_q & ix1191_lc; --ix1267_lc is ix1267_lc at LC8_L28 --operation mode is normal ix1267_lc = sg_reg_mx_q & ix1190_lc # !sg_reg_mx_q & ix1189_lc; --ix1266_lc is ix1266_lc at LC4_L28 --operation mode is normal ix1266_lc = sg_reg_mx_q & ix1188_lc # !sg_reg_mx_q & ix1187_lc; --ix1265_lc is ix1265_lc at LC8_L26 --operation mode is normal ix1265_lc = sg_reg_mx_q & ix1186_lc # !sg_reg_mx_q & ix1185_lc; --ix1264_lc is ix1264_lc at LC1_L37 --operation mode is normal ix1264_lc = sg_reg_mx_q & ix1184_lc # !sg_reg_mx_q & ix1183_lc; --H1_high_ad_IR_data[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[8] at LC3_I40 --operation mode is normal H1_high_ad_IR_data[8] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[40], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1L522 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|l_dato[40]~44 at LC6_I40 --operation mode is normal H1L522 = AMPP_FUNCTION(H1_high_ad_IR_data[8], H1_low_ad_IR_data[8], H1_local_dat_sel); --N1_lt_ldata_ack_r is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ldata_ack_r at LC2_F1 --operation mode is normal N1_lt_ldata_ack_r = AMPP_FUNCTION(N1_lt_ldata_ack_r_ena, N1_lt_ldata_ack_r_d[1], N1_lt_ldata_ack_r_d[5], N1_lt_ldata_ack_r, pci_rstn, GLOBAL(pci_clk)); --K1_lm_ldata_ack is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ldata_ack at LC4_A9 --operation mode is normal K1_lm_ldata_ack = AMPP_FUNCTION(K1_lm_ldata_ack_ena3, K1_MS_ENA, K1_lm_ldata_ack_lc[4], pci_gntn, pci_rstn, GLOBAL(pci_clk)); --H1L722 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|l_ldat_ack~5 at LC1_A9 --operation mode is normal H1L722 = AMPP_FUNCTION(N1_lt_ldata_ack_r, K1_lm_ldata_ack, N1_$00102); --H1_high_ad_IR_data[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[9] at LC3_I46 --operation mode is normal H1_high_ad_IR_data[9] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[41], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1L622 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|l_dato[41]~47 at LC4_I38 --operation mode is normal H1L622 = AMPP_FUNCTION(H1_high_ad_IR_data[9], H1_low_ad_IR_data[9], H1_local_dat_sel); --N1_LW_LXFR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LW_LXFR at LC7_F43 --operation mode is normal N1_LW_LXFR = AMPP_FUNCTION(N1_LW_LXFR_lc[2], N1L972, pci_rstn, GLOBAL(pci_clk), N1_$00202); --N1_TS_DISC is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_DISC at LC2_F21 --operation mode is normal N1_TS_DISC = AMPP_FUNCTION(N1_TS_DISC_d_lc2, N1_TS_DISC, A1L652, N1L353, pci_rstn, GLOBAL(pci_clk)); --N1_trdy_OR_NOT is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trdy_OR_NOT at LC8_F13 --operation mode is normal N1_trdy_OR_NOT = AMPP_FUNCTION(N1L643, GND, A1L652, !pci_rstn, GLOBAL(pci_clk), N1L58); --N1L17 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~123 at LC1_F28 --operation mode is normal N1L17 = AMPP_FUNCTION(N1_LW_LXFR, N1_TS_DISC, N1_trdy_OR_NOT); --N1L23 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00203~5 at LC3_F9 --operation mode is normal N1L23 = AMPP_FUNCTION(N1_TS_TURN_AR, N1_LW_LXFR); --H1_ad_ir_address[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[5] at LC6_I25 --operation mode is normal H1_ad_ir_address[5] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_5, pci_rstn, GLOBAL(pci_clk)); --N1L212 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[5]~26 at LC7_I26 --operation mode is normal N1L212 = AMPP_FUNCTION(H1_ad_ir_address[5], N1_no_op_reg[1]); --H1_ad_ir_address[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[4] at LC1_I25 --operation mode is normal H1_ad_ir_address[4] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_4, pci_rstn, GLOBAL(pci_clk)); --N1L112 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[4]~27 at LC8_L21 --operation mode is normal N1L112 = AMPP_FUNCTION(H1_ad_ir_address[4], N1_no_op_reg[1]); --H1_cben_ir_address[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|cben_ir_address[1] at LC3_F23 --operation mode is normal H1_cben_ir_address[1] = AMPP_FUNCTION(H1_cben_IR_ce_address, pci_cben_1, pci_rstn, GLOBAL(pci_clk)); --H1_cben_ir_address[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|cben_ir_address[0] at LC7_F23 --operation mode is normal H1_cben_ir_address[0] = AMPP_FUNCTION(H1_cben_IR_ce_address, pci_cben_0, pci_rstn, GLOBAL(pci_clk)); --ix1197_lc is ix1197_lc at LC2_F23 --operation mode is normal ix1197_lc = N1L212 # N1L112 # !H1_cben_ir_address[0] # !H1_cben_ir_address[1]; --H1_cben_ir_address[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|cben_ir_address[3] at LC6_F23 --operation mode is normal H1_cben_ir_address[3] = AMPP_FUNCTION(H1_cben_IR_ce_address, pci_cben_3, pci_rstn, GLOBAL(pci_clk)); --H1_cben_ir_address[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|cben_ir_address[2] at LC1_F23 --operation mode is normal H1_cben_ir_address[2] = AMPP_FUNCTION(H1_cben_IR_ce_address, pci_cben_2, pci_rstn, GLOBAL(pci_clk)); --Q1_bar_hitR[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar_hitR[0] at LC2_G30 --operation mode is normal Q1_bar_hitR[0] = AMPP_FUNCTION(Q1_bar_hit[0], Q1_bar_hitR[0], N1_bar_hit_rst, pci_rstn, GLOBAL(pci_clk)); --N1_TS_IDLE_NOT is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_IDLE_NOT at LC7_B26 --operation mode is normal N1_TS_IDLE_NOT = AMPP_FUNCTION(N1_TS_IDLE_d_lc, N1_TS_IDLE_d_lc1, Q1_mbar_hit, pci_rstn, GLOBAL(pci_clk)); --N1L662 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_tsr[0]~6 at LC1_F26 --operation mode is normal N1L662 = AMPP_FUNCTION(Q1_bar_hitR[0], N1_TS_IDLE_NOT); --H1_low_ad_or[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[0] at LC2_I4 --operation mode is normal H1_low_ad_or[0] = AMPP_FUNCTION(J1_ad_ce[0], H1_mstr_trg_low, A1L27, H1L063, pci_rstn, GLOBAL(pci_clk)); --N1_adoe is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|adoe at LC4_F28 --operation mode is normal N1_adoe = AMPP_FUNCTION(N1_TS_IDLE_NOT, N1_TS_TURN_AR, P5_REG, pci_rstn, GLOBAL(pci_clk), N1L2); --K1_ad_oer is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ad_oer at LC6_D12 --operation mode is normal K1_ad_oer = AMPP_FUNCTION(K1_ad_oer_lc3, GND, K1L02, !pci_rstn, GLOBAL(pci_clk), K1L401); --H1_ad_tri_oe is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_tri_oe at LC1_I46 --operation mode is normal H1_ad_tri_oe = AMPP_FUNCTION(N1_adoe, K1_ad_oer); --H1_low_ad_or[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[1] at LC3_I3 --operation mode is normal H1_low_ad_or[1] = AMPP_FUNCTION(J1_ad_ce[1], H1_mstr_trg_low, A1L17, H1L163, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[2] at LC2_J5 --operation mode is normal H1_low_ad_or[2] = AMPP_FUNCTION(J1_ad_ce[2], H1_mstr_trg_low, A1L07, H1L263, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[3] at LC7_I5 --operation mode is normal H1_low_ad_or[3] = AMPP_FUNCTION(J1_ad_ce[3], H1_mstr_trg_low, A1L96, H1L363, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[4] at LC2_I7 --operation mode is normal H1_low_ad_or[4] = AMPP_FUNCTION(J1_ad_ce[4], H1_mstr_trg_low, A1L86, H1L463, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[5] at LC3_I8 --operation mode is normal H1_low_ad_or[5] = AMPP_FUNCTION(J1_ad_ce[5], H1_mstr_trg_low, A1L76, H1L563, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[6] at LC8_I10 --operation mode is normal H1_low_ad_or[6] = AMPP_FUNCTION(J1_ad_ce[6], H1_mstr_trg_low, A1L66, H1L663, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[7] at LC3_J14 --operation mode is normal H1_low_ad_or[7] = AMPP_FUNCTION(J1_ad_ce[7], H1_mstr_trg_low, A1L56, H1L763, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[8] at LC3_L13 --operation mode is normal H1_low_ad_or[8] = AMPP_FUNCTION(J1_ad_ce[8], A1L46, H1_mstr_trg_low, H1L863, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[9] at LC1_I15 --operation mode is normal H1_low_ad_or[9] = AMPP_FUNCTION(J1_ad_ce[9], A1L36, H1_mstr_trg_low, H1L963, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[10] at LC8_I16 --operation mode is normal H1_low_ad_or[10] = AMPP_FUNCTION(J1_ad_ce[10], H1_mstr_trg_low, A1L26, H1L073, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[11] at LC6_I17 --operation mode is normal H1_low_ad_or[11] = AMPP_FUNCTION(J1_ad_ce[11], H1_mstr_trg_low, A1L16, H1L173, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[12] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[12] at LC7_I20 --operation mode is normal H1_low_ad_or[12] = AMPP_FUNCTION(J1_ad_ce[12], H1_mstr_trg_low, ix1166_lc, H1L273, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[13] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[13] at LC1_I21 --operation mode is normal H1_low_ad_or[13] = AMPP_FUNCTION(J1_ad_ce[13], H1_mstr_trg_low, ix1165_lc, H1L373, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[14] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[14] at LC1_I23 --operation mode is normal H1_low_ad_or[14] = AMPP_FUNCTION(J1_ad_ce[14], H1_mstr_trg_low, ix1164_lc, H1L473, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[15] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[15] at LC1_I24 --operation mode is normal H1_low_ad_or[15] = AMPP_FUNCTION(J1_ad_ce[15], H1_mstr_trg_low, ix1163_lc, H1L573, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[16] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[16] at LC6_G34 --operation mode is normal H1_low_ad_or[16] = AMPP_FUNCTION(J1_ad_ce[16], H1L673, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[17] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[17] at LC6_G33 --operation mode is normal H1_low_ad_or[17] = AMPP_FUNCTION(J1_ad_ce[17], H1L773, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[18] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[18] at LC1_G35 --operation mode is normal H1_low_ad_or[18] = AMPP_FUNCTION(J1_ad_ce[18], H1L873, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[19] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[19] at LC1_G36 --operation mode is normal H1_low_ad_or[19] = AMPP_FUNCTION(J1_ad_ce[19], H1L973, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[20] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[20] at LC2_L36 --operation mode is normal H1_low_ad_or[20] = AMPP_FUNCTION(J1_ad_ce[20], H1L083, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[21] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[21] at LC1_G40 --operation mode is normal H1_low_ad_or[21] = AMPP_FUNCTION(J1_ad_ce[21], H1L183, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[22] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[22] at LC5_I39 --operation mode is normal H1_low_ad_or[22] = AMPP_FUNCTION(J1_ad_ce[22], H1L283, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[23] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[23] at LC3_G42 --operation mode is normal H1_low_ad_or[23] = AMPP_FUNCTION(J1_ad_ce[23], H1L383, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[24] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[24] at LC1_G43 --operation mode is normal H1_low_ad_or[24] = AMPP_FUNCTION(J1_ad_ce[24], H1L483, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[25] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[25] at LC5_G46 --operation mode is normal H1_low_ad_or[25] = AMPP_FUNCTION(J1_ad_ce[25], H1L583, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[26] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[26] at LC6_G48 --operation mode is normal H1_low_ad_or[26] = AMPP_FUNCTION(J1_ad_ce[26], H1L683, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[27] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[27] at LC7_G52 --operation mode is normal H1_low_ad_or[27] = AMPP_FUNCTION(J1_ad_ce[27], H1L783, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[28] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[28] at LC2_G51 --operation mode is normal H1_low_ad_or[28] = AMPP_FUNCTION(J1_ad_ce[28], H1L883, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[29] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[29] at LC8_G50 --operation mode is normal H1_low_ad_or[29] = AMPP_FUNCTION(J1_ad_ce[29], H1L983, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[30] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[30] at LC5_G31 --operation mode is normal H1_low_ad_or[30] = AMPP_FUNCTION(J1_ad_ce[30], H1L093, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_or[31] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_or[31] at LC3_G39 --operation mode is normal H1_low_ad_or[31] = AMPP_FUNCTION(J1_ad_ce[31], H1L193, pci_rstn, GLOBAL(pci_clk)); --H1_low_cben_or[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_cben_or[0] at LC5_A25 --operation mode is normal H1_low_cben_or[0] = AMPP_FUNCTION(H1_mstr_cbe_ce, H1_low_mstr_cbe_out_lc1[0], pci_rstn, GLOBAL(pci_clk)); --K1_cbe_oer_not is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|cbe_oer_not at LC1_D6 --operation mode is normal K1_cbe_oer_not = AMPP_FUNCTION(K1_cbe_oer_r3_d, GND, K1L02, !pci_rstn, GLOBAL(pci_clk), K1L301); --H1_low_cben_or[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_cben_or[1] at LC4_L4 --operation mode is normal H1_low_cben_or[1] = AMPP_FUNCTION(H1_mstr_cbe_ce, H1_low_mstr_cbe_out_lc1[1], pci_rstn, GLOBAL(pci_clk)); --H1_low_cben_or[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_cben_or[2] at LC5_K15 --operation mode is normal H1_low_cben_or[2] = AMPP_FUNCTION(H1_mstr_cbe_ce, H1_low_mstr_cbe_out_lc1[2], pci_rstn, GLOBAL(pci_clk)); --H1_low_cben_or[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_cben_or[3] at LC1_K15 --operation mode is normal H1_low_cben_or[3] = AMPP_FUNCTION(H1_mstr_cbe_ce, H1_low_mstr_cbe_out_lc1[3], pci_rstn, GLOBAL(pci_clk)); --N1_devsel_OR_not is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|devsel_OR_not at LC7_F27 --operation mode is normal N1_devsel_OR_not = AMPP_FUNCTION(N1L221, N1_TS_ADR_VLD, GND, L1_serr_or, !pci_rstn, GLOBAL(pci_clk), N1L88); --N1_targ_oeR_reg is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|targ_oeR_reg at LC1_B24 --operation mode is normal N1_targ_oeR_reg = AMPP_FUNCTION(N1_targ_oeR_reg_lc[4], Q1_mbar_hit, N1_TS_IDLE_NOT, pci_rstn, GLOBAL(pci_clk)); --K1_frame_or_not is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_not at LC8_A3 --operation mode is normal K1_frame_or_not = AMPP_FUNCTION(K1_dac_cyc_strobe, K1_MS_ENA, GND, pci_gntn, !pci_rstn, GLOBAL(pci_clk), K1L311); --K1_irdy_or_not is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|irdy_or_not at LC6_C10 --operation mode is normal K1_irdy_or_not = AMPP_FUNCTION(K1_irdy_or_lc[5], A1L352, GND, K1L92, !pci_rstn, GLOBAL(pci_clk), K1L13); --K1_irdy_oer is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|irdy_oer at LC1_A25 --operation mode is normal K1_irdy_oer = AMPP_FUNCTION(pci_gntn, K1_MS_ENA, K1_irdy_oer_lc1, pci_rstn, GLOBAL(pci_clk)); --H1_par_or is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|par_or at LC7_B2 --operation mode is normal H1_par_or = AMPP_FUNCTION(pci_cben_0, pci_cben_1, pci_rstn, GLOBAL(pci_clk), M1_parc[11]); --H1_par_oeR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|par_oeR at LC1_D15 --operation mode is normal H1_par_oeR = AMPP_FUNCTION(H1_mstr_par_oe_lc2, K1_MS_ENA, pci_gntn, pci_rstn, GLOBAL(pci_clk)); --L1_perr_or_not is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|perr_or_not at LC3_G1 --operation mode is normal L1_perr_or_not = AMPP_FUNCTION(L1L3, GND, L1L4, !pci_rstn, GLOBAL(pci_clk)); --H1_perr_oe_r is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|perr_oe_r at LC1_F43 --operation mode is normal H1_perr_oe_r = AMPP_FUNCTION(K1_perr_oer, P5_REG, N1_TURN_AR_R, N1_TS_IDLE_NOT, pci_rstn, GLOBAL(pci_clk)); --N1_stop_OR_NOT is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|stop_OR_NOT at LC8_F32 --operation mode is normal N1_stop_OR_NOT = AMPP_FUNCTION(N1_stop_or_lc[6], N1_stop_or_lc[5], GND, A1L652, !pci_rstn, GLOBAL(pci_clk), N1L48); --imm_dpm_dec_reg_rdata_LED_7 is imm_dpm_dec_reg_rdata_LED_7 at LC5_I12 --operation mode is normal imm_dpm_dec_reg_rdata_LED_7_lut_out = H1_low_ad_IR_data[7] & (H1L722 # H1L422) # !H1_low_ad_IR_data[7] & !H1L722 & H1L422; imm_dpm_dec_reg_rdata_LED_7 = DFFEA(imm_dpm_dec_reg_rdata_LED_7_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L37, , ); --imm_dpm_dec_reg_rdata_LED_6 is imm_dpm_dec_reg_rdata_LED_6 at LC8_I26 --operation mode is normal imm_dpm_dec_reg_rdata_LED_6_lut_out = H1_low_ad_IR_data[6] & (H1L722 # H1L322) # !H1_low_ad_IR_data[6] & !H1L722 & H1L322; imm_dpm_dec_reg_rdata_LED_6 = DFFEA(imm_dpm_dec_reg_rdata_LED_6_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L37, , ); --imm_dpm_dec_reg_rdata_LED_5 is imm_dpm_dec_reg_rdata_LED_5 at LC1_I18 --operation mode is normal imm_dpm_dec_reg_rdata_LED_5_lut_out = H1_low_ad_IR_data[5] & (H1L722 # H1L222) # !H1_low_ad_IR_data[5] & !H1L722 & H1L222; imm_dpm_dec_reg_rdata_LED_5 = DFFEA(imm_dpm_dec_reg_rdata_LED_5_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L37, , ); --imm_dpm_dec_reg_rdata_LED_4 is imm_dpm_dec_reg_rdata_LED_4 at LC3_I1 --operation mode is normal imm_dpm_dec_reg_rdata_LED_4_lut_out = H1_low_ad_IR_data[4] & (H1L722 # H1L122) # !H1_low_ad_IR_data[4] & !H1L722 & H1L122; imm_dpm_dec_reg_rdata_LED_4 = DFFEA(imm_dpm_dec_reg_rdata_LED_4_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L37, , ); --ix1195_lc is ix1195_lc at LC4_L26 --operation mode is normal ix1195_lc = imm_dpm_dec_reg_rdata_LED_4 & !imm_dpm_dec_reg_rdata_LED_7 & (imm_dpm_dec_reg_rdata_LED_6 $ !imm_dpm_dec_reg_rdata_LED_5) # !imm_dpm_dec_reg_rdata_LED_4 & !imm_dpm_dec_reg_rdata_LED_5 & (imm_dpm_dec_reg_rdata_LED_7 $ !imm_dpm_dec_reg_rdata_LED_6); --imm_dpm_dec_reg_rdata_LED_3 is imm_dpm_dec_reg_rdata_LED_3 at LC4_I37 --operation mode is normal imm_dpm_dec_reg_rdata_LED_3_lut_out = H1_low_ad_IR_data[3] & (H1L722 # H1L022) # !H1_low_ad_IR_data[3] & !H1L722 & H1L022; imm_dpm_dec_reg_rdata_LED_3 = DFFEA(imm_dpm_dec_reg_rdata_LED_3_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L37, , ); --imm_dpm_dec_reg_rdata_LED_2 is imm_dpm_dec_reg_rdata_LED_2 at LC6_I6 --operation mode is normal imm_dpm_dec_reg_rdata_LED_2_lut_out = H1_low_ad_IR_data[2] & (H1L722 # H1L912) # !H1_low_ad_IR_data[2] & !H1L722 & H1L912; imm_dpm_dec_reg_rdata_LED_2 = DFFEA(imm_dpm_dec_reg_rdata_LED_2_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L37, , ); --imm_dpm_dec_reg_rdata_LED_1 is imm_dpm_dec_reg_rdata_LED_1 at LC7_I32 --operation mode is normal imm_dpm_dec_reg_rdata_LED_1_lut_out = H1_low_ad_IR_data[1] & (H1L722 # H1L812) # !H1_low_ad_IR_data[1] & !H1L722 & H1L812; imm_dpm_dec_reg_rdata_LED_1 = DFFEA(imm_dpm_dec_reg_rdata_LED_1_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L37, , ); --imm_dpm_dec_reg_rdata_LED_0 is imm_dpm_dec_reg_rdata_LED_0 at LC7_I44 --operation mode is normal imm_dpm_dec_reg_rdata_LED_0_lut_out = H1_low_ad_IR_data[0] & (H1L722 # H1L712) # !H1_low_ad_IR_data[0] & !H1L722 & H1L712; imm_dpm_dec_reg_rdata_LED_0 = DFFEA(imm_dpm_dec_reg_rdata_LED_0_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L37, , ); --ix1196_lc is ix1196_lc at LC6_L35 --operation mode is normal ix1196_lc = imm_dpm_dec_reg_rdata_LED_0 & !imm_dpm_dec_reg_rdata_LED_3 & (imm_dpm_dec_reg_rdata_LED_2 $ !imm_dpm_dec_reg_rdata_LED_1) # !imm_dpm_dec_reg_rdata_LED_0 & !imm_dpm_dec_reg_rdata_LED_1 & (imm_dpm_dec_reg_rdata_LED_3 $ !imm_dpm_dec_reg_rdata_LED_2); --ix1193_lc is ix1193_lc at LC2_L26 --operation mode is normal ix1193_lc = imm_dpm_dec_reg_rdata_LED_6 & imm_dpm_dec_reg_rdata_LED_4 & (imm_dpm_dec_reg_rdata_LED_7 $ imm_dpm_dec_reg_rdata_LED_5) # !imm_dpm_dec_reg_rdata_LED_6 & !imm_dpm_dec_reg_rdata_LED_7 & (imm_dpm_dec_reg_rdata_LED_5 # imm_dpm_dec_reg_rdata_LED_4); --ix1194_lc is ix1194_lc at LC8_L35 --operation mode is normal ix1194_lc = imm_dpm_dec_reg_rdata_LED_2 & imm_dpm_dec_reg_rdata_LED_0 & (imm_dpm_dec_reg_rdata_LED_3 $ imm_dpm_dec_reg_rdata_LED_1) # !imm_dpm_dec_reg_rdata_LED_2 & !imm_dpm_dec_reg_rdata_LED_3 & (imm_dpm_dec_reg_rdata_LED_1 # imm_dpm_dec_reg_rdata_LED_0); --ix1191_lc is ix1191_lc at LC7_L26 --operation mode is normal ix1191_lc = imm_dpm_dec_reg_rdata_LED_5 & !imm_dpm_dec_reg_rdata_LED_7 & imm_dpm_dec_reg_rdata_LED_4 # !imm_dpm_dec_reg_rdata_LED_5 & (imm_dpm_dec_reg_rdata_LED_6 & !imm_dpm_dec_reg_rdata_LED_7 # !imm_dpm_dec_reg_rdata_LED_6 & imm_dpm_dec_reg_rdata_LED_4); --ix1192_lc is ix1192_lc at LC5_L35 --operation mode is normal ix1192_lc = imm_dpm_dec_reg_rdata_LED_1 & !imm_dpm_dec_reg_rdata_LED_3 & imm_dpm_dec_reg_rdata_LED_0 # !imm_dpm_dec_reg_rdata_LED_1 & (imm_dpm_dec_reg_rdata_LED_2 & !imm_dpm_dec_reg_rdata_LED_3 # !imm_dpm_dec_reg_rdata_LED_2 & imm_dpm_dec_reg_rdata_LED_0); --ix1189_lc is ix1189_lc at LC5_L26 --operation mode is normal ix1189_lc = imm_dpm_dec_reg_rdata_LED_4 & (imm_dpm_dec_reg_rdata_LED_6 $ !imm_dpm_dec_reg_rdata_LED_5) # !imm_dpm_dec_reg_rdata_LED_4 & (imm_dpm_dec_reg_rdata_LED_7 & !imm_dpm_dec_reg_rdata_LED_6 & imm_dpm_dec_reg_rdata_LED_5 # !imm_dpm_dec_reg_rdata_LED_7 & imm_dpm_dec_reg_rdata_LED_6 & !imm_dpm_dec_reg_rdata_LED_5); --ix1190_lc is ix1190_lc at LC4_L35 --operation mode is normal ix1190_lc = imm_dpm_dec_reg_rdata_LED_0 & (imm_dpm_dec_reg_rdata_LED_2 $ !imm_dpm_dec_reg_rdata_LED_1) # !imm_dpm_dec_reg_rdata_LED_0 & (imm_dpm_dec_reg_rdata_LED_3 & !imm_dpm_dec_reg_rdata_LED_2 & imm_dpm_dec_reg_rdata_LED_1 # !imm_dpm_dec_reg_rdata_LED_3 & imm_dpm_dec_reg_rdata_LED_2 & !imm_dpm_dec_reg_rdata_LED_1); --ix1187_lc is ix1187_lc at LC3_L26 --operation mode is normal ix1187_lc = imm_dpm_dec_reg_rdata_LED_7 & imm_dpm_dec_reg_rdata_LED_6 & (imm_dpm_dec_reg_rdata_LED_5 # !imm_dpm_dec_reg_rdata_LED_4) # !imm_dpm_dec_reg_rdata_LED_7 & !imm_dpm_dec_reg_rdata_LED_6 & imm_dpm_dec_reg_rdata_LED_5 & !imm_dpm_dec_reg_rdata_LED_4; --ix1188_lc is ix1188_lc at LC3_L35 --operation mode is normal ix1188_lc = imm_dpm_dec_reg_rdata_LED_3 & imm_dpm_dec_reg_rdata_LED_2 & (imm_dpm_dec_reg_rdata_LED_1 # !imm_dpm_dec_reg_rdata_LED_0) # !imm_dpm_dec_reg_rdata_LED_3 & !imm_dpm_dec_reg_rdata_LED_2 & imm_dpm_dec_reg_rdata_LED_1 & !imm_dpm_dec_reg_rdata_LED_0; --ix1185_lc is ix1185_lc at LC6_L26 --operation mode is normal ix1185_lc = imm_dpm_dec_reg_rdata_LED_7 & (imm_dpm_dec_reg_rdata_LED_4 & imm_dpm_dec_reg_rdata_LED_5 # !imm_dpm_dec_reg_rdata_LED_4 & imm_dpm_dec_reg_rdata_LED_6) # !imm_dpm_dec_reg_rdata_LED_7 & imm_dpm_dec_reg_rdata_LED_6 & (imm_dpm_dec_reg_rdata_LED_5 $ imm_dpm_dec_reg_rdata_LED_4); --ix1186_lc is ix1186_lc at LC7_L35 --operation mode is normal ix1186_lc = imm_dpm_dec_reg_rdata_LED_3 & (imm_dpm_dec_reg_rdata_LED_0 & imm_dpm_dec_reg_rdata_LED_1 # !imm_dpm_dec_reg_rdata_LED_0 & imm_dpm_dec_reg_rdata_LED_2) # !imm_dpm_dec_reg_rdata_LED_3 & imm_dpm_dec_reg_rdata_LED_2 & (imm_dpm_dec_reg_rdata_LED_1 $ imm_dpm_dec_reg_rdata_LED_0); --ix1183_lc is ix1183_lc at LC2_L37 --operation mode is normal ix1183_lc = imm_dpm_dec_reg_rdata_LED_7 & imm_dpm_dec_reg_rdata_LED_4 & (imm_dpm_dec_reg_rdata_LED_6 $ imm_dpm_dec_reg_rdata_LED_5) # !imm_dpm_dec_reg_rdata_LED_7 & !imm_dpm_dec_reg_rdata_LED_5 & (imm_dpm_dec_reg_rdata_LED_6 $ imm_dpm_dec_reg_rdata_LED_4); --ix1184_lc is ix1184_lc at LC1_L35 --operation mode is normal ix1184_lc = imm_dpm_dec_reg_rdata_LED_3 & imm_dpm_dec_reg_rdata_LED_0 & (imm_dpm_dec_reg_rdata_LED_2 $ imm_dpm_dec_reg_rdata_LED_1) # !imm_dpm_dec_reg_rdata_LED_3 & !imm_dpm_dec_reg_rdata_LED_1 & (imm_dpm_dec_reg_rdata_LED_2 $ imm_dpm_dec_reg_rdata_LED_0); --H1_high_ad_or[40] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[40] at LC4_L13 --operation mode is normal H1_high_ad_or[40] = AMPP_FUNCTION(J1_ad_ce[40], H1_mstr_trg_hi_ad, A1L46, H1_high_ad_out_lc[8], pci_rstn, GLOBAL(pci_clk)); --K1_lm_hdata_ack is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack at LC6_A10 --operation mode is normal K1_lm_hdata_ack = AMPP_FUNCTION(K1_lm_hdata_ack_ena2, pci_rstn, GLOBAL(pci_clk), K1L952); --K1_tgt_64_response_reg is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|tgt_64_response_reg at LC4_A13 --operation mode is normal K1_tgt_64_response_reg = AMPP_FUNCTION(K1_tgt_64_response_reg, K1_tgt_64_response_set, K1L901, K1_tgt_64_response_reset, pci_rstn, GLOBAL(pci_clk)); --H1L14 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~258 at LC5_A9 --operation mode is normal H1L14 = AMPP_FUNCTION(K1_lm_hdata_ack, K1_tgt_64_response_reg, K1_lm_ldata_ack, N1_$00102); --N1_lt_hdata_ack_r is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_hdata_ack_r at LC2_F19 --operation mode is normal N1_lt_hdata_ack_r = AMPP_FUNCTION(N1_lt_hdata_ack_r_ena, N1_lt_hdata_ack_r_d[1], N1_lt_hdata_ack_r_d[4], N1_lt_hdata_ack_r, pci_rstn, GLOBAL(pci_clk)); --H1_local_dat_sel is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|local_dat_sel at LC2_A9 --operation mode is normal H1_local_dat_sel = AMPP_FUNCTION(H1L14, N1_$00102, N1_lt_hdata_ack_r, N1_lt_ldata_ack_r); --K1_MS_ENA is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_ENA at LC6_D15 --operation mode is normal K1_MS_ENA = AMPP_FUNCTION(K1_MS_ENA_d_lc, K1_l_req_vld, K1_MS_PARK, pci_gntn, pci_rstn, GLOBAL(pci_clk)); --N1_LR_IDLE_NOT is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_IDLE_NOT at LC1_F4 --operation mode is normal N1_LR_IDLE_NOT = AMPP_FUNCTION(N1_LR_DONE, N1L241, N1_LR_IDLE_NOT, pci_rstn, GLOBAL(pci_clk)); --N1_LW_IDLE_NOT is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LW_IDLE_NOT at LC8_F29 --operation mode is normal N1_LW_IDLE_NOT = AMPP_FUNCTION(N1_LW_DONE, N1L372, N1_LW_IDLE_NOT, pci_rstn, GLOBAL(pci_clk)); --N1_$00102 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00102 at LC6_A9 --operation mode is normal N1_$00102 = AMPP_FUNCTION(N1_LR_IDLE_NOT, N1_LW_IDLE_NOT, K1_mstr_actv_lc); --ix1206_lc is ix1206_lc at LC5_F26 --operation mode is normal ix1206_lc = H1_cben_ir_address[2] # !H1_cben_ir_address[3]; --A1L711 is ix1206_lc~0 at LC5_F26 --operation mode is normal A1L711 = H1_cben_ir_address[2] # !H1_cben_ir_address[3]; --A1L37 is ix1179_lc~0 at LC6_F26 --operation mode is normal A1L37 = (H1_cben_ir_address[0] & N1L802 & N1L662 & ix1198_lc) & CASCADE(A1L711); --H1_high_ad_or[41] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[41] at LC2_I15 --operation mode is normal H1_high_ad_or[41] = AMPP_FUNCTION(J1_ad_ce[41], A1L36, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[9], pci_rstn, GLOBAL(pci_clk)); --K1_MS_ADR2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_ADR2 at LC8_A25 --operation mode is normal K1_MS_ADR2 = AMPP_FUNCTION(K1_dac_cyc_reg, K1_MS_ADR, pci_rstn, GLOBAL(pci_clk)); --K1_MS_ADR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_ADR at LC7_D4 --operation mode is normal K1_MS_ADR = AMPP_FUNCTION(K1_MS_ENA, pci_gntn, pci_rstn, GLOBAL(pci_clk)); --H1_ad_IR_ce_address is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_IR_ce_address at LC1_F9 --operation mode is normal H1_ad_IR_ce_address = AMPP_FUNCTION(H1_trg_ad_IR_ce_A, K1_MS_ADR2, K1_MS_ADR); --N1_TS_TURN_AR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_TURN_AR at LC1_F8 --operation mode is normal N1_TS_TURN_AR = AMPP_FUNCTION(A1L652, N1_TS_TURN_AR_d_lc1, N1_TS_DISC, N1_low_dword_discard, pci_rstn, GLOBAL(pci_clk)); --N1_LW_WAIT is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LW_WAIT at LC8_F18 --operation mode is normal N1_LW_WAIT = AMPP_FUNCTION(N1_LW_WAIT, imm_dpm_dec_reg_LT_RDY_n_pci, pci_rstn, GLOBAL(pci_clk), N1_$00204); --N1_lt_ack_R_r1_lc[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r1_lc[7] at LC7_F15 --operation mode is normal N1_lt_ack_R_r1_lc[7] = AMPP_FUNCTION(N1_lt_ack_R_r1_lc[6], N1_LW_WAIT, N1_lt_ack_R_r1_lc[4], N1_rd_backoff); --N1_LR_LXFR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_LXFR at LC3_F16 --operation mode is normal N1_LR_LXFR = AMPP_FUNCTION(N1L151, N1L941, N1_LR_LXFR, pci_rstn, GLOBAL(pci_clk), N1_$00218); --N1_lt_ack_R_r1_lc[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r1_lc[9] at LC4_F14 --operation mode is normal N1_lt_ack_R_r1_lc[9] = AMPP_FUNCTION(N1_LR_LXFR, N1_rd_backoff); --N1_lt_rdynR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_rdynR at LC6_F18 --operation mode is normal N1_lt_rdynR = AMPP_FUNCTION(imm_dpm_dec_reg_LT_RDY_n_pci, pci_rstn, GLOBAL(pci_clk)); --N1_lt_rdynR_R is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_rdynR_R at LC4_F12 --operation mode is normal N1_lt_rdynR_R = AMPP_FUNCTION(N1_lt_rdynR, pci_rstn, GLOBAL(pci_clk)); --N1_lt_ack_R_r1_lc[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r1_lc[8] at LC5_F14 --operation mode is normal N1_lt_ack_R_r1_lc[8] = AMPP_FUNCTION(N1_lt_rdynR, N1_lt_rdynR_R, N1_lt_ldata_ack_r, N1_direct_xfr); --N1L31 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00152~0 at LC5_F5 --operation mode is normal N1L31 = AMPP_FUNCTION(N1_no_op_reg[1], A1L262); --N1L41 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00154~0 at LC2_F5 --operation mode is normal N1L41 = AMPP_FUNCTION(A1L262, N1_lt_rdynR); --K1_perr_oer is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|perr_oer at LC2_F43 --operation mode is normal K1_perr_oer = AMPP_FUNCTION(K1_MS_TAR, K1_MS_DXFR, K1_wr_rdn, pci_rstn, GLOBAL(pci_clk)); --P5_REG is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_sr:wr_rdn_FF|REG at LC1_G17 --operation mode is normal P5_REG = AMPP_FUNCTION(N1L99, P5_REG, N1_TS_IDLE_NOT, N1_LW_IDLE_NOT, pci_rstn, GLOBAL(pci_clk)); --N1_TURN_AR_R is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TURN_AR_R at LC3_F43 --operation mode is normal N1_TURN_AR_R = AMPP_FUNCTION(N1_TS_TURN_AR, pci_rstn, GLOBAL(pci_clk)); --K1_MS_REQ is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_REQ at LC6_D22 --operation mode is normal K1_MS_REQ = AMPP_FUNCTION(K1_MS_REQ_d_lc[1], pci_gntn, K1_MS_REQ_d_lc[2], pci_rstn, GLOBAL(pci_clk)); --K1_MS_IDLE_not is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_IDLE_not at LC2_D22 --operation mode is normal K1_MS_IDLE_not = AMPP_FUNCTION(K1_MS_TAR, pci_gntn, K1_MS_IDLE_lc1, K1_l_req_vld, pci_rstn, GLOBAL(pci_clk)); --K1_req_or_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|req_or_lc[1] at LC3_D22 --operation mode is normal K1_req_or_lc[1] = AMPP_FUNCTION(K1_MS_REQ, K1_l_req_vld, K1_MS_IDLE_not); --K1_MS_PARK is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_PARK at LC1_D22 --operation mode is normal K1_MS_PARK = AMPP_FUNCTION(K1_MS_IDLE_lc1, pci_gntn, K1_l_req_vld, pci_rstn, GLOBAL(pci_clk)); --K1_req_or_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|req_or_lc[2] at LC4_D22 --operation mode is normal K1_req_or_lc[2] = AMPP_FUNCTION(K1_MS_ENA, K1_l_req_vld, K1_MS_PARK); --Q1_cmd_reg[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cmd_reg[8] at LC2_G13 --operation mode is normal Q1_cmd_reg[8] = AMPP_FUNCTION(Q1L601, H1_low_ad_IR_data[8], pci_rstn, GLOBAL(pci_clk)); --Q1_cmd_reg[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cmd_reg[6] at LC7_I19 --operation mode is normal Q1_cmd_reg[6] = AMPP_FUNCTION(Q1L501, H1_low_ad_IR_data[6], pci_rstn, GLOBAL(pci_clk)); --L1_serr_or_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|serr_or_lc at LC3_G13 --operation mode is normal L1_serr_or_lc = AMPP_FUNCTION(H1_trg_serr_vld, Q1_cmd_reg[8], Q1_cmd_reg[6]); --L1_xxlad[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[11] at LC8_G12 --operation mode is normal L1_xxlad[11] = AMPP_FUNCTION(L1_xxlad[8], L1_xxlad[9], L1_xxlad[10]); --H1_low_ad_IR_data[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[7] at LC4_I25 --operation mode is normal H1_low_ad_IR_data[7] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_7, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[6] at LC5_I19 --operation mode is normal H1_low_ad_IR_data[6] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_6, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[5] at LC2_I25 --operation mode is normal H1_low_ad_IR_data[5] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_5, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[4] at LC7_I25 --operation mode is normal H1_low_ad_IR_data[4] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_4, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[3] at LC8_I37 --operation mode is normal H1_low_ad_IR_data[3] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_3, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[2] at LC4_I6 --operation mode is normal H1_low_ad_IR_data[2] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_2, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[1] at LC6_I19 --operation mode is normal H1_low_ad_IR_data[1] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_1, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[0] at LC5_I25 --operation mode is normal H1_low_ad_IR_data[0] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_0, pci_rstn, GLOBAL(pci_clk)); --N1_ack64_OR_not is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|ack64_OR_not at LC4_F27 --operation mode is normal N1_ack64_OR_not = AMPP_FUNCTION(N1_trans64_R, N1_devsel_OR_lc[1], GND, A1L652, !pci_rstn, GLOBAL(pci_clk), N1L71); --K1L901 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~1394 at LC8_C23 --operation mode is normal K1L901 = AMPP_FUNCTION(N1_targ_oeR_reg, N1_ack64_OR_not); --H1_ad_IR_ce_data is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_IR_ce_data at LC1_A22 --operation mode is normal H1_ad_IR_ce_data = AMPP_FUNCTION(H1_trg_ad_IR_ce_D, H1_mstr_ad_IR_ce_D); --N1_lt_ldata_ack_r_d[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ldata_ack_r_d[5] at LC1_F1 --operation mode is normal N1_lt_ldata_ack_r_d[5] = AMPP_FUNCTION(N1_lt_ldata_ack_r_d[4], N1_lt_ldata_ack_r_d[3], N1_lt_ldata_ack_r_prn3, K1_mstr_actv_lc); --N1_LW_DONE is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LW_DONE at LC2_F18 --operation mode is normal N1_LW_DONE = AMPP_FUNCTION(N1_LW_DONE_lc[2], N1_LW_LXFR, pci_rstn, GLOBAL(pci_clk), N1_$00207); --N1_lt_ldata_ack_r_d[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ldata_ack_r_d[1] at LC7_F29 --operation mode is normal N1_lt_ldata_ack_r_d[1] = AMPP_FUNCTION(N1_LW_DONE, N1_LW_IDLE_NOT); --K1_lm_ldata_ack_lc[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ldata_ack_lc[4] at LC8_A8 --operation mode is normal K1_lm_ldata_ack_lc[4] = AMPP_FUNCTION(K1L862, K1L762, K1_lm_ldata_ack_lc[3], K1_MS_ADR); --N1_LR_DONE is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_DONE at LC2_F4 --operation mode is normal N1_LR_DONE = AMPP_FUNCTION(N1_LR_DONE_lc[2], A1L652, N1_LR_DONE_lc[1], pci_rstn, GLOBAL(pci_clk)); --K1_MR_IDLE_not is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_IDLE_not at LC1_A19 --operation mode is normal K1_MR_IDLE_not = AMPP_FUNCTION(K1_MR_END, K1_MR_IDLE_lc1, K1_MR_IDLE_not, pci_rstn, GLOBAL(pci_clk)); --K1_MW_IDLE_not is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_IDLE_not at LC3_A13 --operation mode is normal K1_MW_IDLE_not = AMPP_FUNCTION(K1_MW_IDLE_lc1, K1_MW_END, pci_gntn, K1_MW_IDLE_not, pci_rstn, GLOBAL(pci_clk)); --K1_mstr_actv_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|mstr_actv_lc at LC1_A13 --operation mode is normal K1_mstr_actv_lc = AMPP_FUNCTION(K1_MR_IDLE_not, K1_MW_IDLE_not); --ix1198_lc is ix1198_lc at LC2_F26 --operation mode is normal ix1198_lc = !N1L022 & !N1L212 & N1L112 & H1_cben_ir_address[1]; --H1_trg_ad_IR_ce_A is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_ad_IR_ce_A at LC4_F9 --operation mode is normal H1_trg_ad_IR_ce_A = AMPP_FUNCTION(N1_ad_ir_ce_A_lc2, N1_ad_ir_ce_A_lc1); --K1_dac_cyc_reg is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|dac_cyc_reg at LC6_D17 --operation mode is normal K1_dac_cyc_reg = AMPP_FUNCTION(K1_MS_IDLE_not, K1_dac_cmd, K1_lm_adr_ack_R, K1_dac_cyc_reg, pci_rstn, GLOBAL(pci_clk)); --K1_adr_phase_end_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|adr_phase_end_lc1 at LC1_C21 --operation mode is normal K1_adr_phase_end_lc1 = AMPP_FUNCTION(K1_dac_cyc_reg, K1_MS_ADR); --N1_TS_DXFR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_DXFR at LC4_F21 --operation mode is normal N1_TS_DXFR = AMPP_FUNCTION(N1L063, N1L363, N1_TS_DXFR_d_lc[2], A1L652, pci_rstn, GLOBAL(pci_clk)); --imm_dpm_dec_reg_LT_RDY_n_pci is imm_dpm_dec_reg_LT_RDY_n_pci at LC6_G11 --operation mode is normal imm_dpm_dec_reg_LT_RDY_n_pci_lut_out = imm_dpm_dec_reg_tmp; imm_dpm_dec_reg_LT_RDY_n_pci = DFFEA(imm_dpm_dec_reg_LT_RDY_n_pci_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --N1_LW_LXFR_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LW_LXFR_lc[2] at LC4_F43 --operation mode is normal N1_LW_LXFR_lc[2] = AMPP_FUNCTION(N1_TS_DXFR, imm_dpm_dec_reg_LT_RDY_n_pci, N1_LW_LXFR); --N1_TS_DISC_d_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_DISC_d_lc2 at LC3_F21 --operation mode is normal N1_TS_DISC_d_lc2 = AMPP_FUNCTION(N1_TS_DISC_d_lc3, N1_TS_DXFR); --N1L58 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~461 at LC7_F13 --operation mode is normal N1L58 = AMPP_FUNCTION(A1L262, N1_trdy_OR_NOT, N1L543); --N1_low_dword_discard is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|low_dword_discard at LC2_F8 --operation mode is normal N1_low_dword_discard = AMPP_FUNCTION(N1_LR_LXFR, N1_$00093, N1_lt_ldata_ack_r, pci_rstn, GLOBAL(pci_clk)); --N1_retry is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|retry at LC6_F25 --operation mode is normal N1_retry = AMPP_FUNCTION(N1_retry_set, N1_retry, N1_retry_rst_lc2, pci_rstn, GLOBAL(pci_clk)); --N1_lt_ack_R_r1_lc[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r1_lc[6] at LC1_F15 --operation mode is normal N1_lt_ack_R_r1_lc[6] = AMPP_FUNCTION(N1_lt_ack_R_r1_lc[5], N1_rd_backoff, N1_retry, L1_serr_or); --N1_lt_ack_R_r1_lc[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r1_lc[4] at LC7_F12 --operation mode is normal N1_lt_ack_R_r1_lc[4] = AMPP_FUNCTION(N1_lt_ack_R_r1_lc[3], N1_lt_ack_R_r1_lc[2], N1_lt_ack_R_r1_lc[1]); --N1_int_ack_cyc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|int_ack_cyc at LC4_G12 --operation mode is normal N1_int_ack_cyc = AMPP_FUNCTION(N1_adr_phase_lc1, N1_int_ack_cyc, N1_TS_IDLE_NOT, N1L483, pci_rstn, GLOBAL(pci_clk)); --N1_io_cyc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|io_cyc at LC1_G12 --operation mode is normal N1_io_cyc = AMPP_FUNCTION(N1_io_cyc, N1_adr_phase_lc1, N1_io_cyc_s_lc, N1_TS_IDLE_NOT, pci_rstn, GLOBAL(pci_clk)); --P3_REG is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_sr:trans64_reg|REG at LC6_F20 --operation mode is normal P3_REG = AMPP_FUNCTION(N1_trans64_reg_set, P3_REG, N1_trans64_reg_rst_lc2, N1_trans64_reg_rst_lc1, pci_rstn, GLOBAL(pci_clk)); --N1_direct_xfr is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|direct_xfr at LC3_G12 --operation mode is normal N1_direct_xfr = AMPP_FUNCTION(N1_int_ack_cyc, N1_io_cyc, P3_REG); --N1_LR_WAIT is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_WAIT at LC5_F2 --operation mode is normal N1_LR_WAIT = AMPP_FUNCTION(N1_LR_WAIT, N1_LR_WAIT_lc[1], N1_direct_xfr, N1_lt_rdynR, pci_rstn, GLOBAL(pci_clk), N1L25); --N1L74 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00224~1 at LC6_F7 --operation mode is arithmetic N1L74 = AMPP_FUNCTION(N1_LR_PXFR_32); --N1_$00224 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00224 at LC6_F7 --operation mode is arithmetic N1_$00224 = AMPP_FUNCTION(N1_LR_PXFR_32); --N1_lt_ack_R_r3_lc3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r3_lc3 at LC4_F5 --operation mode is normal N1_lt_ack_R_r3_lc3 = AMPP_FUNCTION(N1_lt_ack_R_r3_lc2, N1_lt_ack_R_r3_lc1, N1_LR_WAIT, N1L74); --N1_LR_PXFR_r2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_r2 at LC6_F22 --operation mode is normal N1_LR_PXFR_r2 = AMPP_FUNCTION(N1L89, N1_LR_PXFR_lc[3], N1_LR_WAIT, N1L74, pci_rstn, GLOBAL(pci_clk)); --N1_LR_PXFR_r1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_r1 at LC4_F22 --operation mode is normal N1_LR_PXFR_r1 = AMPP_FUNCTION(N1L561, pci_rstn, GLOBAL(pci_clk), N1_$00229); --N1_LR_PXFR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR at LC1_F22 --operation mode is normal N1_LR_PXFR = AMPP_FUNCTION(N1_LR_PXFR_r2, N1_LR_PXFR_r1); --H1_cben_IR_ce_address is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|cben_IR_ce_address at LC2_F9 --operation mode is normal H1_cben_IR_ce_address = AMPP_FUNCTION(H1_trg_cben_IR_ce_A, K1_MS_ADR2, K1_MS_ADR); --Q1_bar_hit[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar_hit[0] at LC3_G30 --operation mode is normal Q1_bar_hit[0] = AMPP_FUNCTION(V71_aeb_out, Q1_cyc_vld[0], N1_adr_phase_lc1); --N1_bar_hit_rst is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|bar_hit_rst at LC4_G30 --operation mode is normal N1_bar_hit_rst = AMPP_FUNCTION(N1_TS_TURN_AR, L1_serr_or, N1_adr_phase_lc1, N1_TS_IDLE_NOT); --N1_TS_ADR_VLD is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_ADR_VLD at LC6_B26 --operation mode is normal N1_TS_ADR_VLD = AMPP_FUNCTION(N1L611, Q1_mbar_hit, N1_TS_IDLE_NOT, pci_rstn, GLOBAL(pci_clk)); --N1_TS_IDLE_d_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_IDLE_d_lc at LC1_B26 --operation mode is normal N1_TS_IDLE_d_lc = AMPP_FUNCTION(N1_TS_TURN_AR, N1_TS_ADR_VLD, L1_serr_or); --N1_TS_IDLE_d_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_IDLE_d_lc1 at LC4_B26 --operation mode is normal N1_TS_IDLE_d_lc1 = AMPP_FUNCTION(N1L611, N1_TS_IDLE_NOT); --H1_mstr_trg_low is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_trg_low at LC1_L13 --operation mode is normal H1_mstr_trg_low = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1_mstr_trg_hr_dat_sel); --H1_trg_par_oe is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_par_oe at LC3_D15 --operation mode is normal H1_trg_par_oe = AMPP_FUNCTION(N1_TS_IDLE_NOT, N1_TS_TURN_AR, P5_REG); --N1L2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00079~0 at LC3_F28 --operation mode is normal N1L2 = AMPP_FUNCTION(N1_stop_OR_NOT, N1_trdy_OR_NOT, A1L652); --K1L02 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00100~1 at LC5_A6 --operation mode is arithmetic K1L02 = AMPP_FUNCTION(A1L472, A1L772); --K1_$00100 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00100 at LC5_A6 --operation mode is arithmetic K1_$00100 = AMPP_FUNCTION(A1L472, A1L772); --K1_cbe_oer_r2_d is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|cbe_oer_r2_d at LC1_D14 --operation mode is normal K1_cbe_oer_r2_d = AMPP_FUNCTION(K1_MS_PARK, K1_MS_ENA); --K1L401 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~685 at LC5_D12 --operation mode is normal K1L401 = AMPP_FUNCTION(K1_ad_oer_lc2d, K1_ad_oer_lc2a, K1_cbe_oer_r2_d, pci_gntn); --F2_q[4] is LPM_RAM_DP:imm_dpm_dp_p_dpram|altdpram:sram|q[4] at EC1_J F2_q[4]_data_in = ADC1_D[4]; F2_q[4]_write_enable = !GLOBAL(imm_dpm_dp_p_reg_we_p); F2_q[4]_clock_0 = !ADC2_D[3]; F2_q[4]_clock_1 = GLOBAL(pci_clk); F2_q[4]_write_address = WR_ADDR(E3_q[0], E3_q[1], E3_q[2], E3_q[3], E3_q[4], E3_q[5], E3_q[6], E3_q[7], E3_q[8], E3_q[9], E3_q[10]); F2_q[4]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F2_q[4] = MEMORY_SEGMENT(F2_q[4]_data_in, F2_q[4]_write_enable, F2_q[4]_clock_0, F2_q[4]_clock_1, , , , VCC, F2_q[4]_write_address, F2_q[4]_read_address); --F2_q[5] is LPM_RAM_DP:imm_dpm_dp_p_dpram|altdpram:sram|q[5] at EC1_F F2_q[5]_data_in = ADC1_D[5]; F2_q[5]_write_enable = !GLOBAL(imm_dpm_dp_p_reg_we_p); F2_q[5]_clock_0 = !ADC2_D[3]; F2_q[5]_clock_1 = GLOBAL(pci_clk); F2_q[5]_write_address = WR_ADDR(E3_q[0], E3_q[1], E3_q[2], E3_q[3], E3_q[4], E3_q[5], E3_q[6], E3_q[7], E3_q[8], E3_q[9], E3_q[10]); F2_q[5]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F2_q[5] = MEMORY_SEGMENT(F2_q[5]_data_in, F2_q[5]_write_enable, F2_q[5]_clock_0, F2_q[5]_clock_1, , , , VCC, F2_q[5]_write_address, F2_q[5]_read_address); --F2_q[6] is LPM_RAM_DP:imm_dpm_dp_p_dpram|altdpram:sram|q[6] at EC9_F F2_q[6]_data_in = ADC1_D[6]; F2_q[6]_write_enable = !GLOBAL(imm_dpm_dp_p_reg_we_p); F2_q[6]_clock_0 = !ADC2_D[3]; F2_q[6]_clock_1 = GLOBAL(pci_clk); F2_q[6]_write_address = WR_ADDR(E3_q[0], E3_q[1], E3_q[2], E3_q[3], E3_q[4], E3_q[5], E3_q[6], E3_q[7], E3_q[8], E3_q[9], E3_q[10]); F2_q[6]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F2_q[6] = MEMORY_SEGMENT(F2_q[6]_data_in, F2_q[6]_write_enable, F2_q[6]_clock_0, F2_q[6]_clock_1, , , , VCC, F2_q[6]_write_address, F2_q[6]_read_address); --F2_q[7] is LPM_RAM_DP:imm_dpm_dp_p_dpram|altdpram:sram|q[7] at EC1_H F2_q[7]_data_in = ADC1_D[7]; F2_q[7]_write_enable = !GLOBAL(imm_dpm_dp_p_reg_we_p); F2_q[7]_clock_0 = !ADC2_D[3]; F2_q[7]_clock_1 = GLOBAL(pci_clk); F2_q[7]_write_address = WR_ADDR(E3_q[0], E3_q[1], E3_q[2], E3_q[3], E3_q[4], E3_q[5], E3_q[6], E3_q[7], E3_q[8], E3_q[9], E3_q[10]); F2_q[7]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F2_q[7] = MEMORY_SEGMENT(F2_q[7]_data_in, F2_q[7]_write_enable, F2_q[7]_clock_0, F2_q[7]_clock_1, , , , VCC, F2_q[7]_write_address, F2_q[7]_read_address); --H1L673 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[16]~416 at LC4_G34 --operation mode is normal H1L673 = AMPP_FUNCTION(H1_trg_low_ad_out_sel, H1_trg_cfg_ad_out[16], H1_trg_cfg_cyc_out, H1L75); --H1_high_ad_or[48] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[48] at LC1_I33 --operation mode is normal H1_high_ad_or[48] = AMPP_FUNCTION(J1_ad_ce[48], H1_high_ad_out_lc[16], pci_rstn, GLOBAL(pci_clk)); --H1L75 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~507 at LC3_G34 --operation mode is normal H1L75 = AMPP_FUNCTION(H1_high_ad_or[48], H1_mstr_trg_low_ad_out_sel); --J1_ad_ce[16] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[16] at LC1_G34 --operation mode is normal J1_ad_ce[16] = H1_ad_ce_nc # !A1L772 & !A1L262; --H1L773 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[17]~417 at LC4_G33 --operation mode is normal H1L773 = AMPP_FUNCTION(H1_trg_cfg_ad_out[17], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L65); --H1_high_ad_or[49] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[49] at LC4_I33 --operation mode is normal H1_high_ad_or[49] = AMPP_FUNCTION(J1_ad_ce[49], H1_high_ad_out_lc[17], pci_rstn, GLOBAL(pci_clk)); --H1L65 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~506 at LC3_G33 --operation mode is normal H1L65 = AMPP_FUNCTION(H1_high_ad_or[49], H1_mstr_trg_low_ad_out_sel); --H1L873 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[18]~418 at LC5_G35 --operation mode is normal H1L873 = AMPP_FUNCTION(H1_trg_cfg_ad_out[18], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L55); --H1_high_ad_or[50] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[50] at LC6_I14 --operation mode is normal H1_high_ad_or[50] = AMPP_FUNCTION(J1_ad_ce[50], H1_high_ad_out_lc[18], pci_rstn, GLOBAL(pci_clk)); --H1L55 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~505 at LC4_G35 --operation mode is normal H1L55 = AMPP_FUNCTION(H1_high_ad_or[50], H1_mstr_trg_low_ad_out_sel); --H1L973 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[19]~419 at LC5_G36 --operation mode is normal H1L973 = AMPP_FUNCTION(H1_trg_cfg_ad_out[19], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L45); --H1_high_ad_or[51] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[51] at LC1_L41 --operation mode is normal H1_high_ad_or[51] = AMPP_FUNCTION(J1_ad_ce[51], H1_high_ad_out_lc[19], pci_rstn, GLOBAL(pci_clk)); --H1L45 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~504 at LC4_G36 --operation mode is normal H1L45 = AMPP_FUNCTION(H1_high_ad_or[51], H1_mstr_trg_low_ad_out_sel); --H1L083 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[20]~420 at LC5_L36 --operation mode is normal H1L083 = AMPP_FUNCTION(H1_trg_cfg_ad_out[20], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L35); --H1_high_ad_or[52] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[52] at LC4_L41 --operation mode is normal H1_high_ad_or[52] = AMPP_FUNCTION(J1_ad_ce[52], H1_high_ad_out_lc[20], pci_rstn, GLOBAL(pci_clk)); --H1L35 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~503 at LC4_L36 --operation mode is normal H1L35 = AMPP_FUNCTION(H1_high_ad_or[52], H1_mstr_trg_low_ad_out_sel); --H1L183 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[21]~421 at LC6_G40 --operation mode is normal H1L183 = AMPP_FUNCTION(H1_trg_cfg_ad_out[21], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L25); --H1_high_ad_or[53] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[53] at LC4_I43 --operation mode is normal H1_high_ad_or[53] = AMPP_FUNCTION(J1_ad_ce[53], H1_high_ad_out_lc[21], pci_rstn, GLOBAL(pci_clk)); --H1L25 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~502 at LC5_G40 --operation mode is normal H1L25 = AMPP_FUNCTION(H1_high_ad_or[53], H1_mstr_trg_low_ad_out_sel); --H1L283 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[22]~422 at LC4_I39 --operation mode is normal H1L283 = AMPP_FUNCTION(H1_trg_cfg_ad_out[22], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L15); --H1_high_ad_or[54] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[54] at LC1_I43 --operation mode is normal H1_high_ad_or[54] = AMPP_FUNCTION(J1_ad_ce[54], H1_high_ad_out_lc[22], pci_rstn, GLOBAL(pci_clk)); --H1L15 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~501 at LC3_I39 --operation mode is normal H1L15 = AMPP_FUNCTION(H1_high_ad_or[54], H1_mstr_trg_low_ad_out_sel); --H1L383 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[23]~423 at LC2_G42 --operation mode is normal H1L383 = AMPP_FUNCTION(H1_trg_cfg_ad_out[23], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L05); --H1_high_ad_or[55] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[55] at LC5_I43 --operation mode is normal H1_high_ad_or[55] = AMPP_FUNCTION(J1_ad_ce[55], H1_high_ad_out_lc[23], pci_rstn, GLOBAL(pci_clk)); --H1L05 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~500 at LC1_G42 --operation mode is normal H1L05 = AMPP_FUNCTION(H1_high_ad_or[55], H1_mstr_trg_low_ad_out_sel); --H1L483 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[24]~424 at LC3_G43 --operation mode is normal H1L483 = AMPP_FUNCTION(H1_trg_cfg_ad_out[24], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L94); --H1_high_ad_or[56] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[56] at LC3_I30 --operation mode is normal H1_high_ad_or[56] = AMPP_FUNCTION(J1_ad_ce[56], H1_high_ad_out_lc[24], pci_rstn, GLOBAL(pci_clk)); --H1L94 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~499 at LC2_G43 --operation mode is normal H1L94 = AMPP_FUNCTION(H1_high_ad_or[56], H1_mstr_trg_low_ad_out_sel); --H1L583 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[25]~425 at LC2_G46 --operation mode is normal H1L583 = AMPP_FUNCTION(H1_trg_cfg_ad_out[25], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L84); --H1_high_ad_or[57] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[57] at LC2_I30 --operation mode is normal H1_high_ad_or[57] = AMPP_FUNCTION(J1_ad_ce[57], H1_high_ad_out_lc[25], pci_rstn, GLOBAL(pci_clk)); --H1L84 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~498 at LC1_G46 --operation mode is normal H1L84 = AMPP_FUNCTION(H1_high_ad_or[57], H1_mstr_trg_low_ad_out_sel); --H1L683 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[26]~426 at LC8_G48 --operation mode is normal H1L683 = AMPP_FUNCTION(H1_trg_cfg_ad_out[26], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L74); --H1_high_ad_or[58] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[58] at LC4_L30 --operation mode is normal H1_high_ad_or[58] = AMPP_FUNCTION(J1_ad_ce[58], H1_high_ad_out_lc[26], pci_rstn, GLOBAL(pci_clk)); --H1L74 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~497 at LC7_G48 --operation mode is normal H1L74 = AMPP_FUNCTION(H1_high_ad_or[58], H1_mstr_trg_low_ad_out_sel); --H1L783 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[27]~427 at LC2_G52 --operation mode is normal H1L783 = AMPP_FUNCTION(H1_trg_cfg_ad_out[27], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L64); --H1_high_ad_or[59] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[59] at LC8_I27 --operation mode is normal H1_high_ad_or[59] = AMPP_FUNCTION(J1_ad_ce[59], H1_high_ad_out_lc[27], pci_rstn, GLOBAL(pci_clk)); --H1L64 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~496 at LC1_G52 --operation mode is normal H1L64 = AMPP_FUNCTION(H1_high_ad_or[59], H1_mstr_trg_low_ad_out_sel); --H1L883 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[28]~428 at LC4_G51 --operation mode is normal H1L883 = AMPP_FUNCTION(H1_trg_cfg_ad_out[28], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L54); --H1_high_ad_or[60] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[60] at LC3_I27 --operation mode is normal H1_high_ad_or[60] = AMPP_FUNCTION(J1_ad_ce[60], H1_high_ad_out_lc[28], pci_rstn, GLOBAL(pci_clk)); --H1L54 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~495 at LC3_G51 --operation mode is normal H1L54 = AMPP_FUNCTION(H1_high_ad_or[60], H1_mstr_trg_low_ad_out_sel); --H1L983 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[29]~429 at LC5_G50 --operation mode is normal H1L983 = AMPP_FUNCTION(H1_trg_cfg_ad_out[29], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L44); --H1_high_ad_or[61] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[61] at LC1_I28 --operation mode is normal H1_high_ad_or[61] = AMPP_FUNCTION(J1_ad_ce[61], H1_high_ad_out_lc[29], pci_rstn, GLOBAL(pci_clk)); --H1L44 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~494 at LC4_G50 --operation mode is normal H1L44 = AMPP_FUNCTION(H1_high_ad_or[61], H1_mstr_trg_low_ad_out_sel); --H1L093 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[30]~430 at LC3_G31 --operation mode is normal H1L093 = AMPP_FUNCTION(H1_trg_cfg_ad_out[30], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L34); --H1_high_ad_or[62] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[62] at LC6_I28 --operation mode is normal H1_high_ad_or[62] = AMPP_FUNCTION(J1_ad_ce[62], H1_high_ad_out_lc[30], pci_rstn, GLOBAL(pci_clk)); --H1L34 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~493 at LC2_G31 --operation mode is normal H1L34 = AMPP_FUNCTION(H1_high_ad_or[62], H1_mstr_trg_low_ad_out_sel); --H1L193 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[31]~431 at LC6_G39 --operation mode is normal H1L193 = AMPP_FUNCTION(H1_trg_cfg_ad_out[31], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L24); --H1_high_ad_or[63] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[63] at LC1_I52 --operation mode is normal H1_high_ad_or[63] = AMPP_FUNCTION(J1_ad_ce[63], H1_high_ad_out_lc[31], pci_rstn, GLOBAL(pci_clk)); --H1L24 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|altr_temp~492 at LC5_G39 --operation mode is normal H1L24 = AMPP_FUNCTION(H1_high_ad_or[63], H1_mstr_trg_low_ad_out_sel); --H1_mstr_cbe_ce is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_cbe_ce at LC2_A25 --operation mode is normal H1_mstr_cbe_ce = AMPP_FUNCTION(K1_MS_ADR, K1_MS_ENA, K1_dac_cyc_reg, K1_MS_ADR2); --K1L301 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~674 at LC8_D4 --operation mode is normal K1L301 = AMPP_FUNCTION(K1_cbe_oer_r1_lc3, K1_cbe_oer_r2_d, K1_cbe_oer_r1_lc1, pci_gntn); --N1L88 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~525 at LC6_F27 --operation mode is normal N1L88 = AMPP_FUNCTION(N1_devsel_OR_lc[3], A1L262, N1_devsel_OR_lc[1], A1L652); --N1_targ_oeR_reg_lc[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|targ_oeR_reg_lc[4] at LC2_B24 --operation mode is normal N1_targ_oeR_reg_lc[4] = AMPP_FUNCTION(N1_targ_oeR_reg_lc[3], N1_targ_oeR_reg_lc[1], N1_targ_oeR_reg_lc[2], N1_adr_phase_lc1); --K1_dac_cyc_strobe is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|dac_cyc_strobe at LC2_D17 --operation mode is normal K1_dac_cyc_strobe = AMPP_FUNCTION(K1_dac_cmd, K1_MS_ENA, pci_gntn, pci_rstn, GLOBAL(pci_clk)); --K1_MS_DXFR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_DXFR at LC4_D6 --operation mode is normal K1_MS_DXFR = AMPP_FUNCTION(K1_ms_dxfr_lc1, K1_ms_dxfr_lc2, K1L02, pci_rstn, GLOBAL(pci_clk)); --K1_irdy_oer_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|irdy_oer_lc1 at LC3_A25 --operation mode is normal K1_irdy_oer_lc1 = AMPP_FUNCTION(K1_MS_DXFR, K1_MS_ADR2, K1_MS_ADR); --H1_mstr_par_oe_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_par_oe_lc2 at LC5_D15 --operation mode is normal H1_mstr_par_oe_lc2 = AMPP_FUNCTION(H1_mstr_par_oe_lc1, H1_trg_par_oe, K1_MS_ADR2, K1_MS_ADR); --L1L3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|altr_temp~76 at LC2_G1 --operation mode is normal L1L3 = AMPP_FUNCTION(L1_perr_or_not_lc1, L1_xxl[11], A1L662); --K1_MS_TAR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_TAR at LC1_D32 --operation mode is normal K1_MS_TAR = AMPP_FUNCTION(K1_$00195, K1_$00196, K1L02, pci_rstn, GLOBAL(pci_clk)); --K1_wr_rdn is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|wr_rdn at LC1_J19 --operation mode is normal K1_wr_rdn = AMPP_FUNCTION(K1_wr_rdn_set, K1_wr_rdn, K1_MS_TAR, pci_rstn, GLOBAL(pci_clk)); --N1L99 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~1606 at LC3_G17 --operation mode is normal N1L99 = AMPP_FUNCTION(N1_adr_phase_lc1, H1_cben_ir_address[1], H1_cben_ir_address[0], N1_LW_IDLE_NOT); --S1_decR[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_cd:cfg_adr_dec|decR[1] at LC3_B17 --operation mode is normal S1_decR[1] = AMPP_FUNCTION(N1_cfg_adr_dec_ena, H1_ad_ir_address[2], S1_dec_up[0], H1_ad_ir_address[3], pci_rstn, GLOBAL(pci_clk)); --H1_low_cben_IR_data[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_cben_IR_data[1] at LC4_G20 --operation mode is normal H1_low_cben_IR_data[1] = AMPP_FUNCTION(H1_cben_IR_ce_data, pci_cben_1, pci_rstn, GLOBAL(pci_clk)); --Q1L601 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|stat_cmd_ena[1]~13 at LC4_G13 --operation mode is normal Q1L601 = AMPP_FUNCTION(N1_cfg_dat_vld, S1_decR[1], H1_low_cben_IR_data[1]); --H1_low_cben_IR_data[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_cben_IR_data[0] at LC6_G20 --operation mode is normal H1_low_cben_IR_data[0] = AMPP_FUNCTION(H1_cben_IR_ce_data, pci_cben_0, pci_rstn, GLOBAL(pci_clk)); --Q1L501 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|stat_cmd_ena[0]~16 at LC8_G4 --operation mode is normal Q1L501 = AMPP_FUNCTION(N1_cfg_dat_vld, S1_decR[1], H1_low_cben_IR_data[0]); --L1_xxlad[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[8] at LC5_G12 --operation mode is normal L1_xxlad[8] = AMPP_FUNCTION(H1_cben_ir_address[2], H1_cben_ir_address[3], H1_cben_ir_address[1], H1_cben_ir_address[0]); --L1_xxlad[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[9] at LC2_B20 --operation mode is normal L1_xxlad[9] = AMPP_FUNCTION(L1_xxlad[0], L1_xxlad[1], L1_xxlad[2], L1_xxlad[3]); --L1_xxlad[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[10] at LC3_G47 --operation mode is normal L1_xxlad[10] = AMPP_FUNCTION(L1_xxlad[4], L1_xxlad[5], L1_xxlad[6], L1_xxlad[7]); --N1L48 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~421 at LC7_F32 --operation mode is normal N1L48 = AMPP_FUNCTION(N1L803, A1L262, A1L652, N1L703); --H1_high_ad_IR_data[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[7] at LC3_I12 --operation mode is normal H1_high_ad_IR_data[7] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[39], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1L422 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|l_dato[39]~50 at LC4_I12 --operation mode is normal H1L422 = AMPP_FUNCTION(H1_high_ad_IR_data[7], H1_low_ad_IR_data[7], H1_local_dat_sel); --H1_high_ad_IR_data[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[6] at LC5_I34 --operation mode is normal H1_high_ad_IR_data[6] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[38], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1L322 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|l_dato[38]~53 at LC3_I26 --operation mode is normal H1L322 = AMPP_FUNCTION(H1_high_ad_IR_data[6], H1_low_ad_IR_data[6], H1_local_dat_sel); --H1_high_ad_IR_data[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[5] at LC8_I18 --operation mode is normal H1_high_ad_IR_data[5] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[37], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1L222 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|l_dato[37]~56 at LC2_I18 --operation mode is normal H1L222 = AMPP_FUNCTION(H1_high_ad_IR_data[5], H1_low_ad_IR_data[5], H1_local_dat_sel); --H1_high_ad_IR_data[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[4] at LC6_I1 --operation mode is normal H1_high_ad_IR_data[4] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[36], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1L122 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|l_dato[36]~59 at LC1_I1 --operation mode is normal H1L122 = AMPP_FUNCTION(H1_high_ad_IR_data[4], H1_low_ad_IR_data[4], H1_local_dat_sel); --H1_high_ad_IR_data[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[3] at LC7_I37 --operation mode is normal H1_high_ad_IR_data[3] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[35], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1L022 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|l_dato[35]~62 at LC1_I37 --operation mode is normal H1L022 = AMPP_FUNCTION(H1_high_ad_IR_data[3], H1_low_ad_IR_data[3], H1_local_dat_sel); --H1_high_ad_IR_data[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[2] at LC5_I6 --operation mode is normal H1_high_ad_IR_data[2] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[34], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1L912 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|l_dato[34]~65 at LC7_I6 --operation mode is normal H1L912 = AMPP_FUNCTION(H1_high_ad_IR_data[2], H1_low_ad_IR_data[2], H1_local_dat_sel); --H1_high_ad_IR_data[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[1] at LC6_I32 --operation mode is normal H1_high_ad_IR_data[1] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[33], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1L812 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|l_dato[33]~68 at LC4_I32 --operation mode is normal H1L812 = AMPP_FUNCTION(H1_high_ad_IR_data[1], H1_low_ad_IR_data[1], H1_local_dat_sel); --H1_high_ad_IR_data[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[0] at LC1_I44 --operation mode is normal H1_high_ad_IR_data[0] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[32], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1L712 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|l_dato[32]~71 at LC2_I44 --operation mode is normal H1L712 = AMPP_FUNCTION(H1_high_ad_IR_data[0], H1_low_ad_IR_data[0], H1_local_dat_sel); --H1_high_data_out_HR[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[8] at LC1_L9 --operation mode is normal H1_high_data_out_HR[8] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, A1L46, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[8] at LC2_L9 --operation mode is normal H1_high_ad_out_lc[8] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[8], H1_mstr_ad_sel, H1_trg_ad_sel); --H1_mstr_trg_hi_ad is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_trg_hi_ad at LC6_L9 --operation mode is normal H1_mstr_trg_hi_ad = AMPP_FUNCTION(H1_mstr_ad_sel, H1_trg_ad_sel, H1_mstr_trg_hr_dat_sel); --K1L952 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack~0 at LC5_A10 --operation mode is normal K1L952 = AMPP_FUNCTION(K1_lm_hdata_ack_lc[8], K1_lm_hdata_ack_lc[6], N1_targ_oeR_reg, N1_ack64_OR_not); --K1_tgt_64_response_set is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|tgt_64_response_set at LC2_A13 --operation mode is normal K1_tgt_64_response_set = AMPP_FUNCTION(K1_MS_IDLE_not, K1_MS_REQ); --K1_MR_END is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_END at LC2_A1 --operation mode is normal K1_MR_END = AMPP_FUNCTION(K1_MR_END_d_lc1, N1_no_op_reg[1], A1L472, pci_rstn, GLOBAL(pci_clk), K1_$00262); --K1_tgt_64_response_reset is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|tgt_64_response_reset at LC6_A13 --operation mode is normal K1_tgt_64_response_reset = AMPP_FUNCTION(K1_tgt_64_response_reset_lc1, K1_MR_END, K1_MS_REQ); --N1_lt_hdata_ack_r_d[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_hdata_ack_r_d[4] at LC1_F19 --operation mode is normal N1_lt_hdata_ack_r_d[4] = AMPP_FUNCTION(N1_lt_hdata_ack_r_d4_lc, K1_mstr_actv_lc); --N1_mem_cyc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|mem_cyc at LC5_G17 --operation mode is normal N1_mem_cyc = AMPP_FUNCTION(N1_mem_cyc, N1_adr_phase_lc1, N1_mem_cyc_s_lc, N1_TS_IDLE_NOT, pci_rstn, GLOBAL(pci_clk)); --N1_lt_hdata_ack_r_d[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_hdata_ack_r_d[1] at LC3_F19 --operation mode is normal N1_lt_hdata_ack_r_d[1] = AMPP_FUNCTION(N1_lt_ldata_ack_r_d[1], N1_mem_cyc); --N1_cfg_cyc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|cfg_cyc at LC3_B24 --operation mode is normal N1_cfg_cyc = AMPP_FUNCTION(N1L79, N1_targ_oeR_reg_lc[1], N1_cfg_cyc, N1L383, pci_rstn, GLOBAL(pci_clk)); --H1_trg_ad_IR_ce_D is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_ad_IR_ce_D at LC1_A4 --operation mode is normal H1_trg_ad_IR_ce_D = AMPP_FUNCTION(N1_ad_ir_ce_D_lc1, N1_cfg_cyc, N1_TS_TURN_AR, K1_mstr_actv_lc); --K1_MR_LWAIT is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LWAIT at LC8_A5 --operation mode is normal K1_MR_LWAIT = AMPP_FUNCTION(K1_MR_LWAIT_lc2, A1L472, pci_rstn, GLOBAL(pci_clk), K1_$00252); --K1_MR_LLWAIT_r2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LLWAIT_r2 at LC3_A15 --operation mode is normal K1_MR_LLWAIT_r2 = AMPP_FUNCTION(K1_devsel_toR, pci_rstn, GLOBAL(pci_clk), K1_$00256); --K1_MR_LLWAIT_r1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LLWAIT_r1 at LC7_A15 --operation mode is normal K1_MR_LLWAIT_r1 = AMPP_FUNCTION(K1_MR_LLWAIT_r1_lc2, A1L472, pci_rstn, GLOBAL(pci_clk), K1_$00255); --K1_MR_LLWAIT_r1_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LLWAIT_r1_lc2 at LC5_A15 --operation mode is normal K1_MR_LLWAIT_r1_lc2 = AMPP_FUNCTION(K1_MR_LLWAIT_r2, K1_MR_LLWAIT_r1); --K1_MR_LLXFR_r2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LLXFR_r2 at LC3_A17 --operation mode is normal K1_MR_LLXFR_r2 = AMPP_FUNCTION(pci_rstn, GLOBAL(pci_clk), K1_$00259); --K1_MR_LLXFR_r1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LLXFR_r1 at LC4_C12 --operation mode is normal K1_MR_LLXFR_r1 = AMPP_FUNCTION(K1_MR_LLXFR_r1_d_lc1, K1L04, A1L472, pci_rstn, GLOBAL(pci_clk)); --K1_MR_LLXFR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LLXFR at LC3_A8 --operation mode is normal K1_MR_LLXFR = AMPP_FUNCTION(K1_MR_LLXFR_r2, K1_MR_LLXFR_r1); --H1_mstr_ad_IR_ce_D is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_ad_IR_ce_D at LC2_A4 --operation mode is normal H1_mstr_ad_IR_ce_D = AMPP_FUNCTION(K1_MS_IDLE_not, K1_MR_LWAIT, K1_MR_LLWAIT_r1_lc2, K1_MR_LLXFR); --P4_REG is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_sr:trans64_sr_edge|REG at LC5_F20 --operation mode is normal P4_REG = AMPP_FUNCTION(N1L201, P4_REG, N1_trans64_sr_edge_rst, pci_rstn, GLOBAL(pci_clk)); --N1_lt_ldata_ack_r_d[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ldata_ack_r_d[4] at LC3_F1 --operation mode is normal N1_lt_ldata_ack_r_d[4] = AMPP_FUNCTION(P4_REG, N1_lt_ldata_ack_r_ena_lc2, N1_lt_ldata_ack_r_d[2], N1_lt_ldata_ack_r_d[1]); --N1_lt_ldata_ack_r_d[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ldata_ack_r_d[3] at LC4_F1 --operation mode is normal N1_lt_ldata_ack_r_d[3] = AMPP_FUNCTION(N1_lt_ldata_ack_r_d[2], N1_TS_IDLE_NOT, N1_TS_ADR_VLD, P5_REG); --N1_TS_ADR_CLMD is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_ADR_CLMD at LC1_F21 --operation mode is normal N1_TS_ADR_CLMD = AMPP_FUNCTION(N1L053, N1_TS_ADR_VLD, K1_mstr_actv_lc, L1_serr_or, pci_rstn, GLOBAL(pci_clk)); --N1L69 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~1584 at LC1_F12 --operation mode is normal N1L69 = AMPP_FUNCTION(N1_TS_ADR_CLMD, N1_TS_ADR_VLD); --N1_lt_ldata_ack_r_prn3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ldata_ack_r_prn3 at LC4_F11 --operation mode is normal N1_lt_ldata_ack_r_prn3 = AMPP_FUNCTION(N1_lt_ldata_ack_r_prn1, N1_mem_cyc, N1_retry, N1L69); --N1_lt_ldata_ack_r_ena is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ldata_ack_r_ena at LC5_F1 --operation mode is normal N1_lt_ldata_ack_r_ena = AMPP_FUNCTION(N1_lt_ldata_ack_r_ena_lc1, N1_lw_lr_done, N1_lt_ldata_ack_r_ena_lc2, N1_lt_ldata_ack_r_prn3); --K1_park is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|park at LC4_D17 --operation mode is normal K1_park = AMPP_FUNCTION(A1L652, Q1_cmd_reg[2], pci_gntn, pci_rstn, GLOBAL(pci_clk), K1_$00070); --K1_MS_ENA_d_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_ENA_d_lc at LC7_D15 --operation mode is normal K1_MS_ENA_d_lc = AMPP_FUNCTION(K1_park, K1_MS_REQ); --K1_lm_ldata_ack_ena3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ldata_ack_ena3 at LC7_A9 --operation mode is normal K1_lm_ldata_ack_ena3 = AMPP_FUNCTION(K1_lm_ldata_ack_ena2, K1_MS_ENA, K1_$00112); --H1_high_data_out_HR[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[9] at LC3_I15 --operation mode is normal H1_high_data_out_HR[9] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, A1L36, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[9] at LC4_I15 --operation mode is normal H1_high_ad_out_lc[9] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[9], H1_mstr_ad_sel, H1_trg_ad_sel); --N1_ad_ir_ce_A_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|ad_ir_ce_A_lc2 at LC5_F9 --operation mode is normal N1_ad_ir_ce_A_lc2 = AMPP_FUNCTION(N1_TS_TURN_AR, N1_LW_LXFR, N1_cfg_cyc, N1_TS_IDLE_NOT); --N1_ad_ir_ce_A_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|ad_ir_ce_A_lc1 at LC6_F9 --operation mode is normal N1_ad_ir_ce_A_lc1 = AMPP_FUNCTION(N1_adr_phase_lc1, N1_cfg_cyc, N1_TS_IDLE_NOT); --K1_lm_adr_ack_R is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_adr_ack_R at LC1_D17 --operation mode is normal K1_lm_adr_ack_R = AMPP_FUNCTION(K1_lm_adr_ack_R_lc1, K1_lm_adr_ack_R, K1_lm_adr_ack_R_lc2, pci_gntn, pci_rstn, GLOBAL(pci_clk)); --imm_dpm_dec_reg_tmp is imm_dpm_dec_reg_tmp at LC2_G11 --operation mode is normal imm_dpm_dec_reg_tmp_lut_out = Q1_bar_hitR[0] & N1_TS_IDLE_NOT; imm_dpm_dec_reg_tmp = DFFEA(imm_dpm_dec_reg_tmp_lut_out, GLOBAL(pci_clk), pci_rstn, , , , ); --N1L72 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00199~0 at LC2_F29 --operation mode is normal N1L72 = AMPP_FUNCTION(N1_TS_ADR_CLMD, K1_mstr_actv_lc, N1_retry, N1_LW_IDLE_NOT); --N1L372 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LW_IDLE_lc1~12 at LC5_F29 --operation mode is normal N1L372 = AMPP_FUNCTION(imm_dpm_dec_reg_LT_RDY_n_pci, P5_REG, N1_cfg_cyc, N1L62); --N1_TS_DISC_d_lc3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_DISC_d_lc3 at LC8_F50 --operation mode is normal N1_TS_DISC_d_lc3 = AMPP_FUNCTION(N1_targ_burst_lc, N1_cfg_cyc); --N1L353 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_DISC_d_lc1~8 at LC5_F8 --operation mode is normal N1L353 = AMPP_FUNCTION(N1_targ_burst_lc, N1_cfg_cyc, N1_TS_DXFR, N1_trdy_OR_NOT, N1L52); --N1_TS_TURN_AR_d_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_TURN_AR_d_lc1 at LC7_F8 --operation mode is normal N1_TS_TURN_AR_d_lc1 = AMPP_FUNCTION(N1_TS_DXFR, N1_trdy_OR_NOT); --N1_lt_ack_R_r1_lc[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r1_lc[5] at LC2_F15 --operation mode is normal N1_lt_ack_R_r1_lc[5] = AMPP_FUNCTION(N1_TS_ADR_VLD, N1_cfg_cyc, P5_REG, N1_LR_IDLE_NOT); --N1_lt_ack_R_r1_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r1_lc[3] at LC2_F12 --operation mode is normal N1_lt_ack_R_r1_lc[3] = AMPP_FUNCTION(N1_LR_LXFR, N1_TS_ADR_CLMD, N1_TS_ADR_VLD, N1_lt_ldata_ack_r); --N1_lt_ack_R_r1_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r1_lc[2] at LC5_F12 --operation mode is normal N1_lt_ack_R_r1_lc[2] = AMPP_FUNCTION(N1_direct_xfr, N1_lt_ldata_ack_r, N1_lt_rdynR_R, N1_lt_rdynR); --N1_lt_ack_R_r1_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r1_lc[1] at LC8_F12 --operation mode is normal N1_lt_ack_R_r1_lc[1] = AMPP_FUNCTION(N1_lt_rdynR, N1_direct_xfr, N1_lt_rdynR_R, N1_lt_ldata_ack_r); --N1L483 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|~280 at LC6_G12 --operation mode is normal N1L483 = AMPP_FUNCTION(H1_cben_ir_address[2], H1_cben_ir_address[3], H1_cben_ir_address[1], H1_cben_ir_address[0]); --N1_lt_ack_R_r3_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r3_lc2 at LC8_F5 --operation mode is normal N1_lt_ack_R_r3_lc2 = AMPP_FUNCTION(N1_LR_PXFR, N1_TS_ADR_CLMD, N1_TS_ADR_VLD, N1_lt_rdynR); --N1_lt_ack_R_r3_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ack_R_r3_lc1 at LC6_F12 --operation mode is normal N1_lt_ack_R_r3_lc1 = AMPP_FUNCTION(N1_LR_PXFR, N1_direct_xfr, N1_lt_ldata_ack_r, N1_lt_rdynR); --N1L89 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~1589 at LC1_F7 --operation mode is normal N1L89 = AMPP_FUNCTION(A1L262, A1L652); --N1L301 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~1676 at LC1_F7 --operation mode is normal N1L301 = AMPP_FUNCTION(A1L262, A1L652); --V71_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|comptree:sub_comptree|cmpchain:cmp_end|aeb_out at LC6_G30 --operation mode is normal V71_aeb_out = V61_aeb_out & V01_aeb_out & V4_aeb_out; --Q1_cmd_reg[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cmd_reg[1] at LC3_I19 --operation mode is normal Q1_cmd_reg[1] = AMPP_FUNCTION(Q1L501, H1_low_ad_IR_data[1], pci_rstn, GLOBAL(pci_clk)); --Q1_cyc_vld[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cyc_vld[0] at LC8_G17 --operation mode is normal Q1_cyc_vld[0] = AMPP_FUNCTION(Q1_mem_cyc, Q1_cmd_reg[1]); --N1_frame_IR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|frame_IR at LC1_F25 --operation mode is normal N1_frame_IR = AMPP_FUNCTION(A1L652, pci_rstn, GLOBAL(pci_clk)); --N1_frame_I1R is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|frame_I1R at LC2_F25 --operation mode is normal N1_frame_I1R = AMPP_FUNCTION(N1_frame_IR, pci_rstn, GLOBAL(pci_clk)); --N1_adr_phase_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|adr_phase_lc1 at LC4_F25 --operation mode is normal N1_adr_phase_lc1 = AMPP_FUNCTION(N1_frame_IR, N1_frame_I1R); --F1_q[0] is LPM_RAM_DP:imm_dpm_dp_n_dpram|altdpram:sram|q[0] at EC1_K F1_q[0]_data_in = ADC1_D[0]; F1_q[0]_write_enable = !imm_dpm_dp_n_reg_we_p; F1_q[0]_clock_0 = ADC2_D[3]; F1_q[0]_clock_1 = GLOBAL(pci_clk); F1_q[0]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6], E2_q[7], E2_q[8], E2_q[9], E2_q[10]); F1_q[0]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F1_q[0] = MEMORY_SEGMENT(F1_q[0]_data_in, F1_q[0]_write_enable, F1_q[0]_clock_0, F1_q[0]_clock_1, , , , VCC, F1_q[0]_write_address, F1_q[0]_read_address); --A1L27 is ix1178_lc~0 at LC6_I44 --operation mode is normal A1L27 = (N1L022 # ix1208_lc # imm_dpm_dec_reg_rdata_LED_0 & ix1215_lc) & CASCADE(A1L841); --H1_mstr_trg_low_ad_out_sel is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_trg_low_ad_out_sel at LC1_C26 --operation mode is normal H1_mstr_trg_low_ad_out_sel = AMPP_FUNCTION(H1_mstr_ad_sel, H1_trg_ad_sel, H1_mstr_hi_low_sel, H1_hi_low_sel); --K1_WAIT_WAIT32 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|WAIT_WAIT32 at LC3_C19 --operation mode is normal K1_WAIT_WAIT32 = AMPP_FUNCTION(N1_no_op_reg[1], pci_rstn, GLOBAL(pci_clk), K1L12); --N1_WAIT_wait32 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|WAIT_wait32 at LC2_F24 --operation mode is normal N1_WAIT_wait32 = AMPP_FUNCTION(N1_no_op_reg[1], A1L652, pci_rstn, GLOBAL(pci_clk), N1L8); --H1_mstr_trg_hr_dat_sel is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_trg_hr_dat_sel at LC4_F24 --operation mode is normal H1_mstr_trg_hr_dat_sel = AMPP_FUNCTION(K1_MW_LAST, K1_WAIT_WAIT32, N1_WAIT_wait32, K1_dac_cyc_strobe); --H1L063 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[0]~432 at LC7_I4 --operation mode is normal H1L063 = AMPP_FUNCTION(H1_trg_cfg_ad_out[0], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L293); --H1_high_ad_or[32] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[32] at LC4_I44 --operation mode is normal H1_high_ad_or[32] = AMPP_FUNCTION(J1_ad_ce[32], A1L27, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[0], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[0] at LC1_I4 --operation mode is normal H1_low_data_out_HR[0] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, A1L27, pci_rstn, GLOBAL(pci_clk)); --H1L293 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[0]~31 at LC6_I4 --operation mode is normal H1L293 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[32], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[0]); --K1_mstr_abrt is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|mstr_abrt at LC1_D12 --operation mode is normal K1_mstr_abrt = AMPP_FUNCTION(K1_devsel_toR, pci_rstn, GLOBAL(pci_clk)); --K1_ad_oer_lc3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ad_oer_lc3 at LC2_D12 --operation mode is normal K1_ad_oer_lc3 = AMPP_FUNCTION(K1_MS_DXFR, K1_wr_rdn, K1_mstr_abrt); --K1_ad_oer_lc2d is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ad_oer_lc2d at LC3_D12 --operation mode is normal K1_ad_oer_lc2d = AMPP_FUNCTION(K1_ad_oer_lc2b, K1_ad_oer_lc2c, K1_dac_cyc_strobe); --K1_idle_reg is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|idle_reg at LC6_D4 --operation mode is normal K1_idle_reg = AMPP_FUNCTION(A1L652, pci_rstn, GLOBAL(pci_clk), K1_$00071); --K1_ad_oer_lc2a is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ad_oer_lc2a at LC2_D4 --operation mode is normal K1_ad_oer_lc2a = AMPP_FUNCTION(K1_idle_reg, K1_MS_REQ, K1_MS_IDLE_not); --F1_q[1] is LPM_RAM_DP:imm_dpm_dp_n_dpram|altdpram:sram|q[1] at EC1_I F1_q[1]_data_in = ADC1_D[1]; F1_q[1]_write_enable = !imm_dpm_dp_n_reg_we_p; F1_q[1]_clock_0 = ADC2_D[3]; F1_q[1]_clock_1 = GLOBAL(pci_clk); F1_q[1]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6], E2_q[7], E2_q[8], E2_q[9], E2_q[10]); F1_q[1]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F1_q[1] = MEMORY_SEGMENT(F1_q[1]_data_in, F1_q[1]_write_enable, F1_q[1]_clock_0, F1_q[1]_clock_1, , , , VCC, F1_q[1]_write_address, F1_q[1]_read_address); --A1L17 is ix1177_lc~0 at LC3_I32 --operation mode is normal A1L17 = (N1L022 # ix1209_lc # imm_dpm_dec_reg_rdata_LED_1 & ix1215_lc) & CASCADE(A1L741); --H1L163 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[1]~433 at LC5_I3 --operation mode is normal H1L163 = AMPP_FUNCTION(H1_trg_cfg_ad_out[1], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L393); --H1_high_ad_or[33] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[33] at LC1_I32 --operation mode is normal H1_high_ad_or[33] = AMPP_FUNCTION(J1_ad_ce[33], A1L17, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[1], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[1] at LC1_I3 --operation mode is normal H1_low_data_out_HR[1] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, A1L17, pci_rstn, GLOBAL(pci_clk)); --H1L393 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[1]~30 at LC4_I3 --operation mode is normal H1L393 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[33], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[1]); --F1_q[2] is LPM_RAM_DP:imm_dpm_dp_n_dpram|altdpram:sram|q[2] at EC9_I F1_q[2]_data_in = ADC1_D[2]; F1_q[2]_write_enable = !imm_dpm_dp_n_reg_we_p; F1_q[2]_clock_0 = ADC2_D[3]; F1_q[2]_clock_1 = GLOBAL(pci_clk); F1_q[2]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6], E2_q[7], E2_q[8], E2_q[9], E2_q[10]); F1_q[2]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F1_q[2] = MEMORY_SEGMENT(F1_q[2]_data_in, F1_q[2]_write_enable, F1_q[2]_clock_0, F1_q[2]_clock_1, , , , VCC, F1_q[2]_write_address, F1_q[2]_read_address); --A1L07 is ix1176_lc~0 at LC4_J17 --operation mode is normal A1L07 = (N1L022 # ix1210_lc # imm_dpm_dec_reg_rdata_LED_2 & ix1215_lc) & CASCADE(A1L641); --H1L263 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[2]~434 at LC6_J5 --operation mode is normal H1L263 = AMPP_FUNCTION(H1_trg_cfg_ad_out[2], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L493); --H1_high_ad_or[34] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[34] at LC8_J17 --operation mode is normal H1_high_ad_or[34] = AMPP_FUNCTION(J1_ad_ce[34], A1L07, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[2], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[2] at LC1_J5 --operation mode is normal H1_low_data_out_HR[2] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, A1L07, pci_rstn, GLOBAL(pci_clk)); --H1L493 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[2]~29 at LC5_J5 --operation mode is normal H1L493 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[34], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[2]); --F1_q[3] is LPM_RAM_DP:imm_dpm_dp_n_dpram|altdpram:sram|q[3] at EC1_E F1_q[3]_data_in = ADC1_D[3]; F1_q[3]_write_enable = !imm_dpm_dp_n_reg_we_p; F1_q[3]_clock_0 = ADC2_D[3]; F1_q[3]_clock_1 = GLOBAL(pci_clk); F1_q[3]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6], E2_q[7], E2_q[8], E2_q[9], E2_q[10]); F1_q[3]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F1_q[3] = MEMORY_SEGMENT(F1_q[3]_data_in, F1_q[3]_write_enable, F1_q[3]_clock_0, F1_q[3]_clock_1, , , , VCC, F1_q[3]_write_address, F1_q[3]_read_address); --A1L96 is ix1175_lc~0 at LC6_I37 --operation mode is normal A1L96 = (N1L022 # ix1211_lc # imm_dpm_dec_reg_rdata_LED_3 & ix1215_lc) & CASCADE(A1L541); --H1L363 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[3]~435 at LC2_I5 --operation mode is normal H1L363 = AMPP_FUNCTION(H1_trg_cfg_ad_out[3], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L593); --H1_high_ad_or[35] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[35] at LC8_I5 --operation mode is normal H1_high_ad_or[35] = AMPP_FUNCTION(J1_ad_ce[35], A1L96, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[3], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[3] at LC3_I5 --operation mode is normal H1_low_data_out_HR[3] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, A1L96, pci_rstn, GLOBAL(pci_clk)); --H1L593 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[3]~28 at LC1_I5 --operation mode is normal H1L593 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[35], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[3]); --F1_q[4] is LPM_RAM_DP:imm_dpm_dp_n_dpram|altdpram:sram|q[4] at EC9_E F1_q[4]_data_in = ADC1_D[4]; F1_q[4]_write_enable = !imm_dpm_dp_n_reg_we_p; F1_q[4]_clock_0 = ADC2_D[3]; F1_q[4]_clock_1 = GLOBAL(pci_clk); F1_q[4]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6], E2_q[7], E2_q[8], E2_q[9], E2_q[10]); F1_q[4]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F1_q[4] = MEMORY_SEGMENT(F1_q[4]_data_in, F1_q[4]_write_enable, F1_q[4]_clock_0, F1_q[4]_clock_1, , , , VCC, F1_q[4]_write_address, F1_q[4]_read_address); --A1L86 is ix1174_lc~0 at LC8_I1 --operation mode is normal A1L86 = (N1L022 # ix1212_lc # imm_dpm_dec_reg_rdata_LED_4 & ix1215_lc) & CASCADE(A1L441); --H1L463 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[4]~436 at LC8_I7 --operation mode is normal H1L463 = AMPP_FUNCTION(H1_trg_cfg_ad_out[4], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L693); --H1_high_ad_or[36] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[36] at LC5_I1 --operation mode is normal H1_high_ad_or[36] = AMPP_FUNCTION(J1_ad_ce[36], A1L86, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[4], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[4] at LC1_I7 --operation mode is normal H1_low_data_out_HR[4] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, A1L86, pci_rstn, GLOBAL(pci_clk)); --H1L693 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[4]~27 at LC7_I7 --operation mode is normal H1L693 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[36], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[4]); --F1_q[5] is LPM_RAM_DP:imm_dpm_dp_n_dpram|altdpram:sram|q[5] at EC1_G F1_q[5]_data_in = ADC1_D[5]; F1_q[5]_write_enable = !imm_dpm_dp_n_reg_we_p; F1_q[5]_clock_0 = ADC2_D[3]; F1_q[5]_clock_1 = GLOBAL(pci_clk); F1_q[5]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6], E2_q[7], E2_q[8], E2_q[9], E2_q[10]); F1_q[5]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F1_q[5] = MEMORY_SEGMENT(F1_q[5]_data_in, F1_q[5]_write_enable, F1_q[5]_clock_0, F1_q[5]_clock_1, , , , VCC, F1_q[5]_write_address, F1_q[5]_read_address); --A1L76 is ix1173_lc~0 at LC7_I18 --operation mode is normal A1L76 = (N1L022 # ix1213_lc # imm_dpm_dec_reg_rdata_LED_5 & ix1215_lc) & CASCADE(A1L341); --H1L563 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[5]~437 at LC5_I8 --operation mode is normal H1L563 = AMPP_FUNCTION(H1_trg_cfg_ad_out[5], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L793); --H1_high_ad_or[37] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[37] at LC3_I18 --operation mode is normal H1_high_ad_or[37] = AMPP_FUNCTION(J1_ad_ce[37], A1L76, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[5], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[5] at LC1_I8 --operation mode is normal H1_low_data_out_HR[5] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, A1L76, pci_rstn, GLOBAL(pci_clk)); --H1L793 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[5]~26 at LC4_I8 --operation mode is normal H1L793 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[37], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[5]); --F1_q[6] is LPM_RAM_DP:imm_dpm_dp_n_dpram|altdpram:sram|q[6] at EC9_G F1_q[6]_data_in = ADC1_D[6]; F1_q[6]_write_enable = !imm_dpm_dp_n_reg_we_p; F1_q[6]_clock_0 = ADC2_D[3]; F1_q[6]_clock_1 = GLOBAL(pci_clk); F1_q[6]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6], E2_q[7], E2_q[8], E2_q[9], E2_q[10]); F1_q[6]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F1_q[6] = MEMORY_SEGMENT(F1_q[6]_data_in, F1_q[6]_write_enable, F1_q[6]_clock_0, F1_q[6]_clock_1, , , , VCC, F1_q[6]_write_address, F1_q[6]_read_address); --A1L66 is ix1172_lc~0 at LC2_I26 --operation mode is normal A1L66 = (N1L022 # ix1214_lc # imm_dpm_dec_reg_rdata_LED_6 & ix1215_lc) & CASCADE(A1L241); --H1L663 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[6]~438 at LC7_I10 --operation mode is normal H1L663 = AMPP_FUNCTION(H1_trg_cfg_ad_out[6], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L893); --H1_high_ad_or[38] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[38] at LC8_I14 --operation mode is normal H1_high_ad_or[38] = AMPP_FUNCTION(J1_ad_ce[38], A1L66, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[6], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[6] at LC1_I10 --operation mode is normal H1_low_data_out_HR[6] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, A1L66, pci_rstn, GLOBAL(pci_clk)); --H1L893 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[6]~25 at LC6_I10 --operation mode is normal H1L893 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[38], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[6]); --F1_q[7] is LPM_RAM_DP:imm_dpm_dp_n_dpram|altdpram:sram|q[7] at EC9_K F1_q[7]_data_in = ADC1_D[7]; F1_q[7]_write_enable = !imm_dpm_dp_n_reg_we_p; F1_q[7]_clock_0 = ADC2_D[3]; F1_q[7]_clock_1 = GLOBAL(pci_clk); F1_q[7]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6], E2_q[7], E2_q[8], E2_q[9], E2_q[10]); F1_q[7]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F1_q[7] = MEMORY_SEGMENT(F1_q[7]_data_in, F1_q[7]_write_enable, F1_q[7]_clock_0, F1_q[7]_clock_1, , , , VCC, F1_q[7]_write_address, F1_q[7]_read_address); --A1L56 is ix1171_lc~0 at LC6_J17 --operation mode is normal A1L56 = (N1L022 # ix1216_lc # imm_dpm_dec_reg_rdata_LED_7 & ix1215_lc) & CASCADE(A1L141); --H1L763 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[7]~439 at LC6_J14 --operation mode is normal H1L763 = AMPP_FUNCTION(H1_trg_cfg_ad_out[7], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L993); --H1_high_ad_or[39] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[39] at LC3_L9 --operation mode is normal H1_high_ad_or[39] = AMPP_FUNCTION(J1_ad_ce[39], A1L56, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[7], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[7] at LC1_J14 --operation mode is normal H1_low_data_out_HR[7] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, A1L56, pci_rstn, GLOBAL(pci_clk)); --H1L993 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[7]~24 at LC5_J14 --operation mode is normal H1L993 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[39], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[7]); --F2_q[0] is LPM_RAM_DP:imm_dpm_dp_p_dpram|altdpram:sram|q[0] at EC9_H F2_q[0]_data_in = ADC1_D[0]; F2_q[0]_write_enable = !GLOBAL(imm_dpm_dp_p_reg_we_p); F2_q[0]_clock_0 = !ADC2_D[3]; F2_q[0]_clock_1 = GLOBAL(pci_clk); F2_q[0]_write_address = WR_ADDR(E3_q[0], E3_q[1], E3_q[2], E3_q[3], E3_q[4], E3_q[5], E3_q[6], E3_q[7], E3_q[8], E3_q[9], E3_q[10]); F2_q[0]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F2_q[0] = MEMORY_SEGMENT(F2_q[0]_data_in, F2_q[0]_write_enable, F2_q[0]_clock_0, F2_q[0]_clock_1, , , , VCC, F2_q[0]_write_address, F2_q[0]_read_address); --H1L863 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[8]~440 at LC6_L13 --operation mode is normal H1L863 = AMPP_FUNCTION(H1_trg_cfg_ad_out[8], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L004); --H1_low_data_out_HR[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[8] at LC2_L13 --operation mode is normal H1_low_data_out_HR[8] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, A1L46, pci_rstn, GLOBAL(pci_clk)); --H1L004 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[8]~23 at LC5_L13 --operation mode is normal H1L004 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[40], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[8]); --F2_q[1] is LPM_RAM_DP:imm_dpm_dp_p_dpram|altdpram:sram|q[1] at EC1_L F2_q[1]_data_in = ADC1_D[1]; F2_q[1]_write_enable = !GLOBAL(imm_dpm_dp_p_reg_we_p); F2_q[1]_clock_0 = !ADC2_D[3]; F2_q[1]_clock_1 = GLOBAL(pci_clk); F2_q[1]_write_address = WR_ADDR(E3_q[0], E3_q[1], E3_q[2], E3_q[3], E3_q[4], E3_q[5], E3_q[6], E3_q[7], E3_q[8], E3_q[9], E3_q[10]); F2_q[1]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F2_q[1] = MEMORY_SEGMENT(F2_q[1]_data_in, F2_q[1]_write_enable, F2_q[1]_clock_0, F2_q[1]_clock_1, , , , VCC, F2_q[1]_write_address, F2_q[1]_read_address); --H1L963 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[9]~441 at LC7_I15 --operation mode is normal H1L963 = AMPP_FUNCTION(H1_trg_cfg_ad_out[9], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L104); --H1_low_data_out_HR[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[9] at LC5_I15 --operation mode is normal H1_low_data_out_HR[9] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, A1L36, pci_rstn, GLOBAL(pci_clk)); --H1L104 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[9]~22 at LC6_I15 --operation mode is normal H1L104 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[41], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[9]); --ix1182 is ix1182 at LC5_J16 --operation mode is normal ix1182 = N1L022 # !E3_q[10] # !N1L112 # !N1L212; --F2_q[2] is LPM_RAM_DP:imm_dpm_dp_p_dpram|altdpram:sram|q[2] at EC9_L F2_q[2]_data_in = ADC1_D[2]; F2_q[2]_write_enable = !GLOBAL(imm_dpm_dp_p_reg_we_p); F2_q[2]_clock_0 = !ADC2_D[3]; F2_q[2]_clock_1 = GLOBAL(pci_clk); F2_q[2]_write_address = WR_ADDR(E3_q[0], E3_q[1], E3_q[2], E3_q[3], E3_q[4], E3_q[5], E3_q[6], E3_q[7], E3_q[8], E3_q[9], E3_q[10]); F2_q[2]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F2_q[2] = MEMORY_SEGMENT(F2_q[2]_data_in, F2_q[2]_write_enable, F2_q[2]_clock_0, F2_q[2]_clock_1, , , , VCC, F2_q[2]_write_address, F2_q[2]_read_address); --H1L073 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[10]~442 at LC3_I16 --operation mode is normal H1L073 = AMPP_FUNCTION(H1_trg_cfg_ad_out[10], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L204); --H1_high_ad_or[42] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[42] at LC7_I16 --operation mode is normal H1_high_ad_or[42] = AMPP_FUNCTION(J1_ad_ce[42], H1_mstr_trg_hi_ad, H1_high_ad_out_lc[10], A1L26, pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[10] at LC1_I16 --operation mode is normal H1_low_data_out_HR[10] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_mstr_ad_sel, H1_low_data_out_HR_lc, A1L26, pci_rstn, GLOBAL(pci_clk)); --H1L204 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[10]~21 at LC2_I16 --operation mode is normal H1L204 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[42], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[10]); --ix1181 is ix1181 at LC2_J16 --operation mode is normal ix1181 = N1L022 # !E3_q[11] # !N1L112 # !N1L212; --F2_q[3] is LPM_RAM_DP:imm_dpm_dp_p_dpram|altdpram:sram|q[3] at EC9_J F2_q[3]_data_in = ADC1_D[3]; F2_q[3]_write_enable = !GLOBAL(imm_dpm_dp_p_reg_we_p); F2_q[3]_clock_0 = !ADC2_D[3]; F2_q[3]_clock_1 = GLOBAL(pci_clk); F2_q[3]_write_address = WR_ADDR(E3_q[0], E3_q[1], E3_q[2], E3_q[3], E3_q[4], E3_q[5], E3_q[6], E3_q[7], E3_q[8], E3_q[9], E3_q[10]); F2_q[3]_read_address = RD_ADDR(N1L902, N1L012, N1L112, N1L212, N1L312, N1L412, N1L512, N1L612, N1L712, N1L812, N1L912); F2_q[3] = MEMORY_SEGMENT(F2_q[3]_data_in, F2_q[3]_write_enable, F2_q[3]_clock_0, F2_q[3]_clock_1, , , , VCC, F2_q[3]_write_address, F2_q[3]_read_address); --H1L173 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[11]~443 at LC4_I17 --operation mode is normal H1L173 = AMPP_FUNCTION(H1_trg_cfg_ad_out[11], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L304); --H1_high_ad_or[43] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[43] at LC5_I17 --operation mode is normal H1_high_ad_or[43] = AMPP_FUNCTION(J1_ad_ce[43], H1_mstr_trg_hi_ad, H1_high_ad_out_lc[11], A1L16, pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[11] at LC1_I17 --operation mode is normal H1_low_data_out_HR[11] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_mstr_ad_sel, H1_low_data_out_HR_lc, A1L16, pci_rstn, GLOBAL(pci_clk)); --H1L304 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[11]~20 at LC3_I17 --operation mode is normal H1L304 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[43], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[11]); --imm_dpm_dp_p_reg_we_p is imm_dpm_dp_p_reg_we_p at LC1_J25 --operation mode is normal imm_dpm_dp_p_reg_we_p_lut_out = VCC; imm_dpm_dp_p_reg_we_p = DFFEA(imm_dpm_dp_p_reg_we_p_lut_out, !ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , A1L15, , ); --H1_ad_ir_address[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[2] at LC3_I6 --operation mode is normal H1_ad_ir_address[2] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_2, pci_rstn, GLOBAL(pci_clk)); --N1L902 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[2]~29 at LC2_J2 --operation mode is normal N1L902 = AMPP_FUNCTION(H1_ad_ir_address[2], N1_no_op_reg[1]); --H1_ad_ir_address[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[3] at LC5_B17 --operation mode is normal H1_ad_ir_address[3] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_3, pci_rstn, GLOBAL(pci_clk)); --N1L012 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[3]~28 at LC2_B17 --operation mode is normal N1L012 = AMPP_FUNCTION(H1_ad_ir_address[3], N1_no_op_reg[1]); --H1_ad_ir_address[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[6] at LC5_B20 --operation mode is normal H1_ad_ir_address[6] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_6, pci_rstn, GLOBAL(pci_clk)); --N1L312 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[6]~25 at LC1_B20 --operation mode is normal N1L312 = AMPP_FUNCTION(H1_ad_ir_address[6], N1_no_op_reg[1]); --H1_ad_ir_address[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[7] at LC6_B20 --operation mode is normal H1_ad_ir_address[7] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_7, pci_rstn, GLOBAL(pci_clk)); --N1L412 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[7]~24 at LC3_B20 --operation mode is normal N1L412 = AMPP_FUNCTION(H1_ad_ir_address[7], N1_no_op_reg[1]); --H1_ad_ir_address[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[8] at LC4_D15 --operation mode is normal H1_ad_ir_address[8] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_8, pci_rstn, GLOBAL(pci_clk)); --N1L512 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[8]~23 at LC2_D15 --operation mode is normal N1L512 = AMPP_FUNCTION(H1_ad_ir_address[8], N1_no_op_reg[1]); --H1_ad_ir_address[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[9] at LC5_B13 --operation mode is normal H1_ad_ir_address[9] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_9, pci_rstn, GLOBAL(pci_clk)); --N1L612 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[9]~22 at LC6_B13 --operation mode is normal N1L612 = AMPP_FUNCTION(H1_ad_ir_address[9], N1_no_op_reg[1]); --H1_ad_ir_address[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[10] at LC7_B13 --operation mode is normal H1_ad_ir_address[10] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_10, pci_rstn, GLOBAL(pci_clk)); --N1L712 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[10]~21 at LC3_B13 --operation mode is normal N1L712 = AMPP_FUNCTION(H1_ad_ir_address[10], N1_no_op_reg[1]); --H1_ad_ir_address[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[11] at LC8_B13 --operation mode is normal H1_ad_ir_address[11] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_11, pci_rstn, GLOBAL(pci_clk)); --N1L812 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[11]~20 at LC4_B13 --operation mode is normal N1L812 = AMPP_FUNCTION(H1_ad_ir_address[11], N1_no_op_reg[1]); --H1_ad_ir_address[12] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[12] at LC5_G4 --operation mode is normal H1_ad_ir_address[12] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_12, pci_rstn, GLOBAL(pci_clk)); --N1L912 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_adr[12]~19 at LC4_G4 --operation mode is normal N1L912 = AMPP_FUNCTION(H1_ad_ir_address[12], N1_no_op_reg[1]); --H1L273 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[12]~444 at LC3_I20 --operation mode is normal H1L273 = AMPP_FUNCTION(H1_trg_cfg_ad_out[12], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L404); --H1_high_ad_or[44] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[44] at LC5_I20 --operation mode is normal H1_high_ad_or[44] = AMPP_FUNCTION(J1_ad_ce[44], ix1166_lc, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[12], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[12] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[12] at LC1_I20 --operation mode is normal H1_low_data_out_HR[12] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, ix1166_lc, pci_rstn, GLOBAL(pci_clk)); --H1L404 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[12]~19 at LC2_I20 --operation mode is normal H1L404 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[44], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[12]); --H1L373 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[13]~445 at LC6_I21 --operation mode is normal H1L373 = AMPP_FUNCTION(H1_trg_cfg_ad_out[13], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L504); --H1_high_ad_or[45] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[45] at LC3_I21 --operation mode is normal H1_high_ad_or[45] = AMPP_FUNCTION(J1_ad_ce[45], ix1165_lc, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[13], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[13] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[13] at LC2_I21 --operation mode is normal H1_low_data_out_HR[13] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, ix1165_lc, pci_rstn, GLOBAL(pci_clk)); --H1L504 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[13]~18 at LC5_I21 --operation mode is normal H1L504 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[45], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[13]); --H1L473 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[14]~446 at LC4_I23 --operation mode is normal H1L473 = AMPP_FUNCTION(H1_trg_cfg_ad_out[14], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L604); --H1_high_ad_or[46] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[46] at LC8_I23 --operation mode is normal H1_high_ad_or[46] = AMPP_FUNCTION(J1_ad_ce[46], ix1164_lc, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[14], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[14] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[14] at LC2_I23 --operation mode is normal H1_low_data_out_HR[14] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, ix1164_lc, pci_rstn, GLOBAL(pci_clk)); --H1L604 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[14]~17 at LC3_I23 --operation mode is normal H1L604 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[46], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[14]); --H1L573 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_NOT[15]~447 at LC5_I24 --operation mode is normal H1L573 = AMPP_FUNCTION(H1_trg_cfg_ad_out[15], H1_trg_low_ad_out_sel, H1_trg_cfg_cyc_out, H1L704); --H1_high_ad_or[47] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_or[47] at LC2_I24 --operation mode is normal H1_high_ad_or[47] = AMPP_FUNCTION(J1_ad_ce[47], ix1163_lc, H1_mstr_trg_hi_ad, H1_high_ad_out_lc[15], pci_rstn, GLOBAL(pci_clk)); --H1_low_data_out_HR[15] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR[15] at LC3_I24 --operation mode is normal H1_low_data_out_HR[15] = AMPP_FUNCTION(H1_low_data_out_hr_ena_d, H1_low_data_out_HR_lc, H1_mstr_ad_sel, ix1163_lc, pci_rstn, GLOBAL(pci_clk)); --H1L704 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_out_lc1_not_cc[15]~16 at LC4_I24 --operation mode is normal H1L704 = AMPP_FUNCTION(H1_mstr_trg_low_ad_out_sel, H1_high_ad_or[47], H1_mstr_trg_hr_dat_sel, H1_low_data_out_HR[15]); --H1_trg_low_ad_out_sel is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_low_ad_out_sel at LC7_C11 --operation mode is normal H1_trg_low_ad_out_sel = AMPP_FUNCTION(H1_trg_ad_sel, H1_hi_low_sel); --Q1L51Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[16]~reg at LC5_G34 --operation mode is normal Q1L51Q = AMPP_FUNCTION(Q1_bar0_reg[16], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --H1_ad_ce_nc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ce_nc at LC1_I2 --operation mode is normal H1_ad_ce_nc = AMPP_FUNCTION(H1_trg_ADOR_ena, H1_mstr_ADOR_ena); --Q1L61Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[17]~reg at LC1_G33 --operation mode is normal Q1L61Q = AMPP_FUNCTION(Q1_bar0_reg[17], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L71Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[18]~reg at LC2_G35 --operation mode is normal Q1L71Q = AMPP_FUNCTION(S1_decR[0], Q1_bar0_reg[18], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L81Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[19]~reg at LC3_G36 --operation mode is normal Q1L81Q = AMPP_FUNCTION(Q1_bar0_reg[19], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L91Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[20]~reg at LC3_L36 --operation mode is normal Q1L91Q = AMPP_FUNCTION(Q1_bar0_reg[20], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L02Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[21]~reg at LC3_G40 --operation mode is normal Q1L02Q = AMPP_FUNCTION(Q1_bar0_reg[21], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L12Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[22]~reg at LC1_I39 --operation mode is normal Q1L12Q = AMPP_FUNCTION(Q1_bar0_reg[22], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L22Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[23]~reg at LC4_G42 --operation mode is normal Q1L22Q = AMPP_FUNCTION(Q1_bar0_reg[23], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L32Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[24]~reg at LC4_G43 --operation mode is normal Q1L32Q = AMPP_FUNCTION(S1_decR[2], Q1L33, Q1_bar0_reg[24], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L42Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[25]~reg at LC3_G46 --operation mode is normal Q1L42Q = AMPP_FUNCTION(S1_decR[2], Q1_bar0_reg[25], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L52Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[26]~reg at LC1_G48 --operation mode is normal Q1L52Q = AMPP_FUNCTION(S1_decR[2], S1_decR[1], Q1_bar0_reg[26], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L62Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[27]~reg at LC3_G52 --operation mode is normal Q1L62Q = AMPP_FUNCTION(S1_decR[2], Q1_bar0_reg[27], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L72Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[28]~reg at LC1_G51 --operation mode is normal Q1L72Q = AMPP_FUNCTION(S1_decR[2], Q1L23, Q1_bar0_reg[28], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L82Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[29]~reg at LC1_G50 --operation mode is normal Q1L82Q = AMPP_FUNCTION(S1_decR[2], Q1L13, Q1_bar0_reg[29], S1_decR[4], pci_rstn, GLOBAL(pci_clk)); --Q1L92Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[30]~reg at LC1_G31 --operation mode is normal Q1L92Q = AMPP_FUNCTION(S1_decR[2], Q1L93, P9_REG, S1_decR[1], pci_rstn, GLOBAL(pci_clk)); --Q1L03Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[31]~reg at LC1_G39 --operation mode is normal Q1L03Q = AMPP_FUNCTION(S1_decR[2], Q1L83, P01_REG, S1_decR[1], pci_rstn, GLOBAL(pci_clk)); --K1_cbe_oer_r3_d is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|cbe_oer_r3_d at LC2_D6 --operation mode is normal K1_cbe_oer_r3_d = AMPP_FUNCTION(K1_MS_DXFR, K1_mstr_abrt); --K1_cbe_oer_r1_lc3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|cbe_oer_r1_lc3 at LC1_D4 --operation mode is normal K1_cbe_oer_r1_lc3 = AMPP_FUNCTION(K1_cbe_oer_r1_lc2, K1_MS_ADR2, K1_MS_ADR); --N1_devsel_OR_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|devsel_OR_lc[1] at LC8_F28 --operation mode is normal N1_devsel_OR_lc[1] = AMPP_FUNCTION(N1_TS_DXFR, N1_TS_DISC); --N1_targ_oeR_reg_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|targ_oeR_reg_lc[3] at LC4_B24 --operation mode is normal N1_targ_oeR_reg_lc[3] = AMPP_FUNCTION(N1_TS_IDLE_NOT, N1_TS_TURN_AR); --N1_idsel_IR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|idsel_IR at LC2_K9 --operation mode is normal N1_idsel_IR = AMPP_FUNCTION(pci_idsel, pci_rstn, GLOBAL(pci_clk)); --N1_targ_oeR_reg_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|targ_oeR_reg_lc[1] at LC5_B24 --operation mode is normal N1_targ_oeR_reg_lc[1] = AMPP_FUNCTION(N1_idsel_IR, H1_cben_ir_address[3], H1_cben_ir_address[1], H1_cben_ir_address[2]); --H1_ad_ir_address[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[0] at LC3_I25 --operation mode is normal H1_ad_ir_address[0] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_0, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[1] at LC8_I19 --operation mode is normal H1_ad_ir_address[1] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_1, pci_rstn, GLOBAL(pci_clk)); --N1_targ_oeR_reg_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|targ_oeR_reg_lc[2] at LC6_B24 --operation mode is normal N1_targ_oeR_reg_lc[2] = AMPP_FUNCTION(H1_ad_ir_address[0], H1_ad_ir_address[1], N1_TS_IDLE_NOT); --K1_MW_HOLD is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_HOLD at LC2_C9 --operation mode is normal K1_MW_HOLD = AMPP_FUNCTION(K1_MW_HOLD_lc[1], K1_MW_HOLD_lc[2], A1L472, pci_rstn, GLOBAL(pci_clk), K1L74); --K1_irdy_or_lc[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|irdy_or_lc[5] at LC3_C14 --operation mode is normal K1_irdy_or_lc[5] = AMPP_FUNCTION(K1_MW_HOLD, K1_MW_LXFR, K1_direct_xfr, N1_no_op_reg[1]); --K1L13 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00169~10 at LC5_C10 --operation mode is normal K1L13 = AMPP_FUNCTION(K1_irdy_or_lc[8], K1L02, K1_irdy_or_lc[6], A1L472, K1L49); --K1L49 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~470 at LC4_C10 --operation mode is normal K1L49 = AMPP_FUNCTION(K1_irdy_or_lc[7], A1L772); --H1_mstr_par_oe_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_par_oe_lc1 at LC8_D15 --operation mode is normal H1_mstr_par_oe_lc1 = AMPP_FUNCTION(K1_MS_ADR2, K1_MS_PARK, K1_MS_DXFR, K1_wr_rdn); --N1_perr_vldR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|perr_vldR at LC8_G1 --operation mode is normal N1_perr_vldR = AMPP_FUNCTION(P5_REG, N1_trdy_OR_NOT, pci_rstn, GLOBAL(pci_clk), N1L51); --K1_perr_vldR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|perr_vldR at LC5_G1 --operation mode is normal K1_perr_vldR = AMPP_FUNCTION(K1_MS_DXFR, K1_irdy_or_not, pci_rstn, GLOBAL(pci_clk), K1_$00081); --L1_perr_or_not_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|perr_or_not_lc1 at LC6_G1 --operation mode is normal L1_perr_or_not_lc1 = AMPP_FUNCTION(Q1_cmd_reg[6], N1_perr_vldR, K1_perr_vldR); --L1_xxl[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[11] at LC1_I38 --operation mode is normal L1_xxl[11] = AMPP_FUNCTION(L1_xxl[8], L1_xxl[9], L1_xxl[10]); --H1_par64_or is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|par64_or at LC8_I45 --operation mode is normal H1_par64_or = AMPP_FUNCTION(pci_rstn, GLOBAL(pci_clk), M2_parc[10]); --L1_par_error64 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|par_error64 at LC3_G23 --operation mode is normal L1_par_error64 = AMPP_FUNCTION(H1_par_oeR, H1_par64_or, L1_xxh[11]); --L1L4 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|altr_temp~125 at LC4_G23 --operation mode is normal L1L4 = AMPP_FUNCTION(L1_perr_or_not_lc3, L1_perr_or_not_lc2, L1_par_error64); --K1_MS_REQ_d_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_REQ_d_lc[1] at LC7_D17 --operation mode is normal K1_MS_REQ_d_lc[1] = AMPP_FUNCTION(K1_l_req_vld, K1_MS_REQ, K1_MS_IDLE_not, K1_park); --K1_MS_IDLE_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_IDLE_lc1 at LC7_D22 --operation mode is normal K1_MS_IDLE_lc1 = AMPP_FUNCTION(K1_MS_PARK, K1_MS_IDLE_not); --N1_TS_DXFR_R is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_DXFR_R at LC3_G11 --operation mode is normal N1_TS_DXFR_R = AMPP_FUNCTION(N1_TS_DXFR, pci_rstn, GLOBAL(pci_clk)); --N1_cfg_dat_vld is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|cfg_dat_vld at LC5_G11 --operation mode is normal N1_cfg_dat_vld = AMPP_FUNCTION(N1_TS_DXFR_R, N1_cfg_cyc, P5_REG, N1_TS_DXFR); --L1_xxlad[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[0] at LC1_B17 --operation mode is normal L1_xxlad[0] = AMPP_FUNCTION(H1_ad_ir_address[0], H1_ad_ir_address[1], H1_ad_ir_address[3], H1_ad_ir_address[2]); --L1_xxlad[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[1] at LC8_B20 --operation mode is normal L1_xxlad[1] = AMPP_FUNCTION(H1_ad_ir_address[7], H1_ad_ir_address[6], H1_ad_ir_address[4], H1_ad_ir_address[5]); --L1_xxlad[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[2] at LC1_B13 --operation mode is normal L1_xxlad[2] = AMPP_FUNCTION(H1_ad_ir_address[11], H1_ad_ir_address[10], H1_ad_ir_address[9], H1_ad_ir_address[8]); --H1_ad_ir_address[14] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[14] at LC1_G26 --operation mode is normal H1_ad_ir_address[14] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_14, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[15] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[15] at LC6_G26 --operation mode is normal H1_ad_ir_address[15] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_15, pci_rstn, GLOBAL(pci_clk)); --L1_xxlad[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[3] at LC2_G26 --operation mode is normal L1_xxlad[3] = AMPP_FUNCTION(H1_ad_ir_address[14], H1_ad_ir_address[15], H1_ad_ir_address[12], H1_ad_ir_address[13]); --H1_ad_ir_address[16] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[16] at LC4_G45 --operation mode is normal H1_ad_ir_address[16] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_16, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[17] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[17] at LC2_G47 --operation mode is normal H1_ad_ir_address[17] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_17, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[18] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[18] at LC4_G47 --operation mode is normal H1_ad_ir_address[18] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_18, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[19] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[19] at LC7_G4 --operation mode is normal H1_ad_ir_address[19] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_19, pci_rstn, GLOBAL(pci_clk)); --L1_xxlad[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[4] at LC5_G47 --operation mode is normal L1_xxlad[4] = AMPP_FUNCTION(H1_ad_ir_address[16], H1_ad_ir_address[17], H1_ad_ir_address[18], H1_ad_ir_address[19]); --H1_ad_ir_address[20] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[20] at LC5_G29 --operation mode is normal H1_ad_ir_address[20] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_20, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[21] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[21] at LC6_G29 --operation mode is normal H1_ad_ir_address[21] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_21, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[22] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[22] at LC7_G29 --operation mode is normal H1_ad_ir_address[22] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_22, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[23] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[23] at LC8_G29 --operation mode is normal H1_ad_ir_address[23] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_23, pci_rstn, GLOBAL(pci_clk)); --L1_xxlad[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[5] at LC4_G29 --operation mode is normal L1_xxlad[5] = AMPP_FUNCTION(H1_ad_ir_address[20], H1_ad_ir_address[21], H1_ad_ir_address[22], H1_ad_ir_address[23]); --H1_ad_ir_address[24] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[24] at LC2_G27 --operation mode is normal H1_ad_ir_address[24] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_24, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[25] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[25] at LC3_G27 --operation mode is normal H1_ad_ir_address[25] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_25, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[26] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[26] at LC4_G27 --operation mode is normal H1_ad_ir_address[26] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_26, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[27] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[27] at LC5_G27 --operation mode is normal H1_ad_ir_address[27] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_27, pci_rstn, GLOBAL(pci_clk)); --L1_xxlad[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[6] at LC8_G27 --operation mode is normal L1_xxlad[6] = AMPP_FUNCTION(H1_ad_ir_address[24], H1_ad_ir_address[25], H1_ad_ir_address[26], H1_ad_ir_address[27]); --H1_ad_ir_address[28] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[28] at LC6_G47 --operation mode is normal H1_ad_ir_address[28] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_28, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[29] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[29] at LC7_G47 --operation mode is normal H1_ad_ir_address[29] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_29, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[30] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[30] at LC5_G30 --operation mode is normal H1_ad_ir_address[30] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_30, pci_rstn, GLOBAL(pci_clk)); --H1_ad_ir_address[31] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|ad_ir_address[31] at LC5_G45 --operation mode is normal H1_ad_ir_address[31] = AMPP_FUNCTION(H1_ad_IR_ce_address, pci_ad_31, pci_rstn, GLOBAL(pci_clk)); --L1_xxlad[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxlad[7] at LC8_G47 --operation mode is normal L1_xxlad[7] = AMPP_FUNCTION(H1_ad_ir_address[28], H1_ad_ir_address[29], H1_ad_ir_address[30], H1_ad_ir_address[31]); --N1_stop_or_lc[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|stop_or_lc[5] at LC1_F32 --operation mode is normal N1_stop_or_lc[5] = AMPP_FUNCTION(N1_targ_burst_lc, N1_cfg_cyc, N1_TS_DXFR, N1_stop_OR_NOT); --K1_DXFR_write is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|DXFR_write at LC6_A6 --operation mode is normal K1_DXFR_write = AMPP_FUNCTION(K1_DXFR_write_lc3, K1_DXFR_write_lc4, pci_rstn, GLOBAL(pci_clk), K1_$00100); --H1_mstr_ad_sel is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_ad_sel at LC3_A6 --operation mode is normal H1_mstr_ad_sel = AMPP_FUNCTION(K1_DXFR_write, K1_MS_ADR2, K1_MS_ADR, K1_MS_ENA); --H1_trg_ad_sel is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_ad_sel at LC1_G11 --operation mode is normal H1_trg_ad_sel = AMPP_FUNCTION(N1_TS_IDLE_NOT, P5_REG); --K1_lm_hdata_ack_lc[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack_lc[8] at LC1_A10 --operation mode is normal K1_lm_hdata_ack_lc[8] = AMPP_FUNCTION(K1_lm_hdata_ack_lc[7], K1_lm_hdata_ack_lc[5]); --K1_lm_hdata_ack_lc[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack_lc[6] at LC7_A10 --operation mode is normal K1_lm_hdata_ack_lc[6] = AMPP_FUNCTION(K1_MR_IDLE_not, K1_wr_rdn, K1_MR_END, K1_MR_LLXFR); --K1L552 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack_lc[6]~94 at LC7_A10 --operation mode is normal K1L552 = AMPP_FUNCTION(K1_MR_IDLE_not, K1_wr_rdn, K1_MR_END, K1_MR_LLXFR); --K1_lm_hdata_ack_ena2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack_ena2 at LC2_A10 --operation mode is normal K1_lm_hdata_ack_ena2 = AMPP_FUNCTION(K1_lm_ldata_ack_ena1, K1_lm_hdata_ack_ena1, K1_$00112); --K1_tgt_64_response_reset_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|tgt_64_response_reset_lc1 at LC7_A13 --operation mode is normal K1_tgt_64_response_reset_lc1 = AMPP_FUNCTION(K1_MS_TAR, K1_MW_END, K1_MW_IDLE_not, K1_MR_IDLE_not); --N1_lt_hdata_ack_r_d4_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_hdata_ack_r_d4_lc at LC8_F11 --operation mode is normal N1_lt_hdata_ack_r_d4_lc = AMPP_FUNCTION(N1_lt_hdata_ack_r_d[3], N1_lt_hdata_ack_r_ena_lc1, N1_lt_hdata_ack_r_d[2], N1_TS_IDLE_NOT); --N1_lt_hdata_ack_r_ena is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_hdata_ack_r_ena at LC4_F19 --operation mode is normal N1_lt_hdata_ack_r_ena = AMPP_FUNCTION(N1_lt_hdata_ack_r_ena_lc1, N1_lt_ldata_ack_r_ena_lc1, N1_lw_lr_done, P3_REG); --N1_ad_ir_ce_D_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|ad_ir_ce_D_lc1 at LC4_A4 --operation mode is normal N1_ad_ir_ce_D_lc1 = AMPP_FUNCTION(N1_TS_DXFR, N1_TS_DISC, N1L69, N1_LW_WAIT); --N1L79 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~1586 at LC7_B24 --operation mode is normal N1L79 = AMPP_FUNCTION(N1_adr_phase_lc1, H1_ad_ir_address[0], H1_ad_ir_address[1]); --N1L383 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|~15 at LC8_B24 --operation mode is normal N1L383 = AMPP_FUNCTION(N1_adr_phase_lc1, N1_TS_IDLE_NOT); --K1_devsel_toR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|devsel_toR at LC3_C9 --operation mode is normal K1_devsel_toR = AMPP_FUNCTION(K1_devsel_toR_lc1, K1_MS_DXFR, A1L352, pci_rstn, GLOBAL(pci_clk)); --K1L04 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00201~1 at LC3_C1 --operation mode is arithmetic K1L04 = AMPP_FUNCTION(A1L772, N1_no_op_reg[1]); --K1_$00201 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00201 at LC3_C1 --operation mode is arithmetic K1_$00201 = AMPP_FUNCTION(A1L772, N1_no_op_reg[1]); --N1_lt_ldata_ack_r_d[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ldata_ack_r_d[2] at LC3_F4 --operation mode is normal N1_lt_ldata_ack_r_d[2] = AMPP_FUNCTION(N1_LR_DONE, N1_LR_IDLE_NOT); --N1L053 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_ADR_CLMD_d~7 at LC5_F21 --operation mode is normal N1L053 = AMPP_FUNCTION(N1_TS_ADR_CLMD, N1_cfg_cyc, imm_dpm_dec_reg_LT_RDY_n_pci, N1_retry); --N1L49 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~1104 at LC3_F18 --operation mode is normal N1L49 = AMPP_FUNCTION(N1_TS_TURN_AR, N1_LW_LXFR); --N1_LW_DONE_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LW_DONE_lc[2] at LC4_F18 --operation mode is normal N1_LW_DONE_lc[2] = AMPP_FUNCTION(N1L49, imm_dpm_dec_reg_LT_RDY_n_pci, N1_LW_WAIT, N1_TS_DXFR); --N1_lt_ldata_ack_r_ena_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ldata_ack_r_ena_lc1 at LC6_F8 --operation mode is normal N1_lt_ldata_ack_r_ena_lc1 = AMPP_FUNCTION(N1_TS_IDLE_NOT, N1_LW_IDLE_NOT, N1_$00093); --N1_lw_lr_done is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lw_lr_done at LC8_F4 --operation mode is normal N1_lw_lr_done = AMPP_FUNCTION(N1_LR_DONE, N1_LW_DONE); --K1L101 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~604 at LC4_A8 --operation mode is normal K1L101 = AMPP_FUNCTION(K1_MR_IDLE_not, K1_MR_LLXFR_r2, K1_MR_LLXFR_r1, K1_MR_END); --K1L32 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00118~0 at LC6_A8 --operation mode is normal K1L32 = AMPP_FUNCTION(K1_tgt_64_response_reg, K1_lm_ldata_ack); --Q1_cmd_reg[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cmd_reg[2] at LC1_I19 --operation mode is normal Q1_cmd_reg[2] = AMPP_FUNCTION(Q1L501, H1_low_ad_IR_data[2], pci_rstn, GLOBAL(pci_clk)); --K1_lm_ldata_ack_ena2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ldata_ack_ena2 at LC8_A9 --operation mode is normal K1_lm_ldata_ack_ena2 = AMPP_FUNCTION(K1_MW_END, K1_MR_END); --K1_$00112 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00112 at LC4_A7 --operation mode is normal K1_$00112 = AMPP_FUNCTION(K1_lm_ack_or, N1_no_op_reg[1]); --N1_LR_WAIT_32 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_WAIT_32 at LC5_F7 --operation mode is normal N1_LR_WAIT_32 = AMPP_FUNCTION(N1_LR_WAIT_32_lc1, N1_LR_WAIT_32, pci_rstn, GLOBAL(pci_clk), N1L35); --N1_LR_DONE_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_DONE_lc[2] at LC6_F24 --operation mode is normal N1_LR_DONE_lc[2] = AMPP_FUNCTION(N1_LR_PXFR, N1_LR_WAIT_32, N1_LR_WAIT, N1L74); --N1_LR_DONE_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_DONE_lc[1] at LC8_F2 --operation mode is normal N1_LR_DONE_lc[1] = AMPP_FUNCTION(N1_TS_DISC, N1_LR_PXFR, N1_LR_LXFR, N1_LR_LXFR_lc[1]); --N1L151 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_LXFR_lc[5]~44 at LC4_F15 --operation mode is normal N1L151 = AMPP_FUNCTION(N1_retry, P5_REG, N1L93); --N1L73 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00209~0 at LC5_F15 --operation mode is normal N1L73 = AMPP_FUNCTION(N1_TS_ADR_VLD, N1_cfg_cyc, L1_serr_or); --N1L62 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00197~0 at LC4_F29 --operation mode is normal N1L62 = AMPP_FUNCTION(N1_TS_ADR_CLMD, K1_mstr_actv_lc, N1_retry); --K1_MR_IDLE_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_IDLE_lc1 at LC7_A19 --operation mode is normal K1_MR_IDLE_lc1 = AMPP_FUNCTION(K1_MS_ADR2, K1_MS_ADR, K1_dac_cyc_reg, K1_wr_rdn); --K1L082 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_IDLE_lc1~43 at LC7_A19 --operation mode is normal K1L082 = AMPP_FUNCTION(K1_MS_ADR2, K1_MS_ADR, K1_dac_cyc_reg, K1_wr_rdn); --K1_MW_END_r[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_END_r[1] at LC3_C17 --operation mode is normal K1_MW_END_r[1] = AMPP_FUNCTION(K1_MW_END_lc1, K1_devsel_toR, K1_MW_HOLD, pci_rstn, GLOBAL(pci_clk), K1_$00237); --K1_MW_END_r[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_END_r[2] at LC6_C17 --operation mode is normal K1_MW_END_r[2] = AMPP_FUNCTION(K1_devsel_toR, K1_MW_LXFR, K1_MW_IDLE_not, A1L472, pci_rstn, GLOBAL(pci_clk)); --K1_MW_END is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_END at LC1_C17 --operation mode is normal K1_MW_END = AMPP_FUNCTION(K1_MW_END_r[1], K1_MW_END_r[2]); --N1_TS_DXFR_d_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_DXFR_d_lc[2] at LC8_F21 --operation mode is normal N1_TS_DXFR_d_lc[2] = AMPP_FUNCTION(N1_TS_DXFR, N1_TS_DISC_d_lc3); --N1_LW_LXFR_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LW_LXFR_lc[3] at LC8_F43 --operation mode is normal N1_LW_LXFR_lc[3] = AMPP_FUNCTION(N1_TS_DXFR, imm_dpm_dec_reg_LT_RDY_n_pci, N1_LW_WAIT); --P1_REG is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_sr:burst_trans|REG at LC3_F50 --operation mode is normal P1_REG = AMPP_FUNCTION(P1_REG, N1_burst_trans_r, A1L652, pci_rstn, GLOBAL(pci_clk), N1_$00096); --N1_targ_burst_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|targ_burst_lc at LC1_F50 --operation mode is normal N1_targ_burst_lc = AMPP_FUNCTION(P1_REG, N1_TS_IDLE_NOT); --N1L52 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00192~10 at LC4_F8 --operation mode is normal N1L52 = AMPP_FUNCTION(N1_TS_ADR_CLMD, K1_mstr_actv_lc, N1_retry, N1_cfg_cyc, N1L38); --N1L38 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~409 at LC3_F8 --operation mode is normal N1L38 = AMPP_FUNCTION(N1_low_dword_discard, N1_TS_DISC); --N1L543 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trdy_OR_lc[5]~56 at LC3_F13 --operation mode is normal N1L543 = AMPP_FUNCTION(N1L243, N1_TS_DXFR, imm_dpm_dec_reg_LT_RDY_n_pci, N1_LW_WAIT, N1L91); --N1_$00093 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00093 at LC8_F8 --operation mode is normal N1_$00093 = AMPP_FUNCTION(N1_lt_rdynR, N1L802); --N1_lreg_busy is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lreg_busy at LC3_F25 --operation mode is normal N1_lreg_busy = AMPP_FUNCTION(N1_LW_IDLE_NOT, N1_lreg_busy, N1_TS_IDLE_NOT, N1_LW_DONE, pci_rstn, GLOBAL(pci_clk)); --N1_retry_set is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|retry_set at LC5_F25 --operation mode is normal N1_retry_set = AMPP_FUNCTION(N1_retry_set_lc, N1_lreg_busy); --N1L792 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|retry_rst_lc2~33 at LC8_F15 --operation mode is normal N1L792 = AMPP_FUNCTION(N1_TS_ADR_CLMD, P5_REG, N1_cfg_cyc); --N1_retry_rst_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|retry_rst_lc2 at LC7_F25 --operation mode is normal N1_retry_rst_lc2 = AMPP_FUNCTION(N1_retry_rst_lc1, N1L792, N1_adr_phase_lc1, N1_TS_IDLE_NOT); --N1L93 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00216~0 at LC3_F15 --operation mode is normal N1L93 = AMPP_FUNCTION(N1_TS_ADR_VLD, N1_cfg_cyc, N1_LR_IDLE_NOT, L1_serr_or); --N1L83 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00213~0 at LC6_F16 --operation mode is normal N1L83 = AMPP_FUNCTION(N1_direct_xfr, N1_lt_rdynR, N1_LR_LXFR_lc[1], N1_TS_DISC); --N1_io_cyc_s_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|io_cyc_s_lc at LC7_G12 --operation mode is normal N1_io_cyc_s_lc = AMPP_FUNCTION(H1_cben_ir_address[1], H1_cben_ir_address[2], H1_cben_ir_address[3]); --N1_req64_R is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|req64_R at LC1_F17 --operation mode is normal N1_req64_R = AMPP_FUNCTION(K1_req64_or_not, K1_cbe_oer_not, pci_rstn, GLOBAL(pci_clk)); --N1_trans64_reg_set is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trans64_reg_set at LC4_F17 --operation mode is normal N1_trans64_reg_set = AMPP_FUNCTION(N1_adr_phase_lc1, N1_req64_R); --N1_trans64_reg_rst_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trans64_reg_rst_lc2 at LC3_F20 --operation mode is normal N1_trans64_reg_rst_lc2 = AMPP_FUNCTION(K1_$00063, L1_serr_or, K1_mstr_actv_lc, K1_lm_ack_or); --K1_tabrt_set is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|tabrt_set at LC3_A5 --operation mode is normal K1_tabrt_set = AMPP_FUNCTION(K1_MS_DXFR, A1L772, A1L352, A1L472, pci_rstn, GLOBAL(pci_clk)); --N1_trans64_reg_rst_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trans64_reg_rst_lc1 at LC4_F20 --operation mode is normal N1_trans64_reg_rst_lc1 = AMPP_FUNCTION(K1_tabrt_set, N1_lw_lr_done, N1_TS_DISC, N1_TS_IDLE_NOT); --N1L25 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00237~0 at LC4_F2 --operation mode is normal N1L25 = AMPP_FUNCTION(N1_no_op_reg[1], A1L262, A1L652); --N1_LR_PXFR_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_lc[3] at LC7_F22 --operation mode is normal N1_LR_PXFR_lc[3] = AMPP_FUNCTION(N1_direct_xfr, N1_LR_PXFR, N1_lt_rdynR, N1_TS_DISC); --V61_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|cmpchain:cmp[1]|comptree:comp|comptree:sub_comptree|cmpchain:cmp_end|aeb_out at LC1_G27 --operation mode is normal V61_aeb_out = V31_aeb_out & V21_aeb_out & V41_aeb_out & V51_aeb_out; --V01_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|cmpchain:cmp[0]|comptree:comp|comptree:sub_comptree|cmpchain:cmp_end|aeb_out at LC7_G30 --operation mode is normal V01_aeb_out = V7_aeb_out & V6_aeb_out & V8_aeb_out & V9_aeb_out; --Q1_bar0_reg[31] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[31] at LC4_G32 --operation mode is normal Q1_bar0_reg[31] = AMPP_FUNCTION(Q1L34, H1_low_ad_IR_data[31], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[30] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[30] at LC5_G32 --operation mode is normal Q1_bar0_reg[30] = AMPP_FUNCTION(Q1L34, H1_low_ad_IR_data[30], pci_rstn, GLOBAL(pci_clk)); --V4_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|cmpchain:cmp_end|aeb_out at LC8_G30 --operation mode is normal V4_aeb_out = Q1_bar0_reg[31] & H1_ad_ir_address[31] & (Q1_bar0_reg[30] $ !H1_ad_ir_address[30]) # !Q1_bar0_reg[31] & !H1_ad_ir_address[31] & (Q1_bar0_reg[30] $ !H1_ad_ir_address[30]); --N1_mem_cyc_s_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|mem_cyc_s_lc at LC4_G17 --operation mode is normal N1_mem_cyc_s_lc = AMPP_FUNCTION(H1_cben_ir_address[2], H1_cben_ir_address[1], H1_cben_ir_address[3], H1_cben_ir_address[0]); --N1L1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00074~0 at LC2_B26 --operation mode is normal N1L1 = AMPP_FUNCTION(N1_idsel_IR, H1_cben_ir_address[3], H1_cben_ir_address[1], H1_cben_ir_address[2]); --imm_dpm_dp_n_reg_we_p is imm_dpm_dp_n_reg_we_p at LC6_K19 --operation mode is normal imm_dpm_dp_n_reg_we_p_lut_out = VCC; imm_dpm_dp_n_reg_we_p = DFFEA(imm_dpm_dp_n_reg_we_p_lut_out, ADC2_D[3], imm_dpm_dec_reg_soft_rst_n, , A1L74, , ); --imm_dpm_dec_reg_rdata_CNF_0 is imm_dpm_dec_reg_rdata_CNF_0 at LC3_I44 --operation mode is normal imm_dpm_dec_reg_rdata_CNF_0_lut_out = H1_low_ad_IR_data[0] & (H1L722 # H1L712) # !H1_low_ad_IR_data[0] & !H1L722 & H1L712; imm_dpm_dec_reg_rdata_CNF_0 = DFFEA(imm_dpm_dec_reg_rdata_CNF_0_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L47, , ); --ix1208_lc is ix1208_lc at LC8_I44 --operation mode is normal ix1208_lc = N1L212 & (N1L112 & E3_q[0] # !N1L112 & imm_dpm_dec_reg_rdata_CNF_0); --K1_WAIT_ndirect is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|WAIT_ndirect at LC1_C11 --operation mode is normal K1_WAIT_ndirect = AMPP_FUNCTION(K1_WAIT_ndirect_lc, K1L02, K1_direct_xfr, pci_rstn, GLOBAL(pci_clk)); --H1_mstr_hi_low_sel is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_hi_low_sel at LC8_C11 --operation mode is normal H1_mstr_hi_low_sel = AMPP_FUNCTION(K1_MW_DXFR_32, K1_WAIT_ndirect, K1_dac_cyc_strobe); --H1_hi_low_sel is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|hi_low_sel at LC4_C11 --operation mode is normal H1_hi_low_sel = AMPP_FUNCTION(N1L74, N1_LR_LXFR, N1_$00130); --K1_MW_LAST_r[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LAST_r[1] at LC8_C16 --operation mode is normal K1_MW_LAST_r[1] = AMPP_FUNCTION(A1L472, K1_MW_LAST_lc[1], K1_MW_LAST_lc[2], K1_last_xfr, pci_rstn, GLOBAL(pci_clk), K1L54); --K1_MW_LAST_r[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LAST_r[2] at LC1_C23 --operation mode is normal K1_MW_LAST_r[2] = AMPP_FUNCTION(K1_MW_LAST_lc[3], K1_last_xfr, K1L163, pci_rstn, GLOBAL(pci_clk)); --K1_MW_LAST_r[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LAST_r[3] at LC5_C17 --operation mode is normal K1_MW_LAST_r[3] = AMPP_FUNCTION(K1_MW_LAST, A1L472, K1_devsel_toR, pci_rstn, GLOBAL(pci_clk), K1L64); --K1_MW_LAST is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LAST at LC7_C17 --operation mode is normal K1_MW_LAST = AMPP_FUNCTION(K1_MW_LAST_r[1], K1_MW_LAST_r[2], K1_MW_LAST_r[3]); --Q1L1Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[0]~reg at LC3_I4 --operation mode is normal Q1L1Q = AMPP_FUNCTION(S1_decR[2], Q1L53, S1_decR[3], Q1_cache_line[0], pci_rstn, GLOBAL(pci_clk)); --K1_ad_oer_lc2b is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ad_oer_lc2b at LC4_D12 --operation mode is normal K1_ad_oer_lc2b = AMPP_FUNCTION(K1_MS_DXFR, K1_wr_rdn, K1_irdy_or_not, K1_frame_or_not); --K1_ad_oer_lc2c is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ad_oer_lc2c at LC7_D12 --operation mode is normal K1_ad_oer_lc2c = AMPP_FUNCTION(K1_wr_rdn, K1_MS_ADR2, K1_MS_ADR); --imm_dpm_dec_reg_rdata_CNF_1 is imm_dpm_dec_reg_rdata_CNF_1 at LC5_I32 --operation mode is normal imm_dpm_dec_reg_rdata_CNF_1_lut_out = H1_low_ad_IR_data[1] & (H1L722 # H1L812) # !H1_low_ad_IR_data[1] & !H1L722 & H1L812; imm_dpm_dec_reg_rdata_CNF_1 = DFFEA(imm_dpm_dec_reg_rdata_CNF_1_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L47, , ); --ix1209_lc is ix1209_lc at LC8_I32 --operation mode is normal ix1209_lc = N1L212 & (N1L112 & E3_q[1] # !N1L112 & imm_dpm_dec_reg_rdata_CNF_1); --Q1L2Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[1]~reg at LC2_I3 --operation mode is normal Q1L2Q = AMPP_FUNCTION(S1_decR[0], Q1L73, Q1_cmd_reg[1], S1_decR[1], pci_rstn, GLOBAL(pci_clk)); --imm_dpm_dec_reg_rdata_CNF_2 is imm_dpm_dec_reg_rdata_CNF_2 at LC8_I6 --operation mode is normal imm_dpm_dec_reg_rdata_CNF_2_lut_out = H1_low_ad_IR_data[2] & (H1L722 # H1L912) # !H1_low_ad_IR_data[2] & !H1L722 & H1L912; imm_dpm_dec_reg_rdata_CNF_2 = DFFEA(imm_dpm_dec_reg_rdata_CNF_2_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L47, , ); --ix1210_lc is ix1210_lc at LC1_I6 --operation mode is normal ix1210_lc = N1L212 & (N1L112 & E3_q[2] # !N1L112 & imm_dpm_dec_reg_rdata_CNF_2); --Q1L3Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[2]~reg at LC3_J5 --operation mode is normal Q1L3Q = AMPP_FUNCTION(Q1_cache_line[2], Q1_cmd_reg[2], S1_decR[1], S1_decR[3], pci_rstn, GLOBAL(pci_clk)); --imm_dpm_dec_reg_rdata_CNF_3 is imm_dpm_dec_reg_rdata_CNF_3 at LC2_I37 --operation mode is normal imm_dpm_dec_reg_rdata_CNF_3_lut_out = H1_low_ad_IR_data[3] & (H1L722 # H1L022) # !H1_low_ad_IR_data[3] & !H1L722 & H1L022; imm_dpm_dec_reg_rdata_CNF_3 = DFFEA(imm_dpm_dec_reg_rdata_CNF_3_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L47, , ); --ix1211_lc is ix1211_lc at LC3_I37 --operation mode is normal ix1211_lc = N1L212 & (N1L112 & E3_q[3] # !N1L112 & imm_dpm_dec_reg_rdata_CNF_3); --Q1L4Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[3]~reg at LC4_I5 --operation mode is normal Q1L4Q = AMPP_FUNCTION(Q1_cache_line[3], S1_decR[3], pci_rstn, GLOBAL(pci_clk)); --imm_dpm_dec_reg_rdata_CNF_4 is imm_dpm_dec_reg_rdata_CNF_4 at LC2_I1 --operation mode is normal imm_dpm_dec_reg_rdata_CNF_4_lut_out = H1_low_ad_IR_data[4] & (H1L722 # H1L122) # !H1_low_ad_IR_data[4] & !H1L722 & H1L122; imm_dpm_dec_reg_rdata_CNF_4 = DFFEA(imm_dpm_dec_reg_rdata_CNF_4_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L47, , ); --ix1212_lc is ix1212_lc at LC4_I1 --operation mode is normal ix1212_lc = N1L212 & (N1L112 & E3_q[4] # !N1L112 & imm_dpm_dec_reg_rdata_CNF_4); --Q1L5Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[4]~reg at LC3_I7 --operation mode is normal Q1L5Q = AMPP_FUNCTION(S1_decR[0], Q1L43, Q1_cache_line[4], S1_decR[3], pci_rstn, GLOBAL(pci_clk)); --imm_dpm_dec_reg_rdata_CNF_5 is imm_dpm_dec_reg_rdata_CNF_5 at LC4_I18 --operation mode is normal imm_dpm_dec_reg_rdata_CNF_5_lut_out = H1_low_ad_IR_data[5] & (H1L722 # H1L222) # !H1_low_ad_IR_data[5] & !H1L722 & H1L222; imm_dpm_dec_reg_rdata_CNF_5 = DFFEA(imm_dpm_dec_reg_rdata_CNF_5_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L47, , ); --ix1213_lc is ix1213_lc at LC5_I18 --operation mode is normal ix1213_lc = N1L212 & (N1L112 & E3_q[5] # !N1L112 & imm_dpm_dec_reg_rdata_CNF_5); --Q1L6Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[5]~reg at LC2_I8 --operation mode is normal Q1L6Q = AMPP_FUNCTION(S1_decR[0], Q1_cache_line[5], S1_decR[3], pci_rstn, GLOBAL(pci_clk)); --imm_dpm_dec_reg_rdata_CNF_6 is imm_dpm_dec_reg_rdata_CNF_6 at LC4_I26 --operation mode is normal imm_dpm_dec_reg_rdata_CNF_6_lut_out = H1_low_ad_IR_data[6] & (H1L722 # H1L322) # !H1_low_ad_IR_data[6] & !H1L722 & H1L322; imm_dpm_dec_reg_rdata_CNF_6 = DFFEA(imm_dpm_dec_reg_rdata_CNF_6_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L47, , ); --ix1214_lc is ix1214_lc at LC5_I26 --operation mode is normal ix1214_lc = N1L212 & (N1L112 & E3_q[6] # !N1L112 & imm_dpm_dec_reg_rdata_CNF_6); --Q1L7Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[6]~reg at LC2_I10 --operation mode is normal Q1L7Q = AMPP_FUNCTION(S1_decR[0], Q1L63, S1_decR[1], Q1_cmd_reg[6], pci_rstn, GLOBAL(pci_clk)); --imm_dpm_dec_reg_rdata_CNF_7 is imm_dpm_dec_reg_rdata_CNF_7 at LC2_I12 --operation mode is normal imm_dpm_dec_reg_rdata_CNF_7_lut_out = H1_low_ad_IR_data[7] & (H1L722 # H1L422) # !H1_low_ad_IR_data[7] & !H1L722 & H1L422; imm_dpm_dec_reg_rdata_CNF_7 = DFFEA(imm_dpm_dec_reg_rdata_CNF_7_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L47, , ); --ix1216_lc is ix1216_lc at LC1_J16 --operation mode is normal ix1216_lc = N1L212 & (N1L112 & E3_q[7] # !N1L112 & imm_dpm_dec_reg_rdata_CNF_7); --Q1L8Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[7]~reg at LC2_J14 --operation mode is normal Q1L8Q = AMPP_FUNCTION(Q1_cache_line[7], S1_decR[3], pci_rstn, GLOBAL(pci_clk)); --Q1L9Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[8]~reg at LC6_G13 --operation mode is normal Q1L9Q = AMPP_FUNCTION(S1_decR[0], S1_decR[1], Q1_cmd_reg[8], pci_rstn, GLOBAL(pci_clk)); --Q1L01Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[11]~reg at LC2_I17 --operation mode is normal Q1L01Q = AMPP_FUNCTION(Q1_lat_tmr_reg[0], S1_decR[3], pci_rstn, GLOBAL(pci_clk)); --Q1L11Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[12]~reg at LC6_I20 --operation mode is normal Q1L11Q = AMPP_FUNCTION(S1_decR[0], Q1_lat_tmr_reg[1], S1_decR[3], pci_rstn, GLOBAL(pci_clk)); --Q1L21Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[13]~reg at LC4_I21 --operation mode is normal Q1L21Q = AMPP_FUNCTION(Q1_lat_tmr_reg[2], S1_decR[3], pci_rstn, GLOBAL(pci_clk)); --Q1L31Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[14]~reg at LC5_I23 --operation mode is normal Q1L31Q = AMPP_FUNCTION(Q1_lat_tmr_reg[3], Q1_bar0_reg[14], S1_decR[4], S1_decR[3], pci_rstn, GLOBAL(pci_clk)); --Q1L41Q is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|ad_dat_out[15]~reg at LC6_I24 --operation mode is normal Q1L41Q = AMPP_FUNCTION(Q1_lat_tmr_reg[4], Q1_bar0_reg[15], S1_decR[4], S1_decR[3], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[16] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[16] at LC7_G34 --operation mode is normal Q1_bar0_reg[16] = AMPP_FUNCTION(Q1L24, H1_low_ad_IR_data[16], pci_rstn, GLOBAL(pci_clk)); --S1_decR[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_cd:cfg_adr_dec|decR[4] at LC4_B17 --operation mode is normal S1_decR[4] = AMPP_FUNCTION(N1_cfg_adr_dec_ena, S1_dec_up[1], H1_ad_ir_address[3], H1_ad_ir_address[2], pci_rstn, GLOBAL(pci_clk)); --N1_trg_OR_advance is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trg_OR_advance at LC2_I2 --operation mode is normal N1_trg_OR_advance = AMPP_FUNCTION(N1_TS_ADR_CLMD, N1_cfg_cyc, N1_TS_ADR_VLD, P5_REG, pci_rstn, GLOBAL(pci_clk)); --H1_trg_ADOR_ena is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_ADOR_ena at LC4_I2 --operation mode is normal H1_trg_ADOR_ena = AMPP_FUNCTION(N1_trg_OR_advance, N1_LR_LXFR); --H1_mstr_ADOR_ena is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_ADOR_ena at LC6_I2 --operation mode is normal H1_mstr_ADOR_ena = AMPP_FUNCTION(K1_ADOR_ena_lc, K1_MW_LXFR, K1_mstr_actv_lc, K1_wr_rdn); --Q1_bar0_reg[17] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[17] at LC8_G33 --operation mode is normal Q1_bar0_reg[17] = AMPP_FUNCTION(Q1L24, H1_low_ad_IR_data[17], pci_rstn, GLOBAL(pci_clk)); --S1_decR[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_cd:cfg_adr_dec|decR[0] at LC7_B17 --operation mode is normal S1_decR[0] = AMPP_FUNCTION(N1_cfg_adr_dec_ena, S1_dec_up[0], H1_ad_ir_address[3], H1_ad_ir_address[2], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[18] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[18] at LC3_G35 --operation mode is normal Q1_bar0_reg[18] = AMPP_FUNCTION(Q1L24, H1_low_ad_IR_data[18], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[19] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[19] at LC2_G36 --operation mode is normal Q1_bar0_reg[19] = AMPP_FUNCTION(Q1L24, H1_low_ad_IR_data[19], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[20] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[20] at LC1_L36 --operation mode is normal Q1_bar0_reg[20] = AMPP_FUNCTION(Q1L24, H1_low_ad_IR_data[20], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[21] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[21] at LC8_G40 --operation mode is normal Q1_bar0_reg[21] = AMPP_FUNCTION(Q1L24, H1_low_ad_IR_data[21], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[22] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[22] at LC2_G28 --operation mode is normal Q1_bar0_reg[22] = AMPP_FUNCTION(Q1L24, H1_low_ad_IR_data[22], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[23] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[23] at LC6_G42 --operation mode is normal Q1_bar0_reg[23] = AMPP_FUNCTION(Q1L24, H1_low_ad_IR_data[23], pci_rstn, GLOBAL(pci_clk)); --S1_decR[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_cd:cfg_adr_dec|decR[2] at LC8_B17 --operation mode is normal S1_decR[2] = AMPP_FUNCTION(N1_cfg_adr_dec_ena, H1_ad_ir_address[3], S1_dec_up[0], H1_ad_ir_address[2], pci_rstn, GLOBAL(pci_clk)); --Q1_stat_reg[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|stat_reg[8] at LC5_G43 --operation mode is normal Q1_stat_reg[8] = AMPP_FUNCTION(K1_perr_rep_setR, Q1_stat_reg[8], Q1_par_rep_rst, pci_rstn, GLOBAL(pci_clk)); --Q1L33 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|altr_temp~5032 at LC6_G43 --operation mode is normal Q1L33 = AMPP_FUNCTION(Q1_stat_reg[8], S1_decR[1]); --Q1_bar0_reg[24] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[24] at LC8_G49 --operation mode is normal Q1_bar0_reg[24] = AMPP_FUNCTION(Q1L34, H1_low_ad_IR_data[24], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[25] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[25] at LC7_G46 --operation mode is normal Q1_bar0_reg[25] = AMPP_FUNCTION(Q1L34, H1_low_ad_IR_data[25], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[26] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[26] at LC2_G48 --operation mode is normal Q1_bar0_reg[26] = AMPP_FUNCTION(Q1L34, H1_low_ad_IR_data[26], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[27] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[27] at LC6_G52 --operation mode is normal Q1_bar0_reg[27] = AMPP_FUNCTION(Q1L34, H1_low_ad_IR_data[27], pci_rstn, GLOBAL(pci_clk)); --P7_REG is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_sr:$00203|REG at LC5_G51 --operation mode is normal P7_REG = AMPP_FUNCTION(K1_tabrt_set, P7_REG, Q1_targ_abrt_rcvd_rst, pci_rstn, GLOBAL(pci_clk)); --Q1L23 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|altr_temp~5028 at LC6_G51 --operation mode is normal Q1L23 = AMPP_FUNCTION(P7_REG, S1_decR[1]); --Q1_bar0_reg[28] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[28] at LC2_G32 --operation mode is normal Q1_bar0_reg[28] = AMPP_FUNCTION(Q1L34, H1_low_ad_IR_data[28], pci_rstn, GLOBAL(pci_clk)); --P8_REG is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_sr:$00205|REG at LC2_G50 --operation mode is normal P8_REG = AMPP_FUNCTION(K1_$00063, P8_REG, Q1_mstr_abrt_rst, pci_rstn, GLOBAL(pci_clk)); --Q1L13 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|altr_temp~5027 at LC3_G50 --operation mode is normal Q1L13 = AMPP_FUNCTION(P8_REG, S1_decR[1]); --Q1_bar0_reg[29] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[29] at LC1_G32 --operation mode is normal Q1_bar0_reg[29] = AMPP_FUNCTION(Q1L34, H1_low_ad_IR_data[29], pci_rstn, GLOBAL(pci_clk)); --Q1L93 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|altr_temp~5218 at LC4_G31 --operation mode is normal Q1L93 = AMPP_FUNCTION(S1_decR[4], Q1_bar0_reg[30]); --P9_REG is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_sr:$00207|REG at LC6_G31 --operation mode is normal P9_REG = AMPP_FUNCTION(L1_serr_or, P9_REG, Q1_serr_rst, pci_rstn, GLOBAL(pci_clk)); --Q1L83 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|altr_temp~5217 at LC2_G39 --operation mode is normal Q1L83 = AMPP_FUNCTION(S1_decR[4], Q1_bar0_reg[31]); --P01_REG is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_sr:$00209|REG at LC4_G39 --operation mode is normal P01_REG = AMPP_FUNCTION(L1_perr_det_setR_r3, P01L2, P01_REG, Q1_perr_det_rst, pci_rstn, GLOBAL(pci_clk)); --K1_cbe_oer_r1_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|cbe_oer_r1_lc2 at LC2_D32 --operation mode is normal K1_cbe_oer_r1_lc2 = AMPP_FUNCTION(K1_MS_DXFR, K1_irdy_or_not, K1_frame_or_not); --K1L851 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_lc1~9 at LC3_A3 --operation mode is normal K1L851 = AMPP_FUNCTION(K1_frame_or_lc1a, K1_last_xfr, K1_frame_or_lc1c, K1_frame_or_lc1b, K1L69); --K1L69 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~514 at LC2_A3 --operation mode is normal K1L69 = AMPP_FUNCTION(K1_MS_IDLE_not, K1_frame_or_not); --K1_frame_or_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_lc2 at LC1_C10 --operation mode is normal K1_frame_or_lc2 = AMPP_FUNCTION(K1_frame_or_lc2b, K1_frame_or_lc2a); --K1_MW_LXFR_r[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LXFR_r[1] at LC4_C1 --operation mode is normal K1_MW_LXFR_r[1] = AMPP_FUNCTION(K1_MW_LXFR_lc[1], K1_MW_LXFR_lc[2], A1L472, pci_rstn, GLOBAL(pci_clk), K1_$00201); --K1_MW_LXFR_r[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LXFR_r[2] at LC2_C1 --operation mode is normal K1_MW_LXFR_r[2] = AMPP_FUNCTION(K1_MW_LXFR_lc[3], pci_gntn, pci_rstn, GLOBAL(pci_clk)); --K1_MW_LXFR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LXFR at LC1_C1 --operation mode is normal K1_MW_LXFR = AMPP_FUNCTION(K1_MW_LXFR_r[1], K1_MW_LXFR_r[2]); --K1_frame_or_lc1b is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_lc1b at LC1_A3 --operation mode is normal K1_frame_or_lc1b = AMPP_FUNCTION(K1_MW_LXFR, K1_direct_xfr, N1_no_op_reg[1]); --K1_irdy_or_lc[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|irdy_or_lc[8] at LC6_A1 --operation mode is normal K1_irdy_or_lc[8] = AMPP_FUNCTION(K1_MR_LPXFR, K1_MW_LAST); --K1_irdy_or_lc[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|irdy_or_lc[6] at LC2_C10 --operation mode is normal K1_irdy_or_lc[6] = AMPP_FUNCTION(K1_MR_PXFR, K1_MW_LXFR, N1_no_op_reg[1]); --K1_irdy_or_lc[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|irdy_or_lc[7] at LC3_C10 --operation mode is normal K1_irdy_or_lc[7] = AMPP_FUNCTION(K1_MW_DXFR, K1_MW_DXFR_32, K1_MR_PXFR); --K1_ms_dxfr_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ms_dxfr_lc1 at LC3_D6 --operation mode is normal K1_ms_dxfr_lc1 = AMPP_FUNCTION(K1_ms_dxfr_lc1b, K1_ms_dxfr_lc1a, K1_ms_dxfr_lc1c); --K1_ms_dxfr_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ms_dxfr_lc2 at LC5_D6 --operation mode is normal K1_ms_dxfr_lc2 = AMPP_FUNCTION(K1_MS_DXFR, K1_irdy_or_not, K1_mstr_abrt, K1_frame_or_not); --H1_low_cben_IR_data[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_cben_IR_data[2] at LC1_G20 --operation mode is normal H1_low_cben_IR_data[2] = AMPP_FUNCTION(H1_cben_IR_ce_data, pci_cben_2, pci_rstn, GLOBAL(pci_clk)); --H1_low_cben_IR_data[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_cben_IR_data[3] at LC5_G20 --operation mode is normal H1_low_cben_IR_data[3] = AMPP_FUNCTION(H1_cben_IR_ce_data, pci_cben_3, pci_rstn, GLOBAL(pci_clk)); --L1_xxl[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[8] at LC7_G20 --operation mode is normal L1_xxl[8] = AMPP_FUNCTION(H1_low_cben_IR_data[2], H1_low_cben_IR_data[3], H1_low_cben_IR_data[1], H1_low_cben_IR_data[0]); --L1_xxl[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[9] at LC5_I38 --operation mode is normal L1_xxl[9] = AMPP_FUNCTION(L1_xxl[0], L1_xxl[1], L1_xxl[2], L1_xxl[3]); --L1_xxl[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[10] at LC1_G28 --operation mode is normal L1_xxl[10] = AMPP_FUNCTION(L1_xxl[4], L1_xxl[5], L1_xxl[6], L1_xxl[7]); --L1_xxh[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[11] at LC1_I12 --operation mode is normal L1_xxh[11] = AMPP_FUNCTION(L1_xxh[8], L1_xxh[9], L1_xxh[10]); --L1_perr_or_not_lc3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|perr_or_not_lc3 at LC5_G23 --operation mode is normal L1_perr_or_not_lc3 = AMPP_FUNCTION(N1_perr_vldR, P3_REG, Q1_cmd_reg[6]); --L1_perr_or_not_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|perr_or_not_lc2 at LC6_G23 --operation mode is normal L1_perr_or_not_lc2 = AMPP_FUNCTION(K1_perr_vldR, Q1_cmd_reg[6], K1_tgt_64_response_reg); --K1_$00195 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00195 at LC5_D32 --operation mode is normal K1_$00195 = AMPP_FUNCTION(K1_mstr_abrt, K1_MS_DXFR, K1_frame_or_not, K1_irdy_or_not); --K1_$00196 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00196 at LC7_D32 --operation mode is normal K1_$00196 = AMPP_FUNCTION(K1_MS_DXFR, K1_frame_or_not, K1_irdy_or_not); --S1_dec_up[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_cd:cfg_adr_dec|dec_up[0] at LC7_B20 --operation mode is normal S1_dec_up[0] = AMPP_FUNCTION(H1_ad_ir_address[7], H1_ad_ir_address[6], H1_ad_ir_address[4], H1_ad_ir_address[5]); --H1_cben_IR_ce_data is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|cben_IR_ce_data at LC3_A4 --operation mode is normal H1_cben_IR_ce_data = AMPP_FUNCTION(H1_trg_cben_IR_ce_D, H1_mstr_cben_ir_ce_d); --N1L803 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|stop_or_lc[4]~44 at LC7_F4 --operation mode is normal N1L803 = AMPP_FUNCTION(N1_LR_PXFR, N1_TS_DISC, N1L303); --N1L303 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|stop_or_cc4~0 at LC6_F4 --operation mode is normal N1L303 = AMPP_FUNCTION(P5_REG, N1_$00177, N1_LW_LXFR, N1_TS_DISC); --N1L77 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~165 at LC2_F32 --operation mode is normal N1L77 = AMPP_FUNCTION(N1L603, K1_mstr_actv_lc, N1_TS_ADR_CLMD, N1_cfg_cyc); --K1_lm_hdata_ack_lc[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack_lc[7] at LC3_A10 --operation mode is normal K1_lm_hdata_ack_lc[7] = AMPP_FUNCTION(K1_lm_hdata_ack_lc[6], K1_tgt_64_response_reg); --K1_lm_hdata_ack_lc[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack_lc[5] at LC4_A10 --operation mode is normal K1_lm_hdata_ack_lc[5] = AMPP_FUNCTION(K1_lm_hdata_ack_lc[2], K1_lm_hdata_ack_lc[1], K1L942, K1L052); --K1_retry_det is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|retry_det at LC1_A11 --operation mode is normal K1_retry_det = AMPP_FUNCTION(K1_retry_det_set2, K1_MS_REQ, K1_MS_ENA, K1_retry_det, pci_rstn, GLOBAL(pci_clk)); --K1_disc0_det is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|disc0_det at LC3_A11 --operation mode is normal K1_disc0_det = AMPP_FUNCTION(K1_disc0_det_set, K1_MS_REQ, K1_MS_ENA, K1_disc0_det, pci_rstn, GLOBAL(pci_clk)); --K1_lm_ldata_ack_ena1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ldata_ack_ena1 at LC2_A11 --operation mode is normal K1_lm_ldata_ack_ena1 = AMPP_FUNCTION(K1_retry_det, K1_tabrt_set, K1_disc0_det, K1_mstr_abrt); --K1_lm_hdata_ack_ena1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack_ena1 at LC3_A9 --operation mode is normal K1_lm_hdata_ack_ena1 = AMPP_FUNCTION(K1_MS_DXFR, K1_MS_ADR, K1_MS_ENA, K1_lm_ldata_ack_ena2); --N1_trans64_R is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trans64_R at LC2_G12 --operation mode is normal N1_trans64_R = AMPP_FUNCTION(P3_REG, N1_TS_IDLE_NOT, N1_cfg_cyc, N1_io_cyc); --N1L71 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00161~10 at LC3_F27 --operation mode is normal N1L71 = AMPP_FUNCTION(N1_trans64_R, N1_devsel_OR_lc[3], A1L262, N1L81); --K1_MR_END_d_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_END_d_lc1 at LC3_A1 --operation mode is normal K1_MR_END_d_lc1 = AMPP_FUNCTION(K1_MR_LLXFR, K1_devsel_toR, K1_MR_PXFR, K1_MR_LPXFR); --N1_lt_hdata_ack_r_d[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_hdata_ack_r_d[3] at LC1_F11 --operation mode is normal N1_lt_hdata_ack_r_d[3] = AMPP_FUNCTION(P4_REG, N1_TS_ADR_VLD, N1_mem_cyc, P5_REG); --N1_lt_hdata_ack_r_ena_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_hdata_ack_r_ena_lc1 at LC5_F11 --operation mode is normal N1_lt_hdata_ack_r_ena_lc1 = AMPP_FUNCTION(N1_lt_hdata_ack_r_prn[2], N1_lt_hdata_ack_r_prn[3], P5_REG); --N1_lt_hdata_ack_r_d[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_hdata_ack_r_d[2] at LC2_F11 --operation mode is normal N1_lt_hdata_ack_r_d[2] = AMPP_FUNCTION(N1_lt_ldata_ack_r_d[2], N1_mem_cyc); --N1_trans64_sr_edge_rst is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trans64_sr_edge_rst at LC7_F20 --operation mode is normal N1_trans64_sr_edge_rst = AMPP_FUNCTION(N1_lw_lr_done, N1_TS_IDLE_NOT, N1_LW_IDLE_NOT, N1_LR_IDLE_NOT); --K1_lm_ack_or_r[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_r[1] at LC7_C4 --operation mode is normal K1_lm_ack_or_r[1] = AMPP_FUNCTION(K1_MW_DXFR_32, A1L472, K1_last_xfr, pci_rstn, GLOBAL(pci_clk), K1L23); --K1_lm_ack_or_r[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_r[2] at LC4_C4 --operation mode is normal K1_lm_ack_or_r[2] = AMPP_FUNCTION(K1_lm_ack_or_lc[2], A1L472, K1_last_xfr, K1L412, pci_rstn, GLOBAL(pci_clk), K1L33); --K1_lm_ack_or_r[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_r[3] at LC2_C4 --operation mode is normal K1_lm_ack_or_r[3] = AMPP_FUNCTION(A1L472, K1_lm_ack_or_lc[10], K1_lm_ack_or_lc[4], A1L352, pci_rstn, GLOBAL(pci_clk)); --K1_lm_ack_or_r[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_r[4] at LC1_A15 --operation mode is normal K1_lm_ack_or_r[4] = AMPP_FUNCTION(K1_lm_ack_or_lc[8], K1_lm_ack_or_lc[9], K1_MS_ENA, pci_gntn, pci_rstn, GLOBAL(pci_clk)); --K1_lm_ack_or is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or at LC8_C4 --operation mode is normal K1_lm_ack_or = AMPP_FUNCTION(K1_lm_ack_or_r[1], K1_lm_ack_or_r[2], K1_lm_ack_or_r[3], K1_lm_ack_or_r[4]); --N1_LR_LXFR_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_LXFR_lc[1] at LC3_F12 --operation mode is normal N1_LR_LXFR_lc[1] = AMPP_FUNCTION(N1_lt_rdynR_R, N1_lt_ldata_ack_r, N1_direct_xfr); --K1_lm_adr_ack_R_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_adr_ack_R_lc1 at LC5_D17 --operation mode is normal K1_lm_adr_ack_R_lc1 = AMPP_FUNCTION(K1_park, K1_MS_REQ, K1_lm_adr_ack_R, K1_MS_ENA); --N1L32 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00188~0 at LC6_F21 --operation mode is normal N1L32 = AMPP_FUNCTION(N1_TS_ADR_CLMD, N1_cfg_cyc, N1_retry, K1_mstr_actv_lc); --N1L063 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_DXFR_d_lc[1]~45 at LC7_F21 --operation mode is normal N1L063 = AMPP_FUNCTION(N1_cfg_cyc, imm_dpm_dec_reg_LT_RDY_n_pci, N1L32); --N1L28 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~399 at LC4_F50 --operation mode is normal N1L28 = AMPP_FUNCTION(N1_TS_DXFR, N1_trdy_OR_NOT); --N1L47 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~155 at LC4_F13 --operation mode is normal N1L47 = AMPP_FUNCTION(N1_LR_WAIT_32, N1_LR_WAIT, N1L74); --N1_wait_wait32_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|wait_wait32_lc[1] at LC3_F24 --operation mode is normal N1_wait_wait32_lc[1] = AMPP_FUNCTION(N1_LR_PXFR, N1_lt_rdynR, N1_TS_DISC); --N1L91 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00173~10 at LC2_F13 --operation mode is normal N1L91 = AMPP_FUNCTION(N1_trdy_OR_lc[4], N1_TS_ADR_CLMD, N1_retry, N1L37); --N1L37 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~153 at LC1_F13 --operation mode is normal N1L37 = AMPP_FUNCTION(N1_cfg_cyc, N1_TS_ADR_CLMD, N1_retry); --N1_retry_set_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|retry_set_lc at LC8_F25 --operation mode is normal N1_retry_set_lc = AMPP_FUNCTION(N1_adr_phase_lc1, N1_cfg_cyc, N1_TS_IDLE_NOT); --N1_LR_LXFR_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_LXFR_lc[2] at LC1_F2 --operation mode is normal N1_LR_LXFR_lc[2] = AMPP_FUNCTION(N1_lt_rdynR, N1_lt_ldata_ack_r, N1_direct_xfr); --K1_req64_or_not is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|req64_or_not at LC8_F17 --operation mode is normal K1_req64_or_not = AMPP_FUNCTION(K1_req64_or_lc[3], K1_req64_or_lc[2], GND, pci_gntn, !pci_rstn, GLOBAL(pci_clk), K1L411); --N1_LR_WAIT_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_WAIT_lc[1] at LC2_F2 --operation mode is normal N1_LR_WAIT_lc[1] = AMPP_FUNCTION(N1_LR_PXFR, N1_TS_DISC); --N1_LR_PXFR_32_r2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_32_r2 at LC2_F7 --operation mode is normal N1_LR_PXFR_32_r2 = AMPP_FUNCTION(N1_LR_PXFR_32_lc[2], N1_LR_WAIT_32, pci_rstn, GLOBAL(pci_clk), N1L301); --N1_LR_PXFR_32_r1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_32_r1 at LC8_F7 --operation mode is normal N1_LR_PXFR_32_r1 = AMPP_FUNCTION(N1L651, pci_rstn, GLOBAL(pci_clk), N1_$00223); --N1_LR_PXFR_32 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_32 at LC3_F7 --operation mode is normal N1_LR_PXFR_32 = AMPP_FUNCTION(N1_LR_PXFR_32_r2, N1_LR_PXFR_32_r1); --N1L361 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_cc1~0 at LC4_F16 --operation mode is normal N1L361 = AMPP_FUNCTION(N1_LR_LXFR_lc[1], N1_direct_xfr, N1_lt_rdynR, N1_TS_DISC); --V31_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|cmpchain:cmp[1]|comptree:comp|cmpchain:cmp[1]|aeb_out at LC6_G27 --operation mode is normal V31_aeb_out = Q1_bar0_reg[25] & H1_ad_ir_address[25] & (Q1_bar0_reg[24] $ !H1_ad_ir_address[24]) # !Q1_bar0_reg[25] & !H1_ad_ir_address[25] & (Q1_bar0_reg[24] $ !H1_ad_ir_address[24]); --V21_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|cmpchain:cmp[1]|comptree:comp|cmpchain:cmp[0]|aeb_out at LC1_G29 --operation mode is normal V21_aeb_out = Q1_bar0_reg[23] & H1_ad_ir_address[23] & (Q1_bar0_reg[22] $ !H1_ad_ir_address[22]) # !Q1_bar0_reg[23] & !H1_ad_ir_address[23] & (Q1_bar0_reg[22] $ !H1_ad_ir_address[22]); --V41_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|cmpchain:cmp[1]|comptree:comp|cmpchain:cmp[2]|aeb_out at LC7_G27 --operation mode is normal V41_aeb_out = Q1_bar0_reg[27] & H1_ad_ir_address[27] & (Q1_bar0_reg[26] $ !H1_ad_ir_address[26]) # !Q1_bar0_reg[27] & !H1_ad_ir_address[27] & (Q1_bar0_reg[26] $ !H1_ad_ir_address[26]); --V51_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|cmpchain:cmp[1]|comptree:comp|cmpchain:cmp[3]|aeb_out at LC1_G47 --operation mode is normal V51_aeb_out = Q1_bar0_reg[29] & H1_ad_ir_address[29] & (Q1_bar0_reg[28] $ !H1_ad_ir_address[28]) # !Q1_bar0_reg[29] & !H1_ad_ir_address[29] & (Q1_bar0_reg[28] $ !H1_ad_ir_address[28]); --V7_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|cmpchain:cmp[0]|comptree:comp|cmpchain:cmp[1]|aeb_out at LC2_G34 --operation mode is normal V7_aeb_out = Q1_bar0_reg[17] & H1_ad_ir_address[17] & (Q1_bar0_reg[16] $ !H1_ad_ir_address[16]) # !Q1_bar0_reg[17] & !H1_ad_ir_address[17] & (Q1_bar0_reg[16] $ !H1_ad_ir_address[16]); --Q1_bar0_reg[15] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[15] at LC8_G26 --operation mode is normal Q1_bar0_reg[15] = AMPP_FUNCTION(Q1L14, H1_low_ad_IR_data[15], pci_rstn, GLOBAL(pci_clk)); --Q1_bar0_reg[14] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_reg[14] at LC3_G26 --operation mode is normal Q1_bar0_reg[14] = AMPP_FUNCTION(Q1L14, H1_low_ad_IR_data[14], pci_rstn, GLOBAL(pci_clk)); --V6_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|cmpchain:cmp[0]|comptree:comp|cmpchain:cmp[0]|aeb_out at LC5_G26 --operation mode is normal V6_aeb_out = Q1_bar0_reg[15] & H1_ad_ir_address[15] & (Q1_bar0_reg[14] $ !H1_ad_ir_address[14]) # !Q1_bar0_reg[15] & !H1_ad_ir_address[15] & (Q1_bar0_reg[14] $ !H1_ad_ir_address[14]); --V8_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|cmpchain:cmp[0]|comptree:comp|cmpchain:cmp[2]|aeb_out at LC6_G35 --operation mode is normal V8_aeb_out = Q1_bar0_reg[19] & H1_ad_ir_address[19] & (Q1_bar0_reg[18] $ !H1_ad_ir_address[18]) # !Q1_bar0_reg[19] & !H1_ad_ir_address[19] & (Q1_bar0_reg[18] $ !H1_ad_ir_address[18]); --V9_aeb_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lpm_compare:bar0_comp|comptree:comparator|cmpchain:cmp[0]|comptree:comp|cmpchain:cmp[3]|aeb_out at LC2_G29 --operation mode is normal V9_aeb_out = Q1_bar0_reg[21] & H1_ad_ir_address[21] & (Q1_bar0_reg[20] $ !H1_ad_ir_address[20]) # !Q1_bar0_reg[21] & !H1_ad_ir_address[21] & (Q1_bar0_reg[20] $ !H1_ad_ir_address[20]); --H1_low_ad_IR_data[31] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[31] at LC1_G49 --operation mode is normal H1_low_ad_IR_data[31] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_31, pci_rstn, GLOBAL(pci_clk)); --Q1L34 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_ena[3]~15 at LC5_G49 --operation mode is normal Q1L34 = AMPP_FUNCTION(N1_cfg_dat_vld, S1_decR[4], H1_low_cben_IR_data[3]); --H1_low_ad_IR_data[30] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[30] at LC8_G32 --operation mode is normal H1_low_ad_IR_data[30] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_30, pci_rstn, GLOBAL(pci_clk)); --K1_MW_DXFR_32_r[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_32_r[1] at LC8_C7 --operation mode is normal K1_MW_DXFR_32_r[1] = AMPP_FUNCTION(A1L472, K1_MW_DXFR_32_lc[1], K1_MW_WAIT_32, K1_latcntr_toR, pci_rstn, GLOBAL(pci_clk), K1L84); --K1_MW_DXFR_32_r[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_32_r[2] at LC3_C7 --operation mode is normal K1_MW_DXFR_32_r[2] = AMPP_FUNCTION(K1_MW_DXFR_32_lc[2], K1_MW_DXFR_32_lc[3], A1L472, pci_rstn, GLOBAL(pci_clk), K1L94); --K1_MW_DXFR_32_r[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_32_r[3] at LC6_C7 --operation mode is normal K1_MW_DXFR_32_r[3] = AMPP_FUNCTION(K1_MW_DXFR_32, N1_no_op_reg[1], A1L472, pci_rstn, GLOBAL(pci_clk), K1L05); --K1_MW_DXFR_32 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_32 at LC4_C7 --operation mode is normal K1_MW_DXFR_32 = AMPP_FUNCTION(K1_MW_DXFR_32_r[1], K1_MW_DXFR_32_r[2], K1_MW_DXFR_32_r[3]); --K1L163 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_r2_d~10 at LC4_C23 --operation mode is normal K1L163 = AMPP_FUNCTION(K1_direct_xfr, N1_targ_oeR_reg, N1_ack64_OR_not); --K1L363 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_r2_d~34 at LC4_C23 --operation mode is normal K1L363 = AMPP_FUNCTION(K1_direct_xfr, N1_targ_oeR_reg, N1_ack64_OR_not); --K1L12 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00108~11 at LC2_C19 --operation mode is normal K1L12 = AMPP_FUNCTION(A1L472, K1_WAIT_WAIT32_lc3, K1_MW_WAIT_32_d_lc_1d, A1L772); --N1L8 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00129~0 at LC1_F24 --operation mode is normal N1L8 = AMPP_FUNCTION(N1_wait_wait32_lc[4], A1L262); --Q1_cmd_reg[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cmd_reg[0] at LC2_G4 --operation mode is normal Q1_cmd_reg[0] = AMPP_FUNCTION(Q1L501, H1_low_ad_IR_data[0], pci_rstn, GLOBAL(pci_clk)); --Q1L53 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|altr_temp~5056 at LC3_G4 --operation mode is normal Q1L53 = AMPP_FUNCTION(Q1_cmd_reg[0], S1_decR[1]); --S1_decR[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_cd:cfg_adr_dec|decR[3] at LC6_B17 --operation mode is normal S1_decR[3] = AMPP_FUNCTION(N1_cfg_adr_dec_ena, H1_ad_ir_address[3], H1_ad_ir_address[2], S1_dec_up[0], pci_rstn, GLOBAL(pci_clk)); --Q1_cache_line[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cache_line[0] at LC4_I4 --operation mode is normal Q1_cache_line[0] = AMPP_FUNCTION(Q1L29, H1_low_ad_IR_data[0], pci_rstn, GLOBAL(pci_clk)); --H1_high_data_out_HR[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[0] at LC1_I9 --operation mode is normal H1_high_data_out_HR[0] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, A1L27, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[0] at LC2_I9 --operation mode is normal H1_high_ad_out_lc[0] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[0], H1_mstr_ad_sel, H1_trg_ad_sel); --H1_low_data_out_HR_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_HR_lc at LC6_A25 --operation mode is normal H1_low_data_out_HR_lc = AMPP_FUNCTION(H1_trg_ad_sel, K1_MS_ENA); --Q1_cache_line[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cache_line[1] at LC4_I19 --operation mode is normal Q1_cache_line[1] = AMPP_FUNCTION(Q1L29, H1_low_ad_IR_data[1], pci_rstn, GLOBAL(pci_clk)); --Q1L73 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|altr_temp~5183 at LC6_I3 --operation mode is normal Q1L73 = AMPP_FUNCTION(Q1_cache_line[1], S1_decR[3]); --H1_high_data_out_HR[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[1] at LC4_I9 --operation mode is normal H1_high_data_out_HR[1] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, A1L17, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[1] at LC8_I9 --operation mode is normal H1_high_ad_out_lc[1] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[1], H1_mstr_ad_sel, H1_trg_ad_sel); --Q1_cache_line[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cache_line[2] at LC4_J5 --operation mode is normal Q1_cache_line[2] = AMPP_FUNCTION(Q1L29, H1_low_ad_IR_data[2], pci_rstn, GLOBAL(pci_clk)); --H1_high_data_out_HR[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[2] at LC1_J17 --operation mode is normal H1_high_data_out_HR[2] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, A1L07, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[2] at LC2_J13 --operation mode is normal H1_high_ad_out_lc[2] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[2], H1_mstr_ad_sel, H1_trg_ad_sel); --Q1_cache_line[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cache_line[3] at LC5_I5 --operation mode is normal Q1_cache_line[3] = AMPP_FUNCTION(Q1L29, H1_low_ad_IR_data[3], pci_rstn, GLOBAL(pci_clk)); --H1_high_data_out_HR[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[3] at LC5_I9 --operation mode is normal H1_high_data_out_HR[3] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, A1L96, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[3] at LC3_I9 --operation mode is normal H1_high_ad_out_lc[3] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[3], H1_mstr_ad_sel, H1_trg_ad_sel); --Q1_cmd_reg[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cmd_reg[4] at LC2_G6 --operation mode is normal Q1_cmd_reg[4] = AMPP_FUNCTION(Q1L501, H1_low_ad_IR_data[4], pci_rstn, GLOBAL(pci_clk)); --Q1L43 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|altr_temp~5052 at LC1_G6 --operation mode is normal Q1L43 = AMPP_FUNCTION(Q1_cmd_reg[4], S1_decR[1]); --Q1_cache_line[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cache_line[4] at LC4_I7 --operation mode is normal Q1_cache_line[4] = AMPP_FUNCTION(Q1L29, H1_low_ad_IR_data[4], pci_rstn, GLOBAL(pci_clk)); --H1_high_data_out_HR[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[4] at LC7_I9 --operation mode is normal H1_high_data_out_HR[4] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, A1L86, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[4] at LC6_I9 --operation mode is normal H1_high_ad_out_lc[4] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[4], H1_mstr_ad_sel, H1_trg_ad_sel); --Q1_cache_line[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cache_line[5] at LC6_I8 --operation mode is normal Q1_cache_line[5] = AMPP_FUNCTION(Q1L29, H1_low_ad_IR_data[5], pci_rstn, GLOBAL(pci_clk)); --H1_high_data_out_HR[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[5] at LC1_I13 --operation mode is normal H1_high_data_out_HR[5] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, A1L76, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[5] at LC3_I13 --operation mode is normal H1_high_ad_out_lc[5] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[5], H1_mstr_ad_sel, H1_trg_ad_sel); --Q1_cache_line[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cache_line[6] at LC2_I19 --operation mode is normal Q1_cache_line[6] = AMPP_FUNCTION(Q1L29, H1_low_ad_IR_data[6], pci_rstn, GLOBAL(pci_clk)); --Q1L63 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|altr_temp~5178 at LC3_I10 --operation mode is normal Q1L63 = AMPP_FUNCTION(Q1_cache_line[6], S1_decR[3]); --H1_high_data_out_HR[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[6] at LC2_I13 --operation mode is normal H1_high_data_out_HR[6] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, A1L66, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[6] at LC6_I13 --operation mode is normal H1_high_ad_out_lc[6] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[6], H1_mstr_ad_sel, H1_trg_ad_sel); --Q1_cache_line[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|cache_line[7] at LC4_J14 --operation mode is normal Q1_cache_line[7] = AMPP_FUNCTION(Q1L29, H1_low_ad_IR_data[7], pci_rstn, GLOBAL(pci_clk)); --H1_high_data_out_HR[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[7] at LC4_L9 --operation mode is normal H1_high_data_out_HR[7] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, A1L56, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[7] at LC5_L9 --operation mode is normal H1_high_ad_out_lc[7] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[7], H1_mstr_ad_sel, H1_trg_ad_sel); --H1_high_data_out_HR[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[10] at LC2_I14 --operation mode is normal H1_high_data_out_HR[10] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_trg_ad_sel, H1_mstr_ad_sel, A1L26, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[10] at LC4_I16 --operation mode is normal H1_high_ad_out_lc[10] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[10], H1_mstr_ad_sel, H1_trg_ad_sel); --Q1_lat_tmr_reg[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lat_tmr_reg[0] at LC1_G7 --operation mode is normal Q1_lat_tmr_reg[0] = AMPP_FUNCTION(Q1L39, H1_low_ad_IR_data[11], pci_rstn, GLOBAL(pci_clk)); --H1_high_data_out_HR[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[11] at LC5_I13 --operation mode is normal H1_high_data_out_HR[11] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_trg_ad_sel, H1_mstr_ad_sel, A1L16, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[11] at LC8_I13 --operation mode is normal H1_high_ad_out_lc[11] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[11], H1_mstr_ad_sel, H1_trg_ad_sel); --Q1_lat_tmr_reg[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lat_tmr_reg[1] at LC3_G9 --operation mode is normal Q1_lat_tmr_reg[1] = AMPP_FUNCTION(Q1L39, H1_low_ad_IR_data[12], pci_rstn, GLOBAL(pci_clk)); --H1_high_data_out_HR[12] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[12] at LC7_I13 --operation mode is normal H1_high_data_out_HR[12] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, ix1166_lc, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[12] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[12] at LC4_I13 --operation mode is normal H1_high_ad_out_lc[12] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[12], H1_mstr_ad_sel, H1_trg_ad_sel); --Q1_lat_tmr_reg[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lat_tmr_reg[2] at LC8_G9 --operation mode is normal Q1_lat_tmr_reg[2] = AMPP_FUNCTION(Q1L39, H1_low_ad_IR_data[13], pci_rstn, GLOBAL(pci_clk)); --H1_high_data_out_HR[13] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[13] at LC1_I22 --operation mode is normal H1_high_data_out_HR[13] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, ix1165_lc, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[13] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[13] at LC4_I22 --operation mode is normal H1_high_ad_out_lc[13] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[13], H1_mstr_ad_sel, H1_trg_ad_sel); --Q1_lat_tmr_reg[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lat_tmr_reg[3] at LC1_G9 --operation mode is normal Q1_lat_tmr_reg[3] = AMPP_FUNCTION(Q1L39, H1_low_ad_IR_data[14], pci_rstn, GLOBAL(pci_clk)); --H1_high_data_out_HR[14] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[14] at LC5_I22 --operation mode is normal H1_high_data_out_HR[14] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, ix1164_lc, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[14] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[14] at LC3_I22 --operation mode is normal H1_high_ad_out_lc[14] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[14], H1_mstr_ad_sel, H1_trg_ad_sel); --Q1_lat_tmr_reg[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|lat_tmr_reg[4] at LC1_G10 --operation mode is normal Q1_lat_tmr_reg[4] = AMPP_FUNCTION(Q1L39, H1_low_ad_IR_data[15], pci_rstn, GLOBAL(pci_clk)); --H1_high_data_out_HR[15] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR[15] at LC7_I22 --operation mode is normal H1_high_data_out_HR[15] = AMPP_FUNCTION(H1_high_data_out_HR_ena, H1_mstr_ad_sel, H1_trg_ad_sel, ix1163_lc, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_out_lc[15] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[15] at LC6_I22 --operation mode is normal H1_high_ad_out_lc[15] = AMPP_FUNCTION(H1_mstr_trg_hr_dat_sel, H1_high_data_out_HR[15], H1_mstr_ad_sel, H1_trg_ad_sel); --H1_low_ad_IR_data[16] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[16] at LC5_G28 --operation mode is normal H1_low_ad_IR_data[16] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_16, pci_rstn, GLOBAL(pci_clk)); --Q1L24 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_ena[2]~18 at LC8_G20 --operation mode is normal Q1L24 = AMPP_FUNCTION(N1_cfg_dat_vld, S1_decR[4], H1_low_cben_IR_data[2]); --K1_ADOR_ena_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ADOR_ena_lc at LC8_I2 --operation mode is normal K1_ADOR_ena_lc = AMPP_FUNCTION(K1_dac_cyc_strobe, K1_MS_ADR2, K1_MS_ENA); --H1_low_ad_IR_data[17] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[17] at LC2_G33 --operation mode is normal H1_low_ad_IR_data[17] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_17, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[18] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[18] at LC3_G28 --operation mode is normal H1_low_ad_IR_data[18] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_18, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[19] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[19] at LC1_G4 --operation mode is normal H1_low_ad_IR_data[19] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_19, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[20] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[20] at LC3_G29 --operation mode is normal H1_low_ad_IR_data[20] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_20, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[21] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[21] at LC2_G40 --operation mode is normal H1_low_ad_IR_data[21] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_21, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[22] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[22] at LC4_G28 --operation mode is normal H1_low_ad_IR_data[22] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_22, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[23] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[23] at LC7_G42 --operation mode is normal H1_low_ad_IR_data[23] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_23, pci_rstn, GLOBAL(pci_clk)); --K1_perr_rep_setR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|perr_rep_setR at LC3_D32 --operation mode is normal K1_perr_rep_setR = AMPP_FUNCTION(K1_MS_TAR_R, K1_MS_TAR, K1_MS_DXFR, A1L962, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[24] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[24] at LC2_G49 --operation mode is normal H1_low_ad_IR_data[24] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_24, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[25] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[25] at LC8_G46 --operation mode is normal H1_low_ad_IR_data[25] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_25, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[26] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[26] at LC5_G48 --operation mode is normal H1_low_ad_IR_data[26] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_26, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[27] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[27] at LC8_G52 --operation mode is normal H1_low_ad_IR_data[27] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_27, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[28] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[28] at LC6_G32 --operation mode is normal H1_low_ad_IR_data[28] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_28, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[29] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[29] at LC7_G32 --operation mode is normal H1_low_ad_IR_data[29] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_29, pci_rstn, GLOBAL(pci_clk)); --L1_perr_det_setR_r3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|perr_det_setR_r3 at LC7_G13 --operation mode is normal L1_perr_det_setR_r3 = AMPP_FUNCTION(H1_trg_serr_vld, L1_xxlad[11], A1L662, pci_rstn, GLOBAL(pci_clk)); --L1_perr_det_setR_r2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|perr_det_setR_r2 at LC7_G23 --operation mode is normal L1_perr_det_setR_r2 = AMPP_FUNCTION(L1_$00005, H1_par_oeR, H1_par64_or, L1_xxh[11], pci_rstn, GLOBAL(pci_clk)); --L1_perr_det_setR_r1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|perr_det_setR_r1 at LC1_G1 --operation mode is normal L1_perr_det_setR_r1 = AMPP_FUNCTION(N1_perr_vldR, K1_perr_vldR, L1_xxl[11], A1L662, pci_rstn, GLOBAL(pci_clk)); --P01L2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_sr:$00209|REG~8 at LC1_G23 --operation mode is normal P01L2 = AMPP_FUNCTION(L1_perr_det_setR_r2, L1_perr_det_setR_r1); --N1L27 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~143 at LC5_F28 --operation mode is normal N1L27 = AMPP_FUNCTION(N1_stop_OR_NOT, N1_trdy_OR_NOT, N1_TS_DISC); --K1_frame_or_lc3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_lc3 at LC2_C16 --operation mode is normal K1_frame_or_lc3 = AMPP_FUNCTION(K1_frame_or_lc3a, K1_last_xfr, K1_frame_or_lc3c, K1_frame_or_lc3b); --K1_frame_or_lc1a is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_lc1a at LC4_A3 --operation mode is normal K1_frame_or_lc1a = AMPP_FUNCTION(K1_MR_LLXFR_r2, K1_MR_LLXFR_r1, K1_devsel_toR, K1_MS_DXFR); --K1_adr_phase is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|adr_phase at LC7_A25 --operation mode is normal K1_adr_phase = AMPP_FUNCTION(K1_dac_cyc_reg, K1_MS_ADR, K1_MS_ENA, pci_gntn, pci_rstn, GLOBAL(pci_clk)); --K1_frame_or_lc1c is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_lc1c at LC5_A3 --operation mode is normal K1_frame_or_lc1c = AMPP_FUNCTION(K1_adr_phase, K1_wr_rdn, K1_MR_IDLE_not); --K1_frame_or_lc2a is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_lc2a at LC7_C10 --operation mode is normal K1_frame_or_lc2a = AMPP_FUNCTION(K1_MS_DXFR, K1_wr_rdn, K1_MW_LXFR); --K1L74 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00223~0 at LC1_C9 --operation mode is normal K1L74 = AMPP_FUNCTION(N1_no_op_reg[1], A1L352); --K1L03 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00163~10 at LC5_C21 --operation mode is normal K1L03 = AMPP_FUNCTION(K1_irdy_or_lc[2], K1_irdy_or_lc[1], K1_irdy_or_lc[3], K1L99); --K1L99 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~550 at LC4_C21 --operation mode is normal K1L99 = AMPP_FUNCTION(K1_devsel_toR, K1_MS_DXFR); --K1_MR_LPXFR_r1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LPXFR_r1 at LC4_A19 --operation mode is normal K1_MR_LPXFR_r1 = AMPP_FUNCTION(K1L592, K1_MR_LPXFR_lc2, A1L472, pci_rstn, GLOBAL(pci_clk), K1_$00246); --K1_MR_PXFR_r2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_PXFR_r2 at LC3_C13 --operation mode is normal K1_MR_PXFR_r2 = AMPP_FUNCTION(K1L013, K1_MR_PXFR, K1_devsel_toR, pci_rstn, GLOBAL(pci_clk)); --K1_MR_PXFR_r1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_PXFR_r1 at LC4_C13 --operation mode is normal K1_MR_PXFR_r1 = AMPP_FUNCTION(K1_MR_PXFR_lc2, A1L472, K1_MR_PXFR_lc1, K1_last_xfr, pci_rstn, GLOBAL(pci_clk)); --K1_MR_PXFR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_PXFR at LC7_C13 --operation mode is normal K1_MR_PXFR = AMPP_FUNCTION(K1_MR_PXFR_r2, K1_MR_PXFR_r1); --K1_MW_DXFR_r2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_r2 at LC3_C23 --operation mode is normal K1_MW_DXFR_r2 = AMPP_FUNCTION(K1L263, pci_rstn, GLOBAL(pci_clk), K1L24); --K1_MW_DXFR_r1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_r1 at LC2_C24 --operation mode is normal K1_MW_DXFR_r1 = AMPP_FUNCTION(A1L472, K1_MW_DXFR_lc[1], K1_MW_DXFR_lc[2], K1_last_xfr, pci_rstn, GLOBAL(pci_clk), K1L14); --K1_MW_DXFR_r3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_r3 at LC1_C4 --operation mode is normal K1_MW_DXFR_r3 = AMPP_FUNCTION(K1_MW_HOLD, A1L472, K1L901, K1_devsel_toR, pci_rstn, GLOBAL(pci_clk)); --K1_MW_DXFR_r4 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_r4 at LC8_C24 --operation mode is normal K1_MW_DXFR_r4 = AMPP_FUNCTION(K1_MW_DXFR, N1_no_op_reg[1], A1L472, K1_last_xfr, pci_rstn, GLOBAL(pci_clk), K1L34); --K1_MW_DXFR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR at LC3_C24 --operation mode is normal K1_MW_DXFR = AMPP_FUNCTION(K1_MW_DXFR_r2, K1_MW_DXFR_r1, K1_MW_DXFR_r3, K1_MW_DXFR_r4); --K1L763 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR~31 at LC3_C24 --operation mode is normal K1L763 = AMPP_FUNCTION(K1_MW_DXFR_r2, K1_MW_DXFR_r1, K1_MW_DXFR_r3, K1_MW_DXFR_r4); --K1_ms_dxfr_lc1b is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ms_dxfr_lc1b at LC6_D6 --operation mode is normal K1_ms_dxfr_lc1b = AMPP_FUNCTION(K1_MS_DXFR, K1_irdy_or_not, K1_frame_or_not); --K1_ms_dxfr_lc1a is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ms_dxfr_lc1a at LC7_D6 --operation mode is normal K1_ms_dxfr_lc1a = AMPP_FUNCTION(K1_MS_ADR2, K1_MS_ADR, K1_dac_cyc_reg); --K1_ms_dxfr_lc1c is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|ms_dxfr_lc1c at LC8_D6 --operation mode is normal K1_ms_dxfr_lc1c = AMPP_FUNCTION(K1_MS_DXFR, K1_irdy_or_not, K1_frame_or_not, K1_mstr_abrt); --N1L51 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00155~0 at LC7_G1 --operation mode is normal N1L51 = AMPP_FUNCTION(N1_TS_IDLE_NOT, N1_no_op_reg[1], A1L262); --L1_xxl[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[0] at LC6_I38 --operation mode is normal L1_xxl[0] = AMPP_FUNCTION(H1_low_ad_IR_data[0], H1_low_ad_IR_data[1], H1_low_ad_IR_data[2], H1_low_ad_IR_data[3]); --L1_xxl[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[1] at LC8_I25 --operation mode is normal L1_xxl[1] = AMPP_FUNCTION(H1_low_ad_IR_data[4], H1_low_ad_IR_data[5], H1_low_ad_IR_data[6], H1_low_ad_IR_data[7]); --H1_low_ad_IR_data[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[10] at LC7_I38 --operation mode is normal H1_low_ad_IR_data[10] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_10, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[11] at LC2_B13 --operation mode is normal H1_low_ad_IR_data[11] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_11, pci_rstn, GLOBAL(pci_clk)); --L1_xxl[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[2] at LC8_I38 --operation mode is normal L1_xxl[2] = AMPP_FUNCTION(H1_low_ad_IR_data[10], H1_low_ad_IR_data[11], H1_low_ad_IR_data[9], H1_low_ad_IR_data[8]); --H1_low_ad_IR_data[13] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[13] at LC2_G9 --operation mode is normal H1_low_ad_IR_data[13] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_13, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[12] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[12] at LC5_G9 --operation mode is normal H1_low_ad_IR_data[12] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_12, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[15] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[15] at LC4_G26 --operation mode is normal H1_low_ad_IR_data[15] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_15, pci_rstn, GLOBAL(pci_clk)); --H1_low_ad_IR_data[14] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_ad_IR_data[14] at LC2_G18 --operation mode is normal H1_low_ad_IR_data[14] = AMPP_FUNCTION(H1_ad_IR_ce_data, pci_ad_14, pci_rstn, GLOBAL(pci_clk)); --L1_xxl[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[3] at LC4_G9 --operation mode is normal L1_xxl[3] = AMPP_FUNCTION(H1_low_ad_IR_data[13], H1_low_ad_IR_data[12], H1_low_ad_IR_data[15], H1_low_ad_IR_data[14]); --L1_xxl[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[4] at LC6_G28 --operation mode is normal L1_xxl[4] = AMPP_FUNCTION(H1_low_ad_IR_data[19], H1_low_ad_IR_data[18], H1_low_ad_IR_data[17], H1_low_ad_IR_data[16]); --L1_xxl[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[5] at LC7_G28 --operation mode is normal L1_xxl[5] = AMPP_FUNCTION(H1_low_ad_IR_data[23], H1_low_ad_IR_data[22], H1_low_ad_IR_data[21], H1_low_ad_IR_data[20]); --L1_xxl[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[6] at LC8_G28 --operation mode is normal L1_xxl[6] = AMPP_FUNCTION(H1_low_ad_IR_data[27], H1_low_ad_IR_data[26], H1_low_ad_IR_data[25], H1_low_ad_IR_data[24]); --L1_xxl[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxl[7] at LC3_G32 --operation mode is normal L1_xxl[7] = AMPP_FUNCTION(H1_low_ad_IR_data[29], H1_low_ad_IR_data[28], H1_low_ad_IR_data[31], H1_low_ad_IR_data[30]); --L1_xxh[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[9] at LC6_I12 --operation mode is normal L1_xxh[9] = AMPP_FUNCTION(L1_xxh[0], L1_xxh[1], L1_xxh[2], L1_xxh[3]); --L1_xxh[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[10] at LC8_I42 --operation mode is normal L1_xxh[10] = AMPP_FUNCTION(L1_xxh[4], L1_xxh[5], L1_xxh[6], L1_xxh[7]); --N1_cfg_adr_dec_ena is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|cfg_adr_dec_ena at LC8_B26 --operation mode is normal N1_cfg_adr_dec_ena = AMPP_FUNCTION(N1_cfg_adr_dec_ena_lc1, N1_cfg_adr_dec_ena_lc2, N1_adr_phase_lc1); --H1_mstr_cben_ir_ce_d is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|mstr_cben_ir_ce_d at LC5_A4 --operation mode is normal H1_mstr_cben_ir_ce_d = AMPP_FUNCTION(K1_MS_DXFR, K1_MS_ADR, K1_MS_ENA); --N1_$00177 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00177 at LC4_F4 --operation mode is normal N1_$00177 = AMPP_FUNCTION(N1_TS_DISC, N1_LR_DONE, N1_LR_IDLE_NOT, N1_trdy_OR_NOT); --H1_high_data_out_HR_ena is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_data_out_HR_ena at LC4_C6 --operation mode is normal H1_high_data_out_HR_ena = AMPP_FUNCTION(K1_dati_hr_ena_lc, K1_MS_ENA, N1_dati_hr_ena_lc, N1_TS_IDLE_NOT); --K1_DXFR_write_lc3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|DXFR_write_lc3 at LC1_A6 --operation mode is normal K1_DXFR_write_lc3 = AMPP_FUNCTION(K1_wr_rdn, K1_DXFR_write_lc2, K1_DXFR_write_lc1); --K1_DXFR_write_lc4 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|DXFR_write_lc4 at LC2_A6 --operation mode is normal K1_DXFR_write_lc4 = AMPP_FUNCTION(K1_DXFR_write_lc4a, K1_wr_rdn); --N1L81 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00162~10 at LC2_F27 --operation mode is normal N1L81 = AMPP_FUNCTION(N1_trans64_R, N1_TS_ADR_VLD, L1_serr_or, N1L78); --N1L78 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~521 at LC1_F27 --operation mode is normal N1L78 = AMPP_FUNCTION(N1_trans64_R, N1L221); --N1_lt_hdata_ack_r_prn[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_hdata_ack_r_prn[2] at LC3_F11 --operation mode is normal N1_lt_hdata_ack_r_prn[2] = AMPP_FUNCTION(N1_lt_hdata_ack_r_prn[1], N1_mem_cyc, N1_retry, N1L69); --K1_devsel_toR_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|devsel_toR_lc1 at LC4_C9 --operation mode is normal K1_devsel_toR_lc1 = AMPP_FUNCTION(K1_dac_cyc_reg, E4_q[0], E4_q[1], E4_q[2]); --N1L533 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trans64_R~8 at LC1_F20 --operation mode is normal N1L533 = AMPP_FUNCTION(P3_REG, N1_TS_IDLE_NOT); --N1_trans64_reg_R is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trans64_reg_R at LC8_F20 --operation mode is normal N1_trans64_reg_R = AMPP_FUNCTION(P3_REG, pci_rstn, GLOBAL(pci_clk)); --N1L201 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~1662 at LC2_F20 --operation mode is normal N1L201 = AMPP_FUNCTION(N1_lw_lr_done, K1_mstr_actv_lc, N1_trans64_reg_R, N1L533); --N1_LW_DONE_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LW_DONE_lc[1] at LC5_F18 --operation mode is normal N1_LW_DONE_lc[1] = AMPP_FUNCTION(imm_dpm_dec_reg_LT_RDY_n_pci, N1_TS_DISC); --N1L35 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00239~0 at LC4_F7 --operation mode is normal N1L35 = AMPP_FUNCTION(A1L262, A1L652); --K1_MW_WAIT is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT at LC6_C5 --operation mode is normal K1_MW_WAIT = AMPP_FUNCTION(N1_no_op_reg[1], A1L472, K1_MW_WAIT_lc[2], K1L034, pci_rstn, GLOBAL(pci_clk), K1L44); --K1_MW_END_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_END_lc1 at LC8_C17 --operation mode is normal K1_MW_END_lc1 = AMPP_FUNCTION(K1_MW_DXFR, K1_MW_LAST, K1_MW_WAIT); --N1_burst_trans_r is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|burst_trans_r at LC5_F50 --operation mode is normal N1_burst_trans_r = AMPP_FUNCTION(K1_mstr_actv_lc, N1_TS_TURN_AR, N1_TS_IDLE_NOT); --N1L243 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trdy_OR_lc[3]~57 at LC3_F14 --operation mode is normal N1L243 = AMPP_FUNCTION(N1_trdy_OR_lc[1], N1_LR_LXFR, N1L57); --N1L57 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~158 at LC2_F14 --operation mode is normal N1L57 = AMPP_FUNCTION(N1_trdy_OR_lc[2], N1_direct_xfr, N1_lt_ldata_ack_r); --N1_trdy_OR_lc[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trdy_OR_lc[4] at LC5_F19 --operation mode is normal N1_trdy_OR_lc[4] = AMPP_FUNCTION(imm_dpm_dec_reg_LT_RDY_n_pci, P5_REG, K1_mstr_actv_lc, N1_LW_IDLE_NOT); --Q1L14 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|bar0_ena[1]~21 at LC3_G20 --operation mode is normal Q1L14 = AMPP_FUNCTION(N1_cfg_dat_vld, S1_decR[4], H1_low_cben_IR_data[1]); --K1_WAIT_ndirect_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|WAIT_ndirect_lc at LC5_C11 --operation mode is normal K1_WAIT_ndirect_lc = AMPP_FUNCTION(K1_MW_DXFR_32, K1_MW_WAIT, N1_no_op_reg[1], K1_devsel_toR); --K1L2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00053~1 at LC2_A7 --operation mode is arithmetic K1L2 = AMPP_FUNCTION(A1L772, N1_no_op_reg[1]); --K1_$00053 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00053 at LC2_A7 --operation mode is arithmetic K1_$00053 = AMPP_FUNCTION(A1L772, N1_no_op_reg[1]); --K1_MW_LAST_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LAST_lc[3] at LC7_C23 --operation mode is normal K1_MW_LAST_lc[3] = AMPP_FUNCTION(K1_MW_LXFR, K1_devsel_toR, N1_no_op_reg[1]); --K1L64 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00219~0 at LC4_C17 --operation mode is normal K1L64 = AMPP_FUNCTION(N1_no_op_reg[1], A1L772); --K1_WAIT_WAIT32_lc3 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|WAIT_WAIT32_lc3 at LC1_C19 --operation mode is normal K1_WAIT_WAIT32_lc3 = AMPP_FUNCTION(K1_WAIT_WAIT32_lc2, K1_WAIT_WAIT32_lc1, K1_MW_WAIT_32_d_lc_1c); --K1_MW_WAIT_32_d_lc_1d is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_32_d_lc_1d at LC4_C19 --operation mode is normal K1_MW_WAIT_32_d_lc_1d = AMPP_FUNCTION(K1_MW_WAIT_32_d_lc_1a, K1_MW_WAIT, K1_direct_xfr, K1_devsel_toR); --N1_wait_wait32_lc[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|wait_wait32_lc[4] at LC5_F24 --operation mode is normal N1_wait_wait32_lc[4] = AMPP_FUNCTION(N1_wait_wait32_lc[3], N1_wait_wait32_lc[2], N1_cfg_cyc); --Q1L29 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|latency_cache_ena[0]~14 at LC6_G4 --operation mode is normal Q1L29 = AMPP_FUNCTION(N1_cfg_dat_vld, S1_decR[3], H1_low_cben_IR_data[0]); --Q1L39 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|latency_cache_ena[1]~11 at LC2_G20 --operation mode is normal Q1L39 = AMPP_FUNCTION(N1_cfg_dat_vld, S1_decR[3], H1_low_cben_IR_data[1]); --A1L15 is imm_dpm_dp_p_modgen_eq_44_ix26_lc~0 at LC6_J25 --operation mode is normal A1L15 = (E3_q[3] & E3_q[2] & E3_q[1] & !E3_q[0]) & CASCADE(A1L05); --S1_dec_up[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|pcimt64_cd:cfg_adr_dec|dec_up[1] at LC4_B20 --operation mode is normal S1_dec_up[1] = AMPP_FUNCTION(H1_ad_ir_address[4], H1_ad_ir_address[7], H1_ad_ir_address[6], H1_ad_ir_address[5]); --K1_MS_TAR_R is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_TAR_R at LC8_D32 --operation mode is normal K1_MS_TAR_R = AMPP_FUNCTION(K1_MS_TAR, pci_rstn, GLOBAL(pci_clk)); --Q1_par_rep_rst is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|par_rep_rst at LC4_G49 --operation mode is normal Q1_par_rep_rst = AMPP_FUNCTION(N1_cfg_dat_vld, H1_low_ad_IR_data[24], S1_decR[1], H1_low_cben_IR_data[3]); --Q1_targ_abrt_rcvd_rst is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|targ_abrt_rcvd_rst at LC6_G49 --operation mode is normal Q1_targ_abrt_rcvd_rst = AMPP_FUNCTION(N1_cfg_dat_vld, H1_low_ad_IR_data[28], S1_decR[1], H1_low_cben_IR_data[3]); --Q1_mstr_abrt_rst is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|mstr_abrt_rst at LC7_G49 --operation mode is normal Q1_mstr_abrt_rst = AMPP_FUNCTION(N1_cfg_dat_vld, H1_low_ad_IR_data[29], S1_decR[1], H1_low_cben_IR_data[3]); --Q1_serr_rst is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|serr_rst at LC7_G31 --operation mode is normal Q1_serr_rst = AMPP_FUNCTION(N1_cfg_dat_vld, H1_low_ad_IR_data[30], S1_decR[1], H1_low_cben_IR_data[3]); --Q1_perr_det_rst is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|perr_det_rst at LC3_G49 --operation mode is normal Q1_perr_det_rst = AMPP_FUNCTION(N1_cfg_dat_vld, H1_low_ad_IR_data[31], S1_decR[1], H1_low_cben_IR_data[3]); --K1_latcntr_toR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|latcntr_toR at LC7_J12 --operation mode is normal K1_latcntr_toR = AMPP_FUNCTION(K1_latcntr_toR_lc1, K1_latcntr_toR_lc2, K1_latcntr_toR, pci_rstn, GLOBAL(pci_clk), K1_$00057); --K1_MW_WAIT_32_r[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_32_r[1] at LC4_C8 --operation mode is normal K1_MW_WAIT_32_r[1] = AMPP_FUNCTION(A1L472, K1_MW_WAIT_32_lc[1], K1_MW_WAIT, K1_direct_xfr, pci_rstn, GLOBAL(pci_clk), K1L15); --K1_MW_WAIT_32_r[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_32_r[2] at LC2_C5 --operation mode is normal K1_MW_WAIT_32_r[2] = AMPP_FUNCTION(A1L472, K1_MW_WAIT_32_lc[2], K1_MW_WAIT_32_lc[3], K1_last_xfr, pci_rstn, GLOBAL(pci_clk), K1L25); --K1_MW_WAIT_32 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_32 at LC7_C6 --operation mode is normal K1_MW_WAIT_32 = AMPP_FUNCTION(K1_MW_WAIT_32_r[1], K1_MW_WAIT_32_r[2]); --K1_frame_or_lc3a is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_lc3a at LC1_C16 --operation mode is normal K1_frame_or_lc3a = AMPP_FUNCTION(K1_last_xfr_lc1, K1_latcntr_toR, K1_MW_WAIT_32, K1_MW_DXFR_32); --K1_frame_or_lc3b is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_lc3b at LC3_C16 --operation mode is normal K1_frame_or_lc3b = AMPP_FUNCTION(K1_direct_xfr, K1_MW_WAIT, K1_MW_DXFR, N1_no_op_reg[1]); --K1_MW_HOLD_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_HOLD_lc[1] at LC6_C23 --operation mode is normal K1_MW_HOLD_lc[1] = AMPP_FUNCTION(K1_MW_LXFR, K1_direct_xfr, K1_devsel_toR, N1_no_op_reg[1]); --K1_MW_HOLD_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_HOLD_lc[2] at LC8_C9 --operation mode is normal K1_MW_HOLD_lc[2] = AMPP_FUNCTION(K1_MW_HOLD, K1_devsel_toR); --K1_MW_LXFR_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LXFR_lc[1] at LC5_C1 --operation mode is normal K1_MW_LXFR_lc[1] = AMPP_FUNCTION(K1_MW_LXFR, N1_no_op_reg[1], K1_devsel_toR); --K1_MW_LXFR_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LXFR_lc[2] at LC6_C1 --operation mode is normal K1_MW_LXFR_lc[2] = AMPP_FUNCTION(K1_MW_DXFR, N1_no_op_reg[1], K1_devsel_toR); --K1_irdy_or_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|irdy_or_lc[1] at LC1_C6 --operation mode is normal K1_irdy_or_lc[1] = AMPP_FUNCTION(K1_MW_WAIT, K1_MW_WAIT_32, K1_MW_DXFR, N1_no_op_reg[1]); --K1_adr_phase_end is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|adr_phase_end at LC3_C21 --operation mode is normal K1_adr_phase_end = AMPP_FUNCTION(K1_adr_phase_end_lc1, K1_MS_ENA, pci_gntn, K1_dac_cmd, pci_rstn, GLOBAL(pci_clk)); --K1_irdy_or_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|irdy_or_lc[3] at LC7_C21 --operation mode is normal K1_irdy_or_lc[3] = AMPP_FUNCTION(K1_MW_DXFR_32, K1_adr_phase_end, K1_wr_rdn, K1_MR_IDLE_not); --M1_par[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|par[9] at LC1_B2 --operation mode is normal M1_par[9] = AMPP_FUNCTION(M1_par[4], M1_par[5], M1_par[6], M1_par[7]); --M1_par[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|par[8] at LC3_B2 --operation mode is normal M1_par[8] = AMPP_FUNCTION(M1_par[0], M1_par[1], M1_par[2], M1_par[3]); --L1_xxh[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[0] at LC2_I6 --operation mode is normal L1_xxh[0] = AMPP_FUNCTION(H1_high_ad_IR_data[0], H1_high_ad_IR_data[1], H1_high_ad_IR_data[2], H1_high_ad_IR_data[3]); --L1_xxh[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[1] at LC7_I12 --operation mode is normal L1_xxh[1] = AMPP_FUNCTION(H1_high_ad_IR_data[4], H1_high_ad_IR_data[5], H1_high_ad_IR_data[6], H1_high_ad_IR_data[7]); --H1_high_ad_IR_data[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[10] at LC7_I40 --operation mode is normal H1_high_ad_IR_data[10] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[42], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[11] at LC8_I40 --operation mode is normal H1_high_ad_IR_data[11] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[43], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --L1_xxh[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[2] at LC1_I40 --operation mode is normal L1_xxh[2] = AMPP_FUNCTION(H1_high_ad_IR_data[10], H1_high_ad_IR_data[11], H1_high_ad_IR_data[9], H1_high_ad_IR_data[8]); --H1_high_ad_IR_data[12] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[12] at LC1_I11 --operation mode is normal H1_high_ad_IR_data[12] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[44], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[13] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[13] at LC4_I11 --operation mode is normal H1_high_ad_IR_data[13] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[45], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[14] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[14] at LC5_I11 --operation mode is normal H1_high_ad_IR_data[14] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[46], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[15] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[15] at LC6_I11 --operation mode is normal H1_high_ad_IR_data[15] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[47], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --L1_xxh[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[3] at LC3_I11 --operation mode is normal L1_xxh[3] = AMPP_FUNCTION(H1_high_ad_IR_data[12], H1_high_ad_IR_data[13], H1_high_ad_IR_data[14], H1_high_ad_IR_data[15]); --H1_high_ad_IR_data[16] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[16] at LC4_I46 --operation mode is normal H1_high_ad_IR_data[16] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[48], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[17] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[17] at LC5_I46 --operation mode is normal H1_high_ad_IR_data[17] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[49], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[18] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[18] at LC6_I46 --operation mode is normal H1_high_ad_IR_data[18] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[50], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[19] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[19] at LC7_I46 --operation mode is normal H1_high_ad_IR_data[19] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[51], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --L1_xxh[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[4] at LC2_I46 --operation mode is normal L1_xxh[4] = AMPP_FUNCTION(H1_high_ad_IR_data[16], H1_high_ad_IR_data[17], H1_high_ad_IR_data[18], H1_high_ad_IR_data[19]); --H1_high_ad_IR_data[20] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[20] at LC1_I42 --operation mode is normal H1_high_ad_IR_data[20] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[52], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[21] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[21] at LC3_I42 --operation mode is normal H1_high_ad_IR_data[21] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[53], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[22] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[22] at LC4_I42 --operation mode is normal H1_high_ad_IR_data[22] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[54], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[23] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[23] at LC5_I42 --operation mode is normal H1_high_ad_IR_data[23] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[55], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --L1_xxh[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[5] at LC6_I42 --operation mode is normal L1_xxh[5] = AMPP_FUNCTION(H1_high_ad_IR_data[20], H1_high_ad_IR_data[21], H1_high_ad_IR_data[22], H1_high_ad_IR_data[23]); --H1_high_ad_IR_data[24] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[24] at LC4_I34 --operation mode is normal H1_high_ad_IR_data[24] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[56], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[25] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[25] at LC6_I34 --operation mode is normal H1_high_ad_IR_data[25] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[57], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[26] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[26] at LC7_I34 --operation mode is normal H1_high_ad_IR_data[26] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[58], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[27] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[27] at LC8_I34 --operation mode is normal H1_high_ad_IR_data[27] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[59], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --L1_xxh[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[6] at LC1_I34 --operation mode is normal L1_xxh[6] = AMPP_FUNCTION(H1_high_ad_IR_data[24], H1_high_ad_IR_data[25], H1_high_ad_IR_data[26], H1_high_ad_IR_data[27]); --H1_high_ad_IR_data[28] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[28] at LC2_I52 --operation mode is normal H1_high_ad_IR_data[28] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[60], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[29] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[29] at LC3_I52 --operation mode is normal H1_high_ad_IR_data[29] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[61], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[30] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[30] at LC4_I52 --operation mode is normal H1_high_ad_IR_data[30] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[62], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --H1_high_ad_IR_data[31] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_IR_data[31] at LC5_I52 --operation mode is normal H1_high_ad_IR_data[31] = AMPP_FUNCTION(H1_ad_IR_ce_data, K1_ad_oer, H1_high_ad_or[63], N1_adoe, pci_rstn, GLOBAL(pci_clk)); --L1_xxh[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[7] at LC8_I52 --operation mode is normal L1_xxh[7] = AMPP_FUNCTION(H1_high_ad_IR_data[28], H1_high_ad_IR_data[29], H1_high_ad_IR_data[30], H1_high_ad_IR_data[31]); --N1_cfg_adr_dec_ena_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|cfg_adr_dec_ena_lc1 at LC5_B26 --operation mode is normal N1_cfg_adr_dec_ena_lc1 = AMPP_FUNCTION(N1_idsel_IR, H1_ad_ir_address[0], H1_ad_ir_address[1], N1_TS_IDLE_NOT); --N1_cfg_adr_dec_ena_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|cfg_adr_dec_ena_lc2 at LC2_G17 --operation mode is normal N1_cfg_adr_dec_ena_lc2 = AMPP_FUNCTION(H1_cben_ir_address[3], H1_cben_ir_address[1], H1_cben_ir_address[2]); --N1L203 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|stop_or_cc1~0 at LC2_F39 --operation mode is normal N1L203 = AMPP_FUNCTION(N1_LR_LXFR, N1_no_op_reg[1]); --N1L67 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|altr_temp~163 at LC5_F32 --operation mode is normal N1L67 = AMPP_FUNCTION(N1_TS_ADR_CLMD, N1_cfg_cyc); --K1_dati_hr_ena_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|dati_hr_ena_lc at LC5_C6 --operation mode is normal K1_dati_hr_ena_lc = AMPP_FUNCTION(K1_MS_DXFR, K1_MW_WAIT_32_r[1], K1_MW_WAIT_32_r[2], K1_MW_WAIT); --N1_dati_hr_ena_lc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|dati_hr_ena_lc at LC6_C6 --operation mode is normal N1_dati_hr_ena_lc = AMPP_FUNCTION(N1_LR_PXFR, N1_LR_LXFR, N1_LR_DONE, N1L74); --K1_DXFR_write_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|DXFR_write_lc1 at LC4_A6 --operation mode is normal K1_DXFR_write_lc1 = AMPP_FUNCTION(K1_MS_DXFR, K1_irdy_or_not, K1_mstr_abrt, K1_frame_or_not); --K1L942 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack_lc[3]~92 at LC2_A8 --operation mode is normal K1L942 = AMPP_FUNCTION(K1_$00112, K1_MR_IDLE_not, K1_lm_hdata_ack, K1L42); --K1L42 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00130~0 at LC1_A8 --operation mode is normal K1L42 = AMPP_FUNCTION(K1_MR_LLXFR_r2, K1_MR_LLXFR_r1, K1_MR_END); --K1L052 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack_lc[4]~93 at LC8_A10 --operation mode is normal K1L052 = AMPP_FUNCTION(K1_direct_xfr, K1_$00112, K1_lm_hdata_ack, K1L552); --K1_trdy_det is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|trdy_det at LC6_A17 --operation mode is normal K1_trdy_det = AMPP_FUNCTION(K1_trdy_det, N1_no_op_reg[1], K1_trdy_det_reset, pci_rstn, GLOBAL(pci_clk), K1_$00073); --K1_retry_det_set2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|retry_det_set2 at LC4_A11 --operation mode is normal K1_retry_det_set2 = AMPP_FUNCTION(K1_retry_det_set1, K1_MS_TAR, K1_MS_DXFR, K1_trdy_det); --K1_trdyR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|trdyR at LC3_A7 --operation mode is normal K1_trdyR = AMPP_FUNCTION(N1_no_op_reg[1], pci_rstn, GLOBAL(pci_clk), K1_$00053); --K1_disc1_det is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|disc1_det at LC5_A11 --operation mode is normal K1_disc1_det = AMPP_FUNCTION(K1_disc1_det_set, K1_MS_REQ, K1_MS_ENA, K1_disc1_det, pci_rstn, GLOBAL(pci_clk)); --K1_disc0_det_set is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|disc0_det_set at LC6_A11 --operation mode is normal K1_disc0_det_set = AMPP_FUNCTION(K1_retry_det_set1, K1_trdy_det, K1_trdyR, K1_disc1_det); --K1_MR_END_d_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_END_d_lc2 at LC4_A1 --operation mode is normal K1_MR_END_d_lc2 = AMPP_FUNCTION(K1_MR_PXFR, K1_MR_LPXFR); --K1_MR_LWAIT_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LWAIT_lc1 at LC1_A5 --operation mode is normal K1_MR_LWAIT_lc1 = AMPP_FUNCTION(K1_MR_PXFR, K1_devsel_toR); --K1L23 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00171~0 at LC6_C4 --operation mode is normal K1L23 = AMPP_FUNCTION(N1_no_op_reg[1], A1L772); --K1L33 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00176~0 at LC3_C4 --operation mode is normal K1L33 = AMPP_FUNCTION(N1_no_op_reg[1], K1L04); --K1_lm_ack_or_lc[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_lc[10] at LC6_C14 --operation mode is normal K1_lm_ack_or_lc[10] = AMPP_FUNCTION(K1_lm_ack_or_lc[7], K1L712); --K1_lm_ack_or_lc[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_lc[4] at LC5_C4 --operation mode is normal K1_lm_ack_or_lc[4] = AMPP_FUNCTION(K1_MW_HOLD, K1_MW_LXFR, K1_last_xfr, K1_devsel_toR); --K1_lm_ack_or_lc[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_lc[8] at LC4_A15 --operation mode is normal K1_lm_ack_or_lc[8] = AMPP_FUNCTION(K1_MR_LWAIT, K1_MR_LLWAIT_r1_lc2, K1_dac_cyc_strobe, K1_wr_rdn); --K1_lm_ack_or_lc[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_lc[9] at LC5_A13 --operation mode is normal K1_lm_ack_or_lc[9] = AMPP_FUNCTION(K1_wr_rdn, K1_MW_IDLE_not); --N1_LR_WAIT_32_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_WAIT_32_lc1 at LC5_F22 --operation mode is normal N1_LR_WAIT_32_lc1 = AMPP_FUNCTION(N1_LR_PXFR, N1_lt_rdynR, N1_direct_xfr, N1_TS_DISC); --N1_trdy_OR_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trdy_OR_lc[2] at LC7_F14 --operation mode is normal N1_trdy_OR_lc[2] = AMPP_FUNCTION(N1_LR_LXFR, N1_lt_rdynR, N1_TS_DISC); --N1_LR_LXFR_lc[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_LXFR_lc[4] at LC8_F16 --operation mode is normal N1_LR_LXFR_lc[4] = AMPP_FUNCTION(N1_LR_PXFR, N1_lt_rdynR, N1_TS_DISC); --A1L74 is imm_dpm_dp_n_modgen_eq_44_ix26_lc~0 at LC5_K19 --operation mode is normal A1L74 = (E2_q[3] & E2_q[2] & E2_q[1] & !E2_q[0]) & CASCADE(A1L64); --A1L47 is ix1180_lc~0 at LC4_F26 --operation mode is normal A1L47 = (!N1L112 & H1_cben_ir_address[1] & ix1199_lc & ix1206_lc) & CASCADE(A1L831); --K1L84 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00225~0 at LC7_C7 --operation mode is normal K1L84 = AMPP_FUNCTION(N1_no_op_reg[1], K1L2); --K1L94 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00228~0 at LC2_C7 --operation mode is normal K1L94 = AMPP_FUNCTION(N1_no_op_reg[1], N1_ack64_OR_not, N1_targ_oeR_reg, A1L352); --K1L05 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00229~0 at LC5_C7 --operation mode is normal K1L05 = AMPP_FUNCTION(N1_no_op_reg[1], A1L772); --K1_WAIT_WAIT32_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|WAIT_WAIT32_lc1 at LC5_C19 --operation mode is normal K1_WAIT_WAIT32_lc1 = AMPP_FUNCTION(K1_MW_DXFR, K1_direct_xfr, K1_devsel_toR, N1_no_op_reg[1]); --K1_MW_WAIT_32_d_lc_1c is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_32_d_lc_1c at LC6_C19 --operation mode is normal K1_MW_WAIT_32_d_lc_1c = AMPP_FUNCTION(K1_MW_WAIT_32_d_lc_1b, K1_MW_WAIT_32_r[1], K1_MW_WAIT_32_r[2]); --K1_MW_WAIT_32_d_lc_1a is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_32_d_lc_1a at LC7_C19 --operation mode is normal K1_MW_WAIT_32_d_lc_1a = AMPP_FUNCTION(K1_MW_DXFR_32, K1_last_xfr_lc1, N1_no_op_reg[1]); --N1_wait_wait32_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|wait_wait32_lc[3] at LC7_F24 --operation mode is normal N1_wait_wait32_lc[3] = AMPP_FUNCTION(N1_LR_WAIT_32, N1_wait_wait32_lc[1], N1_direct_xfr); --N1_wait_wait32_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|wait_wait32_lc[2] at LC8_F24 --operation mode is normal N1_wait_wait32_lc[2] = AMPP_FUNCTION(N1_LR_WAIT, N1_wait_wait32_lc[1], N1_direct_xfr); --imm_dpm_dp_p_modgen_eq_44_ix18 is imm_dpm_dp_p_modgen_eq_44_ix18 at LC4_J25 --operation mode is normal imm_dpm_dp_p_modgen_eq_44_ix18 = E3_q[11] & E3_q[10] & E3_q[9] & E3_q[8]; --A1L05 is imm_dpm_dp_p_modgen_eq_44_ix22~0 at LC5_J25 --operation mode is normal A1L05 = (E3_q[7] & E3_q[6] & E3_q[5] & E3_q[4]) & CASCADE(imm_dpm_dp_p_modgen_eq_44_ix18); --L1_$00005 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|$00005 at LC8_G23 --operation mode is normal L1_$00005 = AMPP_FUNCTION(N1_perr_vldR, K1_perr_vldR, K1_tgt_64_response_reg, P3_REG); --K1_MR_LPXFR_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LPXFR_lc2 at LC6_A19 --operation mode is normal K1_MR_LPXFR_lc2 = AMPP_FUNCTION(K1_MR_LPXFR, K1_devsel_toR); --K1L011 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~1395 at LC5_C13 --operation mode is normal K1L011 = AMPP_FUNCTION(K1_wr_rdn, K1_MR_IDLE_not); --K1_MR_PXFR_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_PXFR_lc1 at LC6_C13 --operation mode is normal K1_MR_PXFR_lc1 = AMPP_FUNCTION(K1L011, K1_MS_ADR2, K1_MS_ADR, K1_dac_cyc_reg); --K1L24 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00208~0 at LC2_C23 --operation mode is normal K1L24 = AMPP_FUNCTION(K1_MW_LXFR, K1_devsel_toR); --K1L14 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00207~0 at LC1_C24 --operation mode is normal K1L14 = AMPP_FUNCTION(N1_no_op_reg[1], K1L04); --K1L34 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00209~0 at LC7_C24 --operation mode is normal K1L34 = AMPP_FUNCTION(N1_no_op_reg[1], A1L772, K1_devsel_toR); --M1_par[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|par[4] at LC1_B29 --operation mode is normal M1_par[4] = AMPP_FUNCTION(H1_low_ad_or[19], H1_low_ad_or[18], H1_low_ad_or[17], H1_low_ad_or[16]); --M1_par[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|par[5] at LC4_B2 --operation mode is normal M1_par[5] = AMPP_FUNCTION(H1_low_ad_or[23], H1_low_ad_or[22], H1_low_ad_or[21], H1_low_ad_or[20]); --M1_par[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|par[6] at LC1_B52 --operation mode is normal M1_par[6] = AMPP_FUNCTION(H1_low_ad_or[27], H1_low_ad_or[26], H1_low_ad_or[25], H1_low_ad_or[24]); --M1_par[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|par[7] at LC1_B27 --operation mode is normal M1_par[7] = AMPP_FUNCTION(H1_low_ad_or[31], H1_low_ad_or[30], H1_low_ad_or[29], H1_low_ad_or[28]); --M1_par[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|par[0] at LC1_B19 --operation mode is normal M1_par[0] = AMPP_FUNCTION(H1_low_ad_or[3], H1_low_ad_or[2], H1_low_ad_or[1], H1_low_ad_or[0]); --M1_par[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|par[1] at LC8_B2 --operation mode is normal M1_par[1] = AMPP_FUNCTION(H1_low_ad_or[7], H1_low_ad_or[6], H1_low_ad_or[5], H1_low_ad_or[4]); --M1_par[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|par[2] at LC1_B6 --operation mode is normal M1_par[2] = AMPP_FUNCTION(H1_low_ad_or[11], H1_low_ad_or[10], H1_low_ad_or[9], H1_low_ad_or[8]); --M1_par[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen|par[3] at LC2_B1 --operation mode is normal M1_par[3] = AMPP_FUNCTION(H1_low_ad_or[15], H1_low_ad_or[14], H1_low_ad_or[13], H1_low_ad_or[12]); --K1_stopR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|stopR at LC2_A5 --operation mode is normal K1_stopR = AMPP_FUNCTION(A1L472, pci_rstn, GLOBAL(pci_clk)); --K1_retry_det_set1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|retry_det_set1 at LC4_A5 --operation mode is normal K1_retry_det_set1 = AMPP_FUNCTION(K1_stopR, K1_tabrt_set, N1_TS_IDLE_NOT); --K1_devselR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|devselR at LC3_C26 --operation mode is normal K1_devselR = AMPP_FUNCTION(A1L352, pci_rstn, GLOBAL(pci_clk)); --K1_$00058 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00058 at LC2_C26 --operation mode is normal K1_$00058 = AMPP_FUNCTION(K1_MS_DXFR, K1_devselR); --K1_lm_ack_or_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_lc[2] at LC3_C6 --operation mode is normal K1_lm_ack_or_lc[2] = AMPP_FUNCTION(K1_lm_ack_or_lc[1], K1_direct_xfr, K1_MW_WAIT); --K1_lm_ack_or_lc[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_lc[7] at LC5_C14 --operation mode is normal K1_lm_ack_or_lc[7] = AMPP_FUNCTION(K1_lm_ack_or_lc[6], N1_no_op_reg[1], K1_devsel_toR); --K1L44 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00214~0 at LC5_C5 --operation mode is normal K1L44 = AMPP_FUNCTION(N1_no_op_reg[1], A1L772); --N1L651 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_32_lc[1]~26 at LC7_F2 --operation mode is normal N1L651 = AMPP_FUNCTION(N1_LR_LXFR_lc[2], N1_LR_LXFR, N1_LR_LXFR_lc[1], N1_TS_DISC, N1L451); --N1L451 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_32_cc1~0 at LC6_F2 --operation mode is normal N1L451 = AMPP_FUNCTION(N1_direct_xfr, N1_lt_rdynR, N1_LR_LXFR_lc[1]); --imm_dpm_dp_n_modgen_eq_44_ix18 is imm_dpm_dp_n_modgen_eq_44_ix18 at LC3_K19 --operation mode is normal imm_dpm_dp_n_modgen_eq_44_ix18 = E2_q[11] & E2_q[10] & E2_q[9] & E2_q[8]; --A1L64 is imm_dpm_dp_n_modgen_eq_44_ix22~0 at LC4_K19 --operation mode is normal A1L64 = (E2_q[7] & E2_q[6] & E2_q[5] & E2_q[4]) & CASCADE(imm_dpm_dp_n_modgen_eq_44_ix18); --K1_MW_DXFR_32_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_32_lc[1] at LC1_C7 --operation mode is normal K1_MW_DXFR_32_lc[1] = AMPP_FUNCTION(K1_MW_DXFR, K1_direct_xfr, N1_no_op_reg[1]); --K1_MW_WAIT_32_d_lc_1b is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_32_d_lc_1b at LC8_C19 --operation mode is normal K1_MW_WAIT_32_d_lc_1b = AMPP_FUNCTION(K1_MW_DXFR, K1_direct_xfr, K1_devsel_toR, N1_no_op_reg[1]); --K1_latcntr_toR_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|latcntr_toR_lc1 at LC4_J12 --operation mode is normal K1_latcntr_toR_lc1 = AMPP_FUNCTION(K1_MS_REQ, K1_MS_ENA); --K1_latcntr_toR_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|latcntr_toR_lc2 at LC5_J12 --operation mode is normal K1_latcntr_toR_lc2 = AMPP_FUNCTION(K1_MS_TAR, K1_MS_REQ, K1_MS_ENA, K1_MS_IDLE_not); --K1L25 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00235~0 at LC1_C5 --operation mode is normal K1L25 = AMPP_FUNCTION(A1L772, K1_devsel_toR); --K1L592 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LPXFR_lc1~16 at LC8_A19 --operation mode is normal K1L592 = AMPP_FUNCTION(K1_last_xfr, K1_MR_IDLE_not, K1L082); --K1L55 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00241~0 at LC1_C13 --operation mode is normal K1L55 = AMPP_FUNCTION(N1_no_op_reg[1], A1L772); --K1L263 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_r2_d~32 at LC5_C23 --operation mode is normal K1L263 = AMPP_FUNCTION(K1_last_xfr, N1_no_op_reg[1], K1L363); --K1_MW_DXFR_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_lc[1] at LC5_C24 --operation mode is normal K1_MW_DXFR_lc[1] = AMPP_FUNCTION(K1_MW_DXFR_32, N1_no_op_reg[1], K1_last_xfr_lc1); --K1L441 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|disc1_det_set~22 at LC6_A5 --operation mode is normal K1L441 = AMPP_FUNCTION(K1_stopR, N1_TS_IDLE_NOT); --K1_disc1_det_set is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|disc1_det_set at LC7_A11 --operation mode is normal K1_disc1_det_set = AMPP_FUNCTION(K1_trdyR, K1L441, K1_MS_TAR, K1_MS_DXFR); --K1_lm_ack_or_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_lc[1] at LC8_C6 --operation mode is normal K1_lm_ack_or_lc[1] = AMPP_FUNCTION(K1_MW_WAIT_32_r[1], K1_MW_WAIT_32_r[2], K1_MW_DXFR, K1_devsel_toR); --K1L412 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_lc[3]~114 at LC8_A1 --operation mode is normal K1L412 = AMPP_FUNCTION(K1_MW_LXFR, N1_no_op_reg[1], K1L39); --K1L39 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~457 at LC7_A1 --operation mode is normal K1L39 = AMPP_FUNCTION(K1_MR_PXFR, K1_MR_LPXFR, K1_devsel_toR); --K1_lm_ack_or_lc[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_lc[6] at LC8_C14 --operation mode is normal K1_lm_ack_or_lc[6] = AMPP_FUNCTION(K1_MW_DXFR, K1_MW_LXFR, K1_MW_DXFR_32, K1_last_xfr_lc1); --K1L712 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ack_or_lc[5]~115 at LC2_C14 --operation mode is normal K1L712 = AMPP_FUNCTION(K1_direct_xfr, K1_last_xfr, K1_devsel_toR, K1L43); --K1L43 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00179~0 at LC1_C14 --operation mode is normal K1L43 = AMPP_FUNCTION(K1_MW_LXFR, K1_MW_HOLD, N1_no_op_reg[1]); --K1_MW_WAIT_32_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_32_lc[2] at LC3_C5 --operation mode is normal K1_MW_WAIT_32_lc[2] = AMPP_FUNCTION(K1_MW_WAIT_32, K1_MW_DXFR, K1_direct_xfr, N1_no_op_reg[1]); --K1_MW_WAIT_32_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_32_lc[3] at LC7_C5 --operation mode is normal K1_MW_WAIT_32_lc[3] = AMPP_FUNCTION(K1_MW_DXFR, K1_direct_xfr); --M2_par[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|par[9] at LC1_I45 --operation mode is normal M2_par[9] = AMPP_FUNCTION(M2_par[4], M2_par[5], M2_par[6], M2_par[7]); --M2_par[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|par[8] at LC2_I11 --operation mode is normal M2_par[8] = AMPP_FUNCTION(M2_par[0], M2_par[1], M2_par[2], M2_par[3]); --K1L034 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_lc[1]~20 at LC4_C24 --operation mode is normal K1L034 = AMPP_FUNCTION(K1_direct_xfr, K1_last_xfr, N1_no_op_reg[1], K1_devsel_toR, K1L763); --M2_par[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|par[4] at LC8_I46 --operation mode is normal M2_par[4] = AMPP_FUNCTION(H1_high_ad_or[51], H1_high_ad_or[50], H1_high_ad_or[49], H1_high_ad_or[48]); --M2_par[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|par[5] at LC2_I42 --operation mode is normal M2_par[5] = AMPP_FUNCTION(H1_high_ad_or[55], H1_high_ad_or[54], H1_high_ad_or[53], H1_high_ad_or[52]); --M2_par[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|par[6] at LC3_I34 --operation mode is normal M2_par[6] = AMPP_FUNCTION(H1_high_ad_or[59], H1_high_ad_or[58], H1_high_ad_or[57], H1_high_ad_or[56]); --M2_par[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|par[7] at LC6_I52 --operation mode is normal M2_par[7] = AMPP_FUNCTION(H1_high_ad_or[63], H1_high_ad_or[62], H1_high_ad_or[61], H1_high_ad_or[60]); --M2_par[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|par[0] at LC7_I11 --operation mode is normal M2_par[0] = AMPP_FUNCTION(H1_high_ad_or[32], H1_high_ad_or[33], H1_high_ad_or[34], H1_high_ad_or[35]); --M2_par[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|par[1] at LC5_I14 --operation mode is normal M2_par[1] = AMPP_FUNCTION(H1_high_ad_or[36], H1_high_ad_or[37], H1_high_ad_or[38], H1_high_ad_or[39]); --M2_par[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|par[2] at LC2_I40 --operation mode is normal M2_par[2] = AMPP_FUNCTION(H1_high_ad_or[43], H1_high_ad_or[42], H1_high_ad_or[41], H1_high_ad_or[40]); --M2_par[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pg:parity_gen64|par[3] at LC8_I11 --operation mode is normal M2_par[3] = AMPP_FUNCTION(H1_high_ad_or[47], H1_high_ad_or[46], H1_high_ad_or[45], H1_high_ad_or[44]); --K1_trdy_det_set is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|trdy_det_set at LC1_A17 --operation mode is normal K1_trdy_det_set = AMPP_FUNCTION(K1_MS_DXFR, N1_TS_IDLE_NOT); --K1L211 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~1435 at LC2_J12 --operation mode is normal K1L211 = AMPP_FUNCTION(E5_q[4], E5_q[5], E5_q[6], E5_q[7]); --K1L402 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|latcntr_tc~1 at LC3_J12 --operation mode is normal K1L402 = AMPP_FUNCTION(E5_q[0], E5_q[1], E5_q[2], E5_q[3], K1L211); --K1_latcntr_cnt_en is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|latcntr_cnt_en at LC1_J12 --operation mode is normal K1_latcntr_cnt_en = AMPP_FUNCTION(K1_MS_DXFR, K1L402); --K1_$00054 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00054 at LC2_A21 --operation mode is normal K1_$00054 = AMPP_FUNCTION(K1_MS_TAR, K1_MS_REQ, K1_MS_IDLE_not); --ix1207_lc is ix1207_lc at LC4_F23 --operation mode is normal ix1207_lc = H1_cben_ir_address[3] & !H1_cben_ir_address[2] # !N1_TS_IDLE_NOT # !Q1_bar_hitR[0]; --ix1166_lc is ix1166_lc at LC4_I20 --operation mode is normal ix1166_lc = N1_no_op_reg[1] & H1_ad_ir_address[13] & F2_q[4]; --ix1165_lc is ix1165_lc at LC8_I22 --operation mode is normal ix1165_lc = N1_no_op_reg[1] & H1_ad_ir_address[13] & !F2_q[5]; --ix1164_lc is ix1164_lc at LC2_I22 --operation mode is normal ix1164_lc = N1_no_op_reg[1] & H1_ad_ir_address[13] & F2_q[6]; --ix1163_lc is ix1163_lc at LC1_H16 --operation mode is normal ix1163_lc = N1_no_op_reg[1] & H1_ad_ir_address[13] & !F2_q[7]; --K1L311 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~1474 at LC7_A3 --operation mode is normal K1L311 = AMPP_FUNCTION(A1L472, K1_frame_or_lc2, K1L851, K1_$00152); --A1L841 is ix1227~1 at LC5_I44 --operation mode is normal A1L841 = F1_q[0] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]; --A1L741 is ix1226~1 at LC2_I32 --operation mode is normal A1L741 = !F1_q[1] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]; --A1L641 is ix1225~1 at LC3_J17 --operation mode is normal A1L641 = F1_q[2] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]; --A1L541 is ix1224~1 at LC5_I37 --operation mode is normal A1L541 = !F1_q[3] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]; --A1L441 is ix1223~1 at LC7_I1 --operation mode is normal A1L441 = F1_q[4] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]; --A1L341 is ix1222~1 at LC6_I18 --operation mode is normal A1L341 = !F1_q[5] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]; --A1L241 is ix1221~1 at LC1_I26 --operation mode is normal A1L241 = F1_q[6] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]; --A1L141 is ix1220~1 at LC5_J17 --operation mode is normal A1L141 = !F1_q[7] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]; --A1L041 is ix1219~1 at LC5_L21 --operation mode is normal A1L041 = F2_q[0] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]; --A1L931 is ix1218~1 at LC1_L21 --operation mode is normal A1L931 = !F2_q[1] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]; --A1L26 is ix1168_lc~0 at LC6_J16 --operation mode is normal A1L26 = (!F2_q[2] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]) & CASCADE(ix1182); --A1L16 is ix1167_lc~0 at LC3_J16 --operation mode is normal A1L16 = (F2_q[3] # !H1_ad_ir_address[13] # !N1_no_op_reg[1]) & CASCADE(ix1181); --ix1205_lc is ix1205_lc at LC4_L21 --operation mode is normal ix1205_lc = H1_ad_ir_address[5] & (N1_no_op_reg[1] & E3_q[8] # !N1_no_op_reg[1] & imm_dpm_dec_reg_rdata_LED_8) # !H1_ad_ir_address[5] & imm_dpm_dec_reg_rdata_LED_8; --ix1204_lc is ix1204_lc at LC7_L21 --operation mode is normal ix1204_lc = H1_ad_ir_address[5] & (N1_no_op_reg[1] & E3_q[9] # !N1_no_op_reg[1] & imm_dpm_dec_reg_rdata_LED_9) # !H1_ad_ir_address[5] & imm_dpm_dec_reg_rdata_LED_9; --K1L411 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|altr_temp~1476 at LC7_F17 --operation mode is normal K1L411 = AMPP_FUNCTION(A1L772, K1_frame_or_lc3, K1_req64_or_lc[1], K1_$00158); --ix1199_lc is ix1199_lc at LC8_F26 --operation mode is normal ix1199_lc = Q1_bar_hitR[0] & N1_TS_IDLE_NOT & H1_cben_ir_address[0] & N1L802; --A1L46 is ix1170_lc~0 at LC6_L21 --operation mode is normal A1L46 = (N1_no_op_reg[1] & (H1_ad_ir_address[13] # H1_ad_ir_address[4] & ix1205_lc)) & CASCADE(A1L041); --A1L36 is ix1169_lc~0 at LC2_L21 --operation mode is normal A1L36 = (N1_no_op_reg[1] & (H1_ad_ir_address[13] # H1_ad_ir_address[4] & ix1204_lc)) & CASCADE(A1L931); --ix1215_lc is ix1215_lc at LC3_L21 --operation mode is normal ix1215_lc = H1_ad_ir_address[4] & N1_no_op_reg[1] & !H1_ad_ir_address[5]; --A1L831 is ix1217~5 at LC3_F26 --operation mode is normal A1L831 = H1_ad_ir_address[5] & N1_no_op_reg[1] & !H1_ad_ir_address[13]; --K1_MS_REQ_d_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_REQ_d_lc[2] at LC8_D22 --operation mode is normal K1_MS_REQ_d_lc[2] = AMPP_FUNCTION(K1_MS_ENA, K1_l_req_vld, K1_MS_PARK); --N1_retry_rst_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|retry_rst_lc1 at LC6_F29 --operation mode is normal N1_retry_rst_lc1 = AMPP_FUNCTION(N1_LW_DONE, N1_LW_IDLE_NOT); --K1_trdy_det_reset is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|trdy_det_reset at LC4_A17 --operation mode is normal K1_trdy_det_reset = AMPP_FUNCTION(K1_MR_IDLE_not, K1_MW_IDLE_not); --H1_trg_cben_IR_ce_A is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cben_IR_ce_A at LC7_F9 --operation mode is normal H1_trg_cben_IR_ce_A = AMPP_FUNCTION(N1_ad_ir_ce_A_lc2, N1_ad_ir_ce_A_lc1); --N1_rd_backoff is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|rd_backoff at LC6_F14 --operation mode is normal N1_rd_backoff = AMPP_FUNCTION(N1_TS_DISC); --Q1_mbar_hit is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|mbar_hit at LC1_G30 --operation mode is normal Q1_mbar_hit = AMPP_FUNCTION(Q1_bar_hit[0]); --J1_ad_ce[17] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[17] at LC5_G33 --operation mode is normal J1_ad_ce[17] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[18] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[18] at LC7_G35 --operation mode is normal J1_ad_ce[18] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[19] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[19] at LC6_G36 --operation mode is normal J1_ad_ce[19] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[20] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[20] at LC6_L36 --operation mode is normal J1_ad_ce[20] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[21] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[21] at LC4_G40 --operation mode is normal J1_ad_ce[21] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[22] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[22] at LC2_I39 --operation mode is normal J1_ad_ce[22] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[23] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[23] at LC5_G42 --operation mode is normal J1_ad_ce[23] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[24] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[24] at LC7_G43 --operation mode is normal J1_ad_ce[24] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[25] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[25] at LC4_G46 --operation mode is normal J1_ad_ce[25] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[26] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[26] at LC3_G48 --operation mode is normal J1_ad_ce[26] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[27] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[27] at LC4_G52 --operation mode is normal J1_ad_ce[27] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[28] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[28] at LC7_G51 --operation mode is normal J1_ad_ce[28] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[29] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[29] at LC6_G50 --operation mode is normal J1_ad_ce[29] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[30] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[30] at LC1_I14 --operation mode is normal J1_ad_ce[30] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[31] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[31] at LC7_G39 --operation mode is normal J1_ad_ce[31] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[40] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[40] at LC7_L13 --operation mode is normal J1_ad_ce[40] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[41] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[41] at LC7_I2 --operation mode is normal J1_ad_ce[41] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[0] at LC5_I4 --operation mode is normal J1_ad_ce[0] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[1] at LC7_I3 --operation mode is normal J1_ad_ce[1] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[2] at LC7_J5 --operation mode is normal J1_ad_ce[2] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[3] at LC1_I27 --operation mode is normal J1_ad_ce[3] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[4] at LC5_I7 --operation mode is normal J1_ad_ce[4] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[5] at LC7_I8 --operation mode is normal J1_ad_ce[5] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[6] at LC4_I10 --operation mode is normal J1_ad_ce[6] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[7] at LC7_J14 --operation mode is normal J1_ad_ce[7] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[8] at LC8_L13 --operation mode is normal J1_ad_ce[8] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[9] at LC2_I31 --operation mode is normal J1_ad_ce[9] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[10] at LC1_I30 --operation mode is normal J1_ad_ce[10] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[11] at LC7_I17 --operation mode is normal J1_ad_ce[11] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[12] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[12] at LC3_I31 --operation mode is normal J1_ad_ce[12] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[13] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[13] at LC4_I31 --operation mode is normal J1_ad_ce[13] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[14] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[14] at LC2_I33 --operation mode is normal J1_ad_ce[14] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[15] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[15] at LC7_I24 --operation mode is normal J1_ad_ce[15] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[48] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[48] at LC3_I33 --operation mode is normal J1_ad_ce[48] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[49] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[49] at LC5_I33 --operation mode is normal J1_ad_ce[49] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[50] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[50] at LC3_I14 --operation mode is normal J1_ad_ce[50] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[51] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[51] at LC2_L41 --operation mode is normal J1_ad_ce[51] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[52] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[52] at LC3_L41 --operation mode is normal J1_ad_ce[52] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[53] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[53] at LC2_I43 --operation mode is normal J1_ad_ce[53] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[54] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[54] at LC5_I31 --operation mode is normal J1_ad_ce[54] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[55] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[55] at LC3_I43 --operation mode is normal J1_ad_ce[55] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[56] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[56] at LC4_I30 --operation mode is normal J1_ad_ce[56] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[57] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[57] at LC5_I30 --operation mode is normal J1_ad_ce[57] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[58] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[58] at LC1_L30 --operation mode is normal J1_ad_ce[58] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[59] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[59] at LC4_I27 --operation mode is normal J1_ad_ce[59] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[60] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[60] at LC5_I27 --operation mode is normal J1_ad_ce[60] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[61] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[61] at LC2_I28 --operation mode is normal J1_ad_ce[61] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[62] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[62] at LC3_I28 --operation mode is normal J1_ad_ce[62] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[63] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[63] at LC2_I51 --operation mode is normal J1_ad_ce[63] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[39] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[39] at LC7_L9 --operation mode is normal J1_ad_ce[39] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[38] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[38] at LC4_I14 --operation mode is normal J1_ad_ce[38] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[37] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[37] at LC3_I2 --operation mode is normal J1_ad_ce[37] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[36] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[36] at LC8_I33 --operation mode is normal J1_ad_ce[36] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[35] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[35] at LC8_I31 --operation mode is normal J1_ad_ce[35] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[34] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[34] at LC1_J23 --operation mode is normal J1_ad_ce[34] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[33] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[33] at LC6_I31 --operation mode is normal J1_ad_ce[33] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[32] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[32] at LC8_I28 --operation mode is normal J1_ad_ce[32] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[42] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[42] at LC5_I16 --operation mode is normal J1_ad_ce[42] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[43] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[43] at LC5_I2 --operation mode is normal J1_ad_ce[43] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[44] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[44] at LC2_I27 --operation mode is normal J1_ad_ce[44] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[45] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[45] at LC7_I21 --operation mode is normal J1_ad_ce[45] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[46] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[46] at LC6_I23 --operation mode is normal J1_ad_ce[46] = H1_ad_ce_nc # !A1L772 & !A1L262; --J1_ad_ce[47] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_adce:adce|ad_ce[47] at LC7_I31 --operation mode is normal J1_ad_ce[47] = H1_ad_ce_nc # !A1L772 & !A1L262; --H1_low_mstr_cbe_out_lc1[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_mstr_cbe_out_lc1[0] at LC4_A25 --operation mode is normal H1_low_mstr_cbe_out_lc1[0] = AMPP_FUNCTION(); --H1_low_mstr_cbe_out_lc1[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_mstr_cbe_out_lc1[1] at LC1_L4 --operation mode is normal H1_low_mstr_cbe_out_lc1[1] = AMPP_FUNCTION(); --H1_low_mstr_cbe_out_lc1[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_mstr_cbe_out_lc1[2] at LC2_K15 --operation mode is normal H1_low_mstr_cbe_out_lc1[2] = AMPP_FUNCTION(); --H1_low_mstr_cbe_out_lc1[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_mstr_cbe_out_lc1[3] at LC3_K15 --operation mode is normal H1_low_mstr_cbe_out_lc1[3] = AMPP_FUNCTION(); --K1_l_req_vld is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|l_req_vld at LC1_D20 --operation mode is normal K1_l_req_vld = AMPP_FUNCTION(); --H1_trg_serr_vld is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_serr_vld at LC8_G13 --operation mode is normal H1_trg_serr_vld = AMPP_FUNCTION(N1_adr_phase_lc1); --H1_trg_cben_IR_ce_D is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cben_IR_ce_D at LC7_A4 --operation mode is normal H1_trg_cben_IR_ce_D = AMPP_FUNCTION(N1_ad_ir_ce_D_lc1, N1_cfg_cyc, N1_TS_TURN_AR, K1_mstr_actv_lc); --N1_lt_hdata_ack_r_prn[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_hdata_ack_r_prn[3] at LC6_F11 --operation mode is normal N1_lt_hdata_ack_r_prn[3] = AMPP_FUNCTION(N1_lt_ldata_ack_r_prn1, N1_mem_cyc, N1_retry, N1L69); --K1_lm_ldata_ack_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ldata_ack_lc[3] at LC2_A50 --operation mode is normal K1_lm_ldata_ack_lc[3] = AMPP_FUNCTION(); --H1_trg_cfg_cyc_out is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_cyc_out at LC4_K20 --operation mode is normal H1_trg_cfg_cyc_out = AMPP_FUNCTION(N1_cfg_cyc); --K1_cbe_oer_r1_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|cbe_oer_r1_lc1 at LC4_D4 --operation mode is normal K1_cbe_oer_r1_lc1 = AMPP_FUNCTION(K1_idle_reg, K1_MS_REQ, K1_MS_IDLE_not); --H1_trg_cfg_ad_out[16] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[16] at LC8_G34 --operation mode is normal H1_trg_cfg_ad_out[16] = AMPP_FUNCTION(Q1L51Q); --H1_trg_cfg_ad_out[17] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[17] at LC7_G33 --operation mode is normal H1_trg_cfg_ad_out[17] = AMPP_FUNCTION(Q1L61Q); --H1_trg_cfg_ad_out[18] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[18] at LC8_G35 --operation mode is normal H1_trg_cfg_ad_out[18] = AMPP_FUNCTION(Q1L71Q); --H1_trg_cfg_ad_out[19] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[19] at LC7_G36 --operation mode is normal H1_trg_cfg_ad_out[19] = AMPP_FUNCTION(Q1L81Q); --H1_trg_cfg_ad_out[20] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[20] at LC7_L36 --operation mode is normal H1_trg_cfg_ad_out[20] = AMPP_FUNCTION(Q1L91Q); --H1_trg_cfg_ad_out[21] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[21] at LC7_G40 --operation mode is normal H1_trg_cfg_ad_out[21] = AMPP_FUNCTION(Q1L02Q); --H1_trg_cfg_ad_out[22] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[22] at LC6_I39 --operation mode is normal H1_trg_cfg_ad_out[22] = AMPP_FUNCTION(Q1L12Q); --H1_trg_cfg_ad_out[23] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[23] at LC8_G42 --operation mode is normal H1_trg_cfg_ad_out[23] = AMPP_FUNCTION(Q1L22Q); --H1_trg_cfg_ad_out[24] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[24] at LC8_G43 --operation mode is normal H1_trg_cfg_ad_out[24] = AMPP_FUNCTION(Q1L32Q); --H1_trg_cfg_ad_out[25] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[25] at LC6_G46 --operation mode is normal H1_trg_cfg_ad_out[25] = AMPP_FUNCTION(Q1L42Q); --H1_trg_cfg_ad_out[26] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[26] at LC4_G48 --operation mode is normal H1_trg_cfg_ad_out[26] = AMPP_FUNCTION(Q1L52Q); --H1_trg_cfg_ad_out[27] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[27] at LC5_G52 --operation mode is normal H1_trg_cfg_ad_out[27] = AMPP_FUNCTION(Q1L62Q); --H1_trg_cfg_ad_out[28] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[28] at LC8_G51 --operation mode is normal H1_trg_cfg_ad_out[28] = AMPP_FUNCTION(Q1L72Q); --H1_trg_cfg_ad_out[29] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[29] at LC7_G50 --operation mode is normal H1_trg_cfg_ad_out[29] = AMPP_FUNCTION(Q1L82Q); --H1_trg_cfg_ad_out[30] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[30] at LC8_G31 --operation mode is normal H1_trg_cfg_ad_out[30] = AMPP_FUNCTION(Q1L92Q); --H1_trg_cfg_ad_out[31] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[31] at LC8_G39 --operation mode is normal H1_trg_cfg_ad_out[31] = AMPP_FUNCTION(Q1L03Q); --N1_devsel_OR_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|devsel_OR_lc[3] at LC8_F27 --operation mode is normal N1_devsel_OR_lc[3] = AMPP_FUNCTION(); --N1_stop_or_lc[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|stop_or_lc[6] at LC4_F32 --operation mode is normal N1_stop_or_lc[6] = AMPP_FUNCTION(); --N1_lt_ldata_ack_r_ena_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ldata_ack_r_ena_lc2 at LC6_F1 --operation mode is normal N1_lt_ldata_ack_r_ena_lc2 = AMPP_FUNCTION(N1_io_cyc); --N1_lt_ldata_ack_r_prn1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_ldata_ack_r_prn1 at LC7_F11 --operation mode is normal N1_lt_ldata_ack_r_prn1 = AMPP_FUNCTION(H1_ad_ir_address[2]); --K1_MW_IDLE_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_IDLE_lc1 at LC8_A13 --operation mode is normal K1_MW_IDLE_lc1 = AMPP_FUNCTION(K1_MW_IDLE_not); --K1_dac_cmd is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|dac_cmd at LC2_C21 --operation mode is normal K1_dac_cmd = AMPP_FUNCTION(); --Q1_mem_cyc is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|pcimt64_c:cfg|mem_cyc at LC6_G17 --operation mode is normal Q1_mem_cyc = AMPP_FUNCTION(H1_cben_ir_address[2], H1_cben_ir_address[1], H1_cben_ir_address[3], H1_cben_ir_address[0]); --H1_trg_cfg_ad_out[0] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[0] at LC8_I4 --operation mode is normal H1_trg_cfg_ad_out[0] = AMPP_FUNCTION(Q1L1Q); --H1_trg_cfg_ad_out[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[1] at LC8_I3 --operation mode is normal H1_trg_cfg_ad_out[1] = AMPP_FUNCTION(Q1L2Q); --H1_trg_cfg_ad_out[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[2] at LC8_J5 --operation mode is normal H1_trg_cfg_ad_out[2] = AMPP_FUNCTION(Q1L3Q); --H1_trg_cfg_ad_out[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[3] at LC6_I5 --operation mode is normal H1_trg_cfg_ad_out[3] = AMPP_FUNCTION(Q1L4Q); --H1_trg_cfg_ad_out[4] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[4] at LC6_I7 --operation mode is normal H1_trg_cfg_ad_out[4] = AMPP_FUNCTION(Q1L5Q); --H1_trg_cfg_ad_out[5] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[5] at LC8_I8 --operation mode is normal H1_trg_cfg_ad_out[5] = AMPP_FUNCTION(Q1L6Q); --H1_trg_cfg_ad_out[6] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[6] at LC5_I10 --operation mode is normal H1_trg_cfg_ad_out[6] = AMPP_FUNCTION(Q1L7Q); --H1_trg_cfg_ad_out[7] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[7] at LC8_J14 --operation mode is normal H1_trg_cfg_ad_out[7] = AMPP_FUNCTION(Q1L8Q); --H1_trg_cfg_ad_out[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[8] at LC1_G13 --operation mode is normal H1_trg_cfg_ad_out[8] = AMPP_FUNCTION(Q1L9Q); --H1_trg_cfg_ad_out[9] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[9] at LC8_I15 --operation mode is normal H1_trg_cfg_ad_out[9] = AMPP_FUNCTION(); --H1_trg_cfg_ad_out[10] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[10] at LC6_I16 --operation mode is normal H1_trg_cfg_ad_out[10] = AMPP_FUNCTION(); --H1_trg_cfg_ad_out[11] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[11] at LC8_I17 --operation mode is normal H1_trg_cfg_ad_out[11] = AMPP_FUNCTION(Q1L01Q); --H1_trg_cfg_ad_out[12] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[12] at LC8_I20 --operation mode is normal H1_trg_cfg_ad_out[12] = AMPP_FUNCTION(Q1L11Q); --H1_trg_cfg_ad_out[13] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[13] at LC8_I21 --operation mode is normal H1_trg_cfg_ad_out[13] = AMPP_FUNCTION(Q1L21Q); --H1_trg_cfg_ad_out[14] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[14] at LC7_I23 --operation mode is normal H1_trg_cfg_ad_out[14] = AMPP_FUNCTION(Q1L31Q); --H1_trg_cfg_ad_out[15] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|trg_cfg_ad_out[15] at LC8_I24 --operation mode is normal H1_trg_cfg_ad_out[15] = AMPP_FUNCTION(Q1L41Q); --H1_high_ad_out_lc[16] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[16] at LC6_I33 --operation mode is normal H1_high_ad_out_lc[16] = AMPP_FUNCTION(); --H1_high_ad_out_lc[17] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[17] at LC7_I33 --operation mode is normal H1_high_ad_out_lc[17] = AMPP_FUNCTION(); --H1_high_ad_out_lc[18] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[18] at LC7_I14 --operation mode is normal H1_high_ad_out_lc[18] = AMPP_FUNCTION(); --H1_high_ad_out_lc[19] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[19] at LC5_L41 --operation mode is normal H1_high_ad_out_lc[19] = AMPP_FUNCTION(); --H1_high_ad_out_lc[20] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[20] at LC6_L41 --operation mode is normal H1_high_ad_out_lc[20] = AMPP_FUNCTION(); --H1_high_ad_out_lc[21] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[21] at LC6_I43 --operation mode is normal H1_high_ad_out_lc[21] = AMPP_FUNCTION(); --H1_high_ad_out_lc[22] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[22] at LC7_I43 --operation mode is normal H1_high_ad_out_lc[22] = AMPP_FUNCTION(); --H1_high_ad_out_lc[23] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[23] at LC8_I43 --operation mode is normal H1_high_ad_out_lc[23] = AMPP_FUNCTION(); --H1_high_ad_out_lc[24] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[24] at LC6_I30 --operation mode is normal H1_high_ad_out_lc[24] = AMPP_FUNCTION(); --H1_high_ad_out_lc[25] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[25] at LC7_I30 --operation mode is normal H1_high_ad_out_lc[25] = AMPP_FUNCTION(); --H1_high_ad_out_lc[26] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[26] at LC2_L30 --operation mode is normal H1_high_ad_out_lc[26] = AMPP_FUNCTION(); --H1_high_ad_out_lc[27] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[27] at LC6_I27 --operation mode is normal H1_high_ad_out_lc[27] = AMPP_FUNCTION(); --H1_high_ad_out_lc[28] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[28] at LC7_I27 --operation mode is normal H1_high_ad_out_lc[28] = AMPP_FUNCTION(); --H1_high_ad_out_lc[29] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[29] at LC4_I28 --operation mode is normal H1_high_ad_out_lc[29] = AMPP_FUNCTION(); --H1_high_ad_out_lc[30] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[30] at LC5_I28 --operation mode is normal H1_high_ad_out_lc[30] = AMPP_FUNCTION(); --H1_high_ad_out_lc[31] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|high_ad_out_lc[31] at LC7_I52 --operation mode is normal H1_high_ad_out_lc[31] = AMPP_FUNCTION(); --K1_direct_xfr is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|direct_xfr at LC2_G23 --operation mode is normal K1_direct_xfr = AMPP_FUNCTION(K1_tgt_64_response_reg); --K1_DXFR_write_lc4a is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|DXFR_write_lc4a at LC7_A6 --operation mode is normal K1_DXFR_write_lc4a = AMPP_FUNCTION(K1_MS_DXFR, K1_irdy_or_not, K1_mstr_abrt, K1_frame_or_not); --K1_wr_rdn_set is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|wr_rdn_set at LC2_J19 --operation mode is normal K1_wr_rdn_set = AMPP_FUNCTION(); --K1_MR_LWAIT_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LWAIT_lc2 at LC5_A5 --operation mode is normal K1_MR_LWAIT_lc2 = AMPP_FUNCTION(K1_MR_LWAIT); --K1_MR_LLXFR_r1_d_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LLXFR_r1_d_lc1 at LC1_C12 --operation mode is normal K1_MR_LLXFR_r1_d_lc1 = AMPP_FUNCTION(); --N1_trdy_OR_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trdy_OR_lc[1] at LC8_F14 --operation mode is normal N1_trdy_OR_lc[1] = AMPP_FUNCTION(N1_lt_rdynR_R, N1_lt_ldata_ack_r, N1_direct_xfr); --K1_lm_adr_ack_R_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_adr_ack_R_lc2 at LC3_D4 --operation mode is normal K1_lm_adr_ack_R_lc2 = AMPP_FUNCTION(); --K1_$00063 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00063 at LC6_A4 --operation mode is normal K1_$00063 = AMPP_FUNCTION(K1_devsel_toR); --K1_last_xfr is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|last_xfr at LC7_C14 --operation mode is normal K1_last_xfr = AMPP_FUNCTION(K1_last_xfr_lc1); --K1_frame_or_lc2b is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_lc2b at LC8_C10 --operation mode is normal K1_frame_or_lc2b = AMPP_FUNCTION(K1_MR_PXFR); --K1_MR_LPXFR is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LPXFR at LC2_A19 --operation mode is normal K1_MR_LPXFR = AMPP_FUNCTION(K1_MR_LPXFR_r1); --K1_DXFR_write_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|DXFR_write_lc2 at LC8_A6 --operation mode is normal K1_DXFR_write_lc2 = AMPP_FUNCTION(K1_MS_ADR2, K1_MS_ADR, K1_dac_cyc_reg); --L1_xxh[8] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_pk:parity_Chk|xxh[8] at LC8_I12 --operation mode is normal L1_xxh[8] = AMPP_FUNCTION(); --H1_low_data_out_hr_ena_d is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|low_data_out_hr_ena_d at LC2_C6 --operation mode is normal H1_low_data_out_hr_ena_d = AMPP_FUNCTION(K1_dati_hr_ena_lc, K1_MS_ENA, N1_dati_hr_ena_lc, N1_TS_IDLE_NOT); --K1_lm_hdata_ack_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack_lc[2] at LC1_A20 --operation mode is normal K1_lm_hdata_ack_lc[2] = AMPP_FUNCTION(); --K1_lm_hdata_ack_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_hdata_ack_lc[1] at LC1_A24 --operation mode is normal K1_lm_hdata_ack_lc[1] = AMPP_FUNCTION(); --K1_WAIT_WAIT32_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|WAIT_WAIT32_lc2 at LC4_C5 --operation mode is normal K1_WAIT_WAIT32_lc2 = AMPP_FUNCTION(K1_MW_DXFR_32, K1_MW_WAIT, N1_no_op_reg[1], K1_devsel_toR); --K1_MW_WAIT_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_lc[2] at LC8_C5 --operation mode is normal K1_MW_WAIT_lc[2] = AMPP_FUNCTION(K1_MW_DXFR_32, K1_MW_WAIT, N1_no_op_reg[1], K1_devsel_toR); --K1_MW_LAST_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LAST_lc[1] at LC4_C16 --operation mode is normal K1_MW_LAST_lc[1] = AMPP_FUNCTION(K1_last_xfr_lc1, K1_latcntr_toR, K1_MW_WAIT_32, K1_MW_DXFR_32); --K1_frame_or_lc3c is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|frame_or_lc3c at LC5_C16 --operation mode is normal K1_frame_or_lc3c = AMPP_FUNCTION(); --K1_MW_LAST_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LAST_lc[2] at LC6_C16 --operation mode is normal K1_MW_LAST_lc[2] = AMPP_FUNCTION(K1_direct_xfr, K1_MW_WAIT, K1_MW_DXFR, N1_no_op_reg[1]); --K1_MW_DXFR_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_lc[2] at LC6_C24 --operation mode is normal K1_MW_DXFR_lc[2] = AMPP_FUNCTION(K1_direct_xfr, K1_MW_WAIT, K1_MW_DXFR, N1_no_op_reg[1]); --K1_last_xfr_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|last_xfr_lc1 at LC8_J12 --operation mode is normal K1_last_xfr_lc1 = AMPP_FUNCTION(K1_latcntr_toR); --K1_MW_DXFR_32_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_32_lc[2] at LC5_A1 --operation mode is normal K1_MW_DXFR_32_lc[2] = AMPP_FUNCTION(K1_MW_LXFR, K1_direct_xfr, K1_devsel_toR, N1_no_op_reg[1]); --K1_MW_DXFR_32_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_DXFR_32_lc[3] at LC4_C14 --operation mode is normal K1_MW_DXFR_32_lc[3] = AMPP_FUNCTION(K1_MW_HOLD, K1_devsel_toR); --K1_MW_LXFR_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_LXFR_lc[3] at LC7_C1 --operation mode is normal K1_MW_LXFR_lc[3] = AMPP_FUNCTION(); --K1_irdy_or_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|irdy_or_lc[2] at LC8_C21 --operation mode is normal K1_irdy_or_lc[2] = AMPP_FUNCTION(); --N1_lt_hdata_ack_r_prn[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|lt_hdata_ack_r_prn[1] at LC1_J2 --operation mode is normal N1_lt_hdata_ack_r_prn[1] = AMPP_FUNCTION(H1_ad_ir_address[2]); --K1_MR_LLWAIT_r1_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LLWAIT_r1_lc1 at LC8_A15 --operation mode is normal K1_MR_LLWAIT_r1_lc1 = AMPP_FUNCTION(K1_MR_PXFR, K1_devsel_toR); --K1_MR_LLXFR_r2_d_lc1 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_LLXFR_r2_d_lc1 at LC7_A17 --operation mode is normal K1_MR_LLXFR_r2_d_lc1 = AMPP_FUNCTION(); --N1_LR_PXFR_32_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_32_lc[2] at LC3_F2 --operation mode is normal N1_LR_PXFR_32_lc[2] = AMPP_FUNCTION(N1_LR_PXFR, N1_lt_rdynR, N1_direct_xfr, N1_TS_DISC); --N1_LR_PXFR_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_lc[2] at LC8_F22 --operation mode is normal N1_LR_PXFR_lc[2] = AMPP_FUNCTION(N1_LR_PXFR, N1_lt_rdynR, N1_TS_DISC); --K1_MW_WAIT_32_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MW_WAIT_32_lc[1] at LC1_C8 --operation mode is normal K1_MW_WAIT_32_lc[1] = AMPP_FUNCTION(K1_MW_DXFR_32, K1_last_xfr_lc1, N1_no_op_reg[1]); --K1_MR_PXFR_lc2 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_PXFR_lc2 at LC8_C13 --operation mode is normal K1_MR_PXFR_lc2 = AMPP_FUNCTION(); --K1_req64_or_lc[3] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|req64_or_lc[3] at LC2_F17 --operation mode is normal K1_req64_or_lc[3] = AMPP_FUNCTION(); --K1_req64_or_lc[2] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|req64_or_lc[2] at LC3_F17 --operation mode is normal K1_req64_or_lc[2] = AMPP_FUNCTION(); --K1_req64_or_lc[1] is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|req64_or_lc[1] at LC5_F17 --operation mode is normal K1_req64_or_lc[1] = AMPP_FUNCTION(); --N1L972 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LW_LXFR_lc[1]~40 at LC3_F29 --operation mode is normal N1L972 = AMPP_FUNCTION(imm_dpm_dec_reg_LT_RDY_n_pci, P5_REG, N1_cfg_cyc, N1L72); --K1L862 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ldata_ack_lc[2]~56 at LC5_A8 --operation mode is normal K1L862 = AMPP_FUNCTION(K1_tgt_64_response_reg, K1L101); --K1L762 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|lm_ldata_ack_lc[1]~57 at LC7_A8 --operation mode is normal K1L762 = AMPP_FUNCTION(K1_MR_IDLE_not, K1_MR_LLXFR_r2, K1_MR_LLXFR_r1, K1_MR_END, K1L32); --N1L241 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_IDLE_lc1~12 at LC6_F15 --operation mode is normal N1L241 = AMPP_FUNCTION(N1_retry, P5_REG, N1L73); --N1L643 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|trdy_OR_lc[6]~55 at LC6_F13 --operation mode is normal N1L643 = AMPP_FUNCTION(N1_TS_DXFR, imm_dpm_dec_reg_LT_RDY_n_pci, N1_LW_LXFR, N1L02); --N1L941 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_LXFR_lc[3]~45 at LC7_F16 --operation mode is normal N1L941 = AMPP_FUNCTION(N1_lt_rdynR, N1_lt_ldata_ack_r, N1_direct_xfr, N1L83); --N1L611 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|cfg_type0_cyc~12 at LC3_B26 --operation mode is normal N1L611 = AMPP_FUNCTION(N1_adr_phase_lc1, H1_ad_ir_address[0], H1_ad_ir_address[1], N1L1); --N1L221 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|devsel_OR_lc[2]~12 at LC7_F28 --operation mode is normal N1L221 = AMPP_FUNCTION(N1_TS_ADR_CLMD, N1L61); --K1L92 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00162~31 at LC6_C21 --operation mode is normal K1L92 = AMPP_FUNCTION(K1_MW_LXFR, K1_direct_xfr, N1_no_op_reg[1], K1L03); --N1L703 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|stop_or_lc[3]~45 at LC3_F32 --operation mode is normal N1L703 = AMPP_FUNCTION(N1L503, N1L77); --N1L363 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|TS_DXFR_d_lc[3]~46 at LC7_F50 --operation mode is normal N1L363 = AMPP_FUNCTION(N1_targ_burst_lc, N1_cfg_cyc, N1L42); --N1L02 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00175~10 at LC5_F13 --operation mode is normal N1L02 = AMPP_FUNCTION(N1_LR_PXFR, N1_lt_rdynR, N1_TS_DISC, N1L47); --N1L561 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|LR_PXFR_lc[1]~44 at LC5_F16 --operation mode is normal N1L561 = AMPP_FUNCTION(N1_LR_LXFR, N1L361); --N1L61 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00158~10 at LC6_F28 --operation mode is normal N1L61 = AMPP_FUNCTION(N1_TS_DXFR, N1_trdy_OR_NOT, N1L27); --N1L503 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|stop_or_lc[1]~46 at LC3_F39 --operation mode is normal N1L503 = AMPP_FUNCTION(N1_TS_DISC, N1L203); --N1L603 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|stop_or_lc[2]~47 at LC6_F32 --operation mode is normal N1L603 = AMPP_FUNCTION(N1_retry, N1L67); --K1L013 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MR_PXFR_r2_d~16 at LC2_C13 --operation mode is normal K1L013 = AMPP_FUNCTION(A1L472, K1L55); --N1L42 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_t:trg|$00189~1 at LC6_F50 --operation mode is normal N1L42 = AMPP_FUNCTION(N1L28); --K1L54 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00217~10 at LC7_C16 --operation mode is normal K1L54 = AMPP_FUNCTION(K1L2); --K1L15 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|$00232~1 at LC3_C8 --operation mode is normal K1L15 = AMPP_FUNCTION(K1L04); --~GND is ~GND at LC8_G24 --operation mode is normal ~GND = GND; --ADC2_D[0] is ADC2_D[0] at Pin_25 --operation mode is input ADC2_D[0] = INPUT(); --ADC2_D[1] is ADC2_D[1] at Pin_24 --operation mode is input ADC2_D[1] = INPUT(); --ADC2_D[2] is ADC2_D[2] at Pin_19 --operation mode is input ADC2_D[2] = INPUT(); --CLK50M is CLK50M at Pin_182 --operation mode is input CLK50M = INPUT(); --LVDS_in[0] is LVDS_in[0] at Pin_8 --operation mode is input LVDS_in[0] = INPUT(); --LVDS_in[1] is LVDS_in[1] at Pin_7 --operation mode is input LVDS_in[1] = INPUT(); --LVDS_in[2] is LVDS_in[2] at Pin_9 --operation mode is input LVDS_in[2] = INPUT(); --LVDS_in[3] is LVDS_in[3] at Pin_10 --operation mode is input LVDS_in[3] = INPUT(); --pci_lockn is pci_lockn at Pin_83 --operation mode is input pci_lockn = INPUT(); --ADC2_D[3] is ADC2_D[3] at Pin_18 --operation mode is input ADC2_D[3] = INPUT(); --pci_rstn is pci_rstn at Pin_78 --operation mode is input pci_rstn = INPUT(); --pci_clk is pci_clk at Pin_79 --operation mode is input pci_clk = INPUT(); --pci_gntn is pci_gntn at Pin_68 --operation mode is input pci_gntn = INPUT(); --ADC1_D[4] is ADC1_D[4] at Pin_31 --operation mode is input ADC1_D[4] = INPUT(); --ADC1_D[5] is ADC1_D[5] at Pin_30 --operation mode is input ADC1_D[5] = INPUT(); --ADC1_D[6] is ADC1_D[6] at Pin_29 --operation mode is input ADC1_D[6] = INPUT(); --ADC1_D[7] is ADC1_D[7] at Pin_28 --operation mode is input ADC1_D[7] = INPUT(); --ADC1_D[0] is ADC1_D[0] at Pin_39 --operation mode is input ADC1_D[0] = INPUT(); --ADC1_D[1] is ADC1_D[1] at Pin_38 --operation mode is input ADC1_D[1] = INPUT(); --ADC1_D[2] is ADC1_D[2] at Pin_37 --operation mode is input ADC1_D[2] = INPUT(); --ADC1_D[3] is ADC1_D[3] at Pin_36 --operation mode is input ADC1_D[3] = INPUT(); --pci_idsel is pci_idsel at Pin_44 --operation mode is input pci_idsel = INPUT(); --ADC2oD[4] is ADC2oD[4] at Pin_17 --operation mode is output ADC2oD[4] = OUTPUT(!imm_dpm_dec_reg_rdata_LED_8); --ADC2oD[5] is ADC2oD[5] at Pin_16 --operation mode is output ADC2oD[5] = OUTPUT(GND); --ADC2oD[6] is ADC2oD[6] at Pin_15 --operation mode is output ADC2oD[6] = OUTPUT(VCC); --ADC2oD[7] is ADC2oD[7] at Pin_14 --operation mode is output ADC2oD[7] = OUTPUT(GND); --ADC_OEn is ADC_OEn at Pin_27 --operation mode is output ADC_OEn = OUTPUT(VCC); --LED_GRN is LED_GRN at Pin_195 --operation mode is output LED_GRN = OUTPUT(!A1L04Q); --LED_RED is LED_RED at Pin_193 --operation mode is output LED_RED = OUTPUT(!imm_dpm_dec_reg_rdata_LED_9); --LVDS_EN is LVDS_EN at Pin_206 --operation mode is output LVDS_EN = OUTPUT(VCC); --LVDS_out[0] is LVDS_out[0] at Pin_207 --operation mode is output LVDS_out[0] = OUTPUT(GND); --LVDS_out[1] is LVDS_out[1] at Pin_208 --operation mode is output LVDS_out[1] = OUTPUT(GND); --LVDS_out[2] is LVDS_out[2] at Pin_13 --operation mode is output LVDS_out[2] = OUTPUT(imm_dpm_dec_reg_soft_rst_n); --LVDS_out[3] is LVDS_out[3] at Pin_12 --operation mode is output LVDS_out[3] = OUTPUT(!A1L671); --pci_ad_0 is pci_ad_0 at Pin_102 --operation mode is bidir pci_ad_0 = pci_ad[0]; --pci_ad[0] is pci_ad[0] at Pin_102 --operation mode is bidir pci_ad[0]_tri_out = TRI(H1_low_ad_or[0], H1_ad_tri_oe); pci_ad[0] = BIDIR(pci_ad[0]_tri_out); --pci_ad_1 is pci_ad_1 at Pin_101 --operation mode is bidir pci_ad_1 = pci_ad[1]; --pci_ad[1] is pci_ad[1] at Pin_101 --operation mode is bidir pci_ad[1]_tri_out = TRI(H1_low_ad_or[1], H1_ad_tri_oe); pci_ad[1] = BIDIR(pci_ad[1]_tri_out); --pci_ad_2 is pci_ad_2 at Pin_100 --operation mode is bidir pci_ad_2 = pci_ad[2]; --pci_ad[2] is pci_ad[2] at Pin_100 --operation mode is bidir pci_ad[2]_tri_out = TRI(H1_low_ad_or[2], H1_ad_tri_oe); pci_ad[2] = BIDIR(pci_ad[2]_tri_out); --pci_ad_3 is pci_ad_3 at Pin_99 --operation mode is bidir pci_ad_3 = pci_ad[3]; --pci_ad[3] is pci_ad[3] at Pin_99 --operation mode is bidir pci_ad[3]_tri_out = TRI(H1_low_ad_or[3], H1_ad_tri_oe); pci_ad[3] = BIDIR(pci_ad[3]_tri_out); --pci_ad_4 is pci_ad_4 at Pin_97 --operation mode is bidir pci_ad_4 = pci_ad[4]; --pci_ad[4] is pci_ad[4] at Pin_97 --operation mode is bidir pci_ad[4]_tri_out = TRI(H1_low_ad_or[4], H1_ad_tri_oe); pci_ad[4] = BIDIR(pci_ad[4]_tri_out); --pci_ad_5 is pci_ad_5 at Pin_96 --operation mode is bidir pci_ad_5 = pci_ad[5]; --pci_ad[5] is pci_ad[5] at Pin_96 --operation mode is bidir pci_ad[5]_tri_out = TRI(H1_low_ad_or[5], H1_ad_tri_oe); pci_ad[5] = BIDIR(pci_ad[5]_tri_out); --pci_ad_6 is pci_ad_6 at Pin_95 --operation mode is bidir pci_ad_6 = pci_ad[6]; --pci_ad[6] is pci_ad[6] at Pin_95 --operation mode is bidir pci_ad[6]_tri_out = TRI(H1_low_ad_or[6], H1_ad_tri_oe); pci_ad[6] = BIDIR(pci_ad[6]_tri_out); --pci_ad_7 is pci_ad_7 at Pin_94 --operation mode is bidir pci_ad_7 = pci_ad[7]; --pci_ad[7] is pci_ad[7] at Pin_94 --operation mode is bidir pci_ad[7]_tri_out = TRI(H1_low_ad_or[7], H1_ad_tri_oe); pci_ad[7] = BIDIR(pci_ad[7]_tri_out); --pci_ad_8 is pci_ad_8 at Pin_93 --operation mode is bidir pci_ad_8 = pci_ad[8]; --pci_ad[8] is pci_ad[8] at Pin_93 --operation mode is bidir pci_ad[8]_tri_out = TRI(H1_low_ad_or[8], H1_ad_tri_oe); pci_ad[8] = BIDIR(pci_ad[8]_tri_out); --pci_ad_9 is pci_ad_9 at Pin_92 --operation mode is bidir pci_ad_9 = pci_ad[9]; --pci_ad[9] is pci_ad[9] at Pin_92 --operation mode is bidir pci_ad[9]_tri_out = TRI(H1_low_ad_or[9], H1_ad_tri_oe); pci_ad[9] = BIDIR(pci_ad[9]_tri_out); --pci_ad_10 is pci_ad_10 at Pin_90 --operation mode is bidir pci_ad_10 = pci_ad[10]; --pci_ad[10] is pci_ad[10] at Pin_90 --operation mode is bidir pci_ad[10]_tri_out = TRI(H1_low_ad_or[10], H1_ad_tri_oe); pci_ad[10] = BIDIR(pci_ad[10]_tri_out); --pci_ad_11 is pci_ad_11 at Pin_89 --operation mode is bidir pci_ad_11 = pci_ad[11]; --pci_ad[11] is pci_ad[11] at Pin_89 --operation mode is bidir pci_ad[11]_tri_out = TRI(H1_low_ad_or[11], H1_ad_tri_oe); pci_ad[11] = BIDIR(pci_ad[11]_tri_out); --pci_ad_12 is pci_ad_12 at Pin_88 --operation mode is bidir pci_ad_12 = pci_ad[12]; --pci_ad[12] is pci_ad[12] at Pin_88 --operation mode is bidir pci_ad[12]_tri_out = TRI(H1_low_ad_or[12], H1_ad_tri_oe); pci_ad[12] = BIDIR(pci_ad[12]_tri_out); --pci_ad_13 is pci_ad_13 at Pin_87 --operation mode is bidir pci_ad_13 = pci_ad[13]; --pci_ad[13] is pci_ad[13] at Pin_87 --operation mode is bidir pci_ad[13]_tri_out = TRI(H1_low_ad_or[13], H1_ad_tri_oe); pci_ad[13] = BIDIR(pci_ad[13]_tri_out); --pci_ad_14 is pci_ad_14 at Pin_86 --operation mode is bidir pci_ad_14 = pci_ad[14]; --pci_ad[14] is pci_ad[14] at Pin_86 --operation mode is bidir pci_ad[14]_tri_out = TRI(H1_low_ad_or[14], H1_ad_tri_oe); pci_ad[14] = BIDIR(pci_ad[14]_tri_out); --pci_ad_15 is pci_ad_15 at Pin_85 --operation mode is bidir pci_ad_15 = pci_ad[15]; --pci_ad[15] is pci_ad[15] at Pin_85 --operation mode is bidir pci_ad[15]_tri_out = TRI(H1_low_ad_or[15], H1_ad_tri_oe); pci_ad[15] = BIDIR(pci_ad[15]_tri_out); --pci_ad_16 is pci_ad_16 at Pin_67 --operation mode is bidir pci_ad_16 = pci_ad[16]; --pci_ad[16] is pci_ad[16] at Pin_67 --operation mode is bidir pci_ad[16]_tri_out = TRI(H1_low_ad_or[16], H1_ad_tri_oe); pci_ad[16] = BIDIR(pci_ad[16]_tri_out); --pci_ad_17 is pci_ad_17 at Pin_65 --operation mode is bidir pci_ad_17 = pci_ad[17]; --pci_ad[17] is pci_ad[17] at Pin_65 --operation mode is bidir pci_ad[17]_tri_out = TRI(H1_low_ad_or[17], H1_ad_tri_oe); pci_ad[17] = BIDIR(pci_ad[17]_tri_out); --pci_ad_18 is pci_ad_18 at Pin_64 --operation mode is bidir pci_ad_18 = pci_ad[18]; --pci_ad[18] is pci_ad[18] at Pin_64 --operation mode is bidir pci_ad[18]_tri_out = TRI(H1_low_ad_or[18], H1_ad_tri_oe); pci_ad[18] = BIDIR(pci_ad[18]_tri_out); --pci_ad_19 is pci_ad_19 at Pin_63 --operation mode is bidir pci_ad_19 = pci_ad[19]; --pci_ad[19] is pci_ad[19] at Pin_63 --operation mode is bidir pci_ad[19]_tri_out = TRI(H1_low_ad_or[19], H1_ad_tri_oe); pci_ad[19] = BIDIR(pci_ad[19]_tri_out); --pci_ad_20 is pci_ad_20 at Pin_62 --operation mode is bidir pci_ad_20 = pci_ad[20]; --pci_ad[20] is pci_ad[20] at Pin_62 --operation mode is bidir pci_ad[20]_tri_out = TRI(H1_low_ad_or[20], H1_ad_tri_oe); pci_ad[20] = BIDIR(pci_ad[20]_tri_out); --pci_ad_21 is pci_ad_21 at Pin_61 --operation mode is bidir pci_ad_21 = pci_ad[21]; --pci_ad[21] is pci_ad[21] at Pin_61 --operation mode is bidir pci_ad[21]_tri_out = TRI(H1_low_ad_or[21], H1_ad_tri_oe); pci_ad[21] = BIDIR(pci_ad[21]_tri_out); --pci_ad_22 is pci_ad_22 at Pin_60 --operation mode is bidir pci_ad_22 = pci_ad[22]; --pci_ad[22] is pci_ad[22] at Pin_60 --operation mode is bidir pci_ad[22]_tri_out = TRI(H1_low_ad_or[22], H1_ad_tri_oe); pci_ad[22] = BIDIR(pci_ad[22]_tri_out); --pci_ad_23 is pci_ad_23 at Pin_58 --operation mode is bidir pci_ad_23 = pci_ad[23]; --pci_ad[23] is pci_ad[23] at Pin_58 --operation mode is bidir pci_ad[23]_tri_out = TRI(H1_low_ad_or[23], H1_ad_tri_oe); pci_ad[23] = BIDIR(pci_ad[23]_tri_out); --pci_ad_24 is pci_ad_24 at Pin_57 --operation mode is bidir pci_ad_24 = pci_ad[24]; --pci_ad[24] is pci_ad[24] at Pin_57 --operation mode is bidir pci_ad[24]_tri_out = TRI(H1_low_ad_or[24], H1_ad_tri_oe); pci_ad[24] = BIDIR(pci_ad[24]_tri_out); --pci_ad_25 is pci_ad_25 at Pin_56 --operation mode is bidir pci_ad_25 = pci_ad[25]; --pci_ad[25] is pci_ad[25] at Pin_56 --operation mode is bidir pci_ad[25]_tri_out = TRI(H1_low_ad_or[25], H1_ad_tri_oe); pci_ad[25] = BIDIR(pci_ad[25]_tri_out); --pci_ad_26 is pci_ad_26 at Pin_55 --operation mode is bidir pci_ad_26 = pci_ad[26]; --pci_ad[26] is pci_ad[26] at Pin_55 --operation mode is bidir pci_ad[26]_tri_out = TRI(H1_low_ad_or[26], H1_ad_tri_oe); pci_ad[26] = BIDIR(pci_ad[26]_tri_out); --pci_ad_27 is pci_ad_27 at Pin_54 --operation mode is bidir pci_ad_27 = pci_ad[27]; --pci_ad[27] is pci_ad[27] at Pin_54 --operation mode is bidir pci_ad[27]_tri_out = TRI(H1_low_ad_or[27], H1_ad_tri_oe); pci_ad[27] = BIDIR(pci_ad[27]_tri_out); --pci_ad_28 is pci_ad_28 at Pin_53 --operation mode is bidir pci_ad_28 = pci_ad[28]; --pci_ad[28] is pci_ad[28] at Pin_53 --operation mode is bidir pci_ad[28]_tri_out = TRI(H1_low_ad_or[28], H1_ad_tri_oe); pci_ad[28] = BIDIR(pci_ad[28]_tri_out); --pci_ad_29 is pci_ad_29 at Pin_47 --operation mode is bidir pci_ad_29 = pci_ad[29]; --pci_ad[29] is pci_ad[29] at Pin_47 --operation mode is bidir pci_ad[29]_tri_out = TRI(H1_low_ad_or[29], H1_ad_tri_oe); pci_ad[29] = BIDIR(pci_ad[29]_tri_out); --pci_ad_30 is pci_ad_30 at Pin_46 --operation mode is bidir pci_ad_30 = pci_ad[30]; --pci_ad[30] is pci_ad[30] at Pin_46 --operation mode is bidir pci_ad[30]_tri_out = TRI(H1_low_ad_or[30], H1_ad_tri_oe); pci_ad[30] = BIDIR(pci_ad[30]_tri_out); --pci_ad_31 is pci_ad_31 at Pin_45 --operation mode is bidir pci_ad_31 = pci_ad[31]; --pci_ad[31] is pci_ad[31] at Pin_45 --operation mode is bidir pci_ad[31]_tri_out = TRI(H1_low_ad_or[31], H1_ad_tri_oe); pci_ad[31] = BIDIR(pci_ad[31]_tri_out); --pci_cben_0 is pci_cben_0 at Pin_111 --operation mode is bidir pci_cben_0 = pci_cben[0]; --pci_cben[0] is pci_cben[0] at Pin_111 --operation mode is bidir pci_cben[0]_tri_out = TRI(H1_low_cben_or[0], !K1_cbe_oer_not); pci_cben[0] = BIDIR(pci_cben[0]_tri_out); --pci_cben_1 is pci_cben_1 at Pin_112 --operation mode is bidir pci_cben_1 = pci_cben[1]; --pci_cben[1] is pci_cben[1] at Pin_112 --operation mode is bidir pci_cben[1]_tri_out = TRI(H1_low_cben_or[1], !K1_cbe_oer_not); pci_cben[1] = BIDIR(pci_cben[1]_tri_out); --pci_cben_2 is pci_cben_2 at Pin_113 --operation mode is bidir pci_cben_2 = pci_cben[2]; --pci_cben[2] is pci_cben[2] at Pin_113 --operation mode is bidir pci_cben[2]_tri_out = TRI(H1_low_cben_or[2], !K1_cbe_oer_not); pci_cben[2] = BIDIR(pci_cben[2]_tri_out); --pci_cben_3 is pci_cben_3 at Pin_114 --operation mode is bidir pci_cben_3 = pci_cben[3]; --pci_cben[3] is pci_cben[3] at Pin_114 --operation mode is bidir pci_cben[3]_tri_out = TRI(H1_low_cben_or[3], !K1_cbe_oer_not); pci_cben[3] = BIDIR(pci_cben[3]_tri_out); --A1L352 is pci_devseln~0 at Pin_74 --operation mode is bidir A1L352 = pci_devseln; --pci_devseln is pci_devseln at Pin_74 --operation mode is bidir pci_devseln_tri_out = TRI(A1L452, N1_targ_oeR_reg); pci_devseln = BIDIR(pci_devseln_tri_out); --A1L652 is pci_framen~0 at Pin_69 --operation mode is bidir A1L652 = pci_framen; --pci_framen is pci_framen at Pin_69 --operation mode is bidir pci_framen_tri_out = TRI(A1L752, !K1_cbe_oer_not); pci_framen = BIDIR(pci_framen_tri_out); --pci_intan is pci_intan at Pin_40 --operation mode is output pci_intan = OUTPUT(VCC); --A1L262 is pci_irdyn~0 at Pin_70 --operation mode is bidir A1L262 = pci_irdyn; --pci_irdyn is pci_irdyn at Pin_70 --operation mode is bidir pci_irdyn_tri_out = TRI(A1L362, K1_irdy_oer); pci_irdyn = BIDIR(pci_irdyn_tri_out); --A1L662 is pci_par~0 at Pin_104 --operation mode is bidir A1L662 = pci_par; --pci_par is pci_par at Pin_104 --operation mode is bidir pci_par_tri_out = TRI(A1L762, H1_par_oeR); pci_par = BIDIR(pci_par_tri_out); --A1L962 is pci_perrn~0 at Pin_103 --operation mode is bidir A1L962 = pci_perrn; --pci_perrn is pci_perrn at Pin_103 --operation mode is bidir pci_perrn_tri_out = TRI(L1_perr_or_not, H1_perr_oe_r); pci_perrn = BIDIR(pci_perrn_tri_out); --pci_reqn is pci_reqn at Pin_41 --operation mode is output pci_reqn_tri_out = TRI(!K1_req_or, pci_rstn); pci_reqn = OUTPUT(pci_reqn_tri_out); --pci_serrn is pci_serrn at Pin_115 --operation mode is output pci_serrn_open_drain_out = OPNDRN(!L1_serr_or); pci_serrn = OUTPUT(pci_serrn_open_drain_out); --A1L472 is pci_stopn~0 at Pin_75 --operation mode is bidir A1L472 = pci_stopn; --pci_stopn is pci_stopn at Pin_75 --operation mode is bidir pci_stopn_tri_out = TRI(A1L572, N1_targ_oeR_reg); pci_stopn = BIDIR(pci_stopn_tri_out); --A1L772 is pci_trdyn~0 at Pin_73 --operation mode is bidir A1L772 = pci_trdyn; --pci_trdyn is pci_trdyn at Pin_73 --operation mode is bidir pci_trdyn_tri_out = TRI(A1L872, N1_targ_oeR_reg); pci_trdyn = BIDIR(pci_trdyn_tri_out); --R7S[7] is R7S[7] at Pin_190 --operation mode is output R7S[7] = OUTPUT(ix1270_lc); --R7S[6] is R7S[6] at Pin_191 --operation mode is output R7S[6] = OUTPUT(ix1269_lc); --R7S[5] is R7S[5] at Pin_189 --operation mode is output R7S[5] = OUTPUT(ix1268_lc); --R7S[4] is R7S[4] at Pin_187 --operation mode is output R7S[4] = OUTPUT(ix1267_lc); --R7S[3] is R7S[3] at Pin_186 --operation mode is output R7S[3] = OUTPUT(ix1266_lc); --R7S[2] is R7S[2] at Pin_180 --operation mode is output R7S[2] = OUTPUT(ix1265_lc); --R7S[1] is R7S[1] at Pin_192 --operation mode is output R7S[1] = OUTPUT(ix1264_lc); --R7S_mux is R7S_mux at Pin_179 --operation mode is output R7S_mux = OUTPUT(sg_reg_mx_q); --SRAM_CEn is SRAM_CEn at Pin_125 --operation mode is output SRAM_CEn = OUTPUT(VCC); --SRAM_OEn is SRAM_OEn at Pin_131 --operation mode is output SRAM_OEn = OUTPUT(VCC); --K1L413 is pci_contr:pci|pci_contr_params:pci_contr_params_component|pci_mt64:inst|pcimt64_m:mstr|MS_ADR~69 at LC5_A19 --operation mode is normal K1L413 = AMPP_FUNCTION(K1_MS_ADR); --A1L04Q is imm_dpm_dec_reg_rdata_LED_8~0 at LC5_I40 --operation mode is normal A1L04Q_lut_out = H1_low_ad_IR_data[8] & (H1L722 # H1L522) # !H1_low_ad_IR_data[8] & !H1L722 & H1L522; A1L04Q = DFFEA(A1L04Q_lut_out, GLOBAL(pci_clk), pci_rstn, , A1L37, , ); --A1L452 is pci_devseln~2 at LC5_F27 --operation mode is normal A1L452 = N1_devsel_OR_not; --A1L752 is pci_framen~10 at LC4_D32 --operation mode is normal A1L752 = K1_frame_or_not; --A1L362 is pci_irdyn~5 at LC6_D32 --operation mode is normal A1L362 = K1_irdy_or_not; --A1L762 is pci_par~1 at LC2_B2 --operation mode is normal A1L762 = H1_par_or; --A1L572 is pci_stopn~8 at LC2_F28 --operation mode is normal A1L572 = N1_stop_OR_NOT; --A1L872 is pci_trdyn~17 at LC1_F30 --operation mode is normal A1L872 = N1_trdy_OR_NOT; --A1L671 is LVDS_out[3]~0 at LC4_K31 --operation mode is normal A1L671 = ADC2_D[3];