Assembler report for top_trap_pci Thu Sep 28 16:32:51 2006 Version 5.0 Build 148 04/26/2005 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2. Assembler Summary 3. Assembler Settings 4. Assembler Generated Files 5. Assembler Device Options: J:/angelov/ACEX_designs.svn/ni_sdr_sram/quartus/top_trap_pci.sof 6. Assembler Device Options: J:/angelov/ACEX_designs.svn/ni_sdr_sram/quartus/top_trap_pci.pof 7. Assembler Messages ---------------- ; Legal Notice ; ---------------- Copyright (C) 1991-2005 Altera Corporation Your use of Altera Corporation's design tools, logic functions and other software and tools, and its AMPP partner logic functions, and any output files any of the foregoing (including device programming or simulation files), and any associated documentation or information are expressly subject to the terms and conditions of the Altera Program License Subscription Agreement, Altera MegaCore Function License Agreement, or other applicable license agreement, including, without limitation, that your use is for the sole purpose of programming logic devices manufactured by Altera and sold by Altera or its authorized distributors. Please refer to the applicable agreement for further details. +---------------------------------------------------------------+ ; Assembler Summary ; +-----------------------+---------------------------------------+ ; Assembler Status ; Successful - Thu Sep 28 16:32:51 2006 ; ; Revision Name ; top_trap_pci ; ; Top-level Entity Name ; top_trap_pci ; ; Family ; ACEX1K ; ; Device ; EP1K100QC208-1 ; +-----------------------+---------------------------------------+ +-----------------------------------------------------------------------------------------------------------+ ; Assembler Settings ; +--------------------------------------------------------------------------------+----------+---------------+ ; Option ; Setting ; Default Value ; +--------------------------------------------------------------------------------+----------+---------------+ ; Use smart compilation ; On ; Off ; ; Configuration device ; Epc2 ; Auto ; ; Auto-restart configuration after error ; Off ; On ; ; Generate Serial Vector Format File (.svf) for Target Device ; Off ; Off ; ; Generate a JEDEC STAPL Format File (.jam) for Target Device ; Off ; Off ; ; Generate an uncompressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; Off ; Off ; ; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; On ; On ; ; Compression mode ; Off ; Off ; ; Clock source for configuration device ; Internal ; Internal ; ; Clock frequency of the configuration device ; 10 MHz ; 10 MHz ; ; Divide clock frequency by ; 1 ; 1 ; ; Low-voltage mode ; on ; on ; ; JTAG user code for target device ; 7F ; 7F ; ; Auto user code ; off ; off ; ; Use configuration device ; On ; On ; ; JTAG user code for configuration device ; Ffffffff ; Ffffffff ; ; Configuration device auto user code ; off ; off ; ; Auto-increment JTAG user code for multiple configuration devices ; On ; On ; ; Disable CONF_DONE and nSTATUS pull-ups on configuration device ; Off ; Off ; ; Generate Tabular Text File (.ttf) For Target Device ; Off ; Off ; ; Generate Raw Binary File (.rbf) For Target Device ; Off ; Off ; ; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device ; Off ; Off ; ; Hexadecimal Output File start address ; 0 ; 0 ; ; Hexadecimal Output File count direction ; Up ; Up ; ; Release clears before tri-states ; off ; off ; +--------------------------------------------------------------------------------+----------+---------------+ +------------------------------------------------------------------+ ; Assembler Generated Files ; +------------------------------------------------------------------+ ; File Name ; +------------------------------------------------------------------+ ; J:/angelov/ACEX_designs.svn/ni_sdr_sram/quartus/top_trap_pci.sof ; ; J:/angelov/ACEX_designs.svn/ni_sdr_sram/quartus/top_trap_pci.pof ; +------------------------------------------------------------------+ +--------------------------------------------------------------------------------------------+ ; Assembler Device Options: J:/angelov/ACEX_designs.svn/ni_sdr_sram/quartus/top_trap_pci.sof ; +----------------+---------------------------------------------------------------------------+ ; Option ; Setting ; +----------------+---------------------------------------------------------------------------+ ; Device ; EP1K100QC208-1 ; ; JTAG usercode ; 0x0000007F ; ; Checksum ; 0x0010B9FF ; +----------------+---------------------------------------------------------------------------+ +--------------------------------------------------------------------------------------------+ ; Assembler Device Options: J:/angelov/ACEX_designs.svn/ni_sdr_sram/quartus/top_trap_pci.pof ; +----------------+---------------------------------------------------------------------------+ ; Option ; Setting ; +----------------+---------------------------------------------------------------------------+ ; Device ; EPC2 ; ; JTAG usercode ; 0x00000000 ; ; Checksum ; 0x00C96588 ; +----------------+---------------------------------------------------------------------------+ +--------------------+ ; Assembler Messages ; +--------------------+ Info: ******************************************************************* Info: Running Quartus II Assembler Info: Version 5.0 Build 148 04/26/2005 SJ Full Version Info: Processing started: Thu Sep 28 16:32:48 2006 Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off top_trap_pci -c top_trap_pci Info: Quartus II Assembler was successful. 0 errors, 0 warnings Info: Processing ended: Thu Sep 28 16:32:51 2006 Info: Elapsed time: 00:00:04