-- megafunction wizard: %PCI Compiler 2.4.0% -- ============================================================ -- Megafunction Name(s): -- pci_mt32 -- ============================================================ -- Generated by PCI Compiler 2.4.0 [Altera, IP Toolbench vv1.2.0 build308] -- ************************************************************ -- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! -- ************************************************************ -- Copyright (C) 1991-2005 Altera Corporation -- Any megafunction design, and related net list (encrypted or decrypted), -- support information, device programming or simulation file, and any other -- associated documentation or information provided by Altera or a partner -- under Altera's Megafunction Partnership Program may be used only to -- program PLD devices (but not masked PLD devices) from Altera. Any other -- use of such megafunction design, net list, support information, device -- programming or simulation file, or any other related documentation or -- information is prohibited for any other purpose, including, but not -- limited to modification, reverse engineering, de-compiling, or use with -- any other silicon devices, unless such use is explicitly licensed under -- a separate agreement with Altera or a megafunction partner. Title to -- the intellectual property, including patents, copyrights, trademarks, -- trade secrets, or maskworks, embodied in any such megafunction design, -- net list, support information, device programming or simulation file, or -- any other related documentation or information provided by Altera or a -- megafunction partner, remains with Altera, the megafunction partner, or -- their respective licensors. No other licenses, including any licenses -- needed under any third party's intellectual property, are provided herein. FUNCTION pci_mt32( clk, rstn, gntn, idsel, l_adi[31..0], l_cbeni[3..0], lm_req32n, lm_lastn, lm_rdyn, lt_rdyn, lt_abortn, lt_discn, lirqn, framen_in, irdyn_in, devseln_in, trdyn_in, stopn_in ) WITH ( CLASS_CODE, DEVICE_ID, REVISION_ID, SUBSYSTEM_ID, SUBSYSTEM_VENDOR_ID, TARGET_DEVICE, VENDOR_ID, MIN_GRANT, MAX_LATENCY, CAP_PTR, CIS_PTR, BAR0, BAR1, BAR2, BAR3, BAR4, BAR5, NUMBER_OF_BARS, HARDWIRE_BAR0, HARDWIRE_BAR1, HARDWIRE_BAR2, HARDWIRE_BAR3, HARDWIRE_BAR4, HARDWIRE_BAR5, HARDWIRE_EXP_ROM, EXP_ROM_BAR, PCI_66MHZ_CAPABLE, INTERRUPT_PIN_REG, ENABLE_BITS ) RETURNS ( intan, reqn, serrn, l_adro[31..0], l_dato[31..0], l_beno[3..0], l_cmdo[3..0], lm_adr_ackn, lm_ackn, lm_dxfrn, lm_tsr[9..0], lt_framen, lt_ackn, lt_dxfrn, lt_tsr[11..0], cmd_reg[5..0], stat_reg[5..0], cache[7..0], framen_out, irdyn_out, devseln_out, trdyn_out, stopn_out, ad[31..0], cben[3..0], par, perrn ); SUBDESIGN pci_contr ( clk : INPUT ; rstn : INPUT ; gntn : INPUT ; idsel : INPUT ; l_adi[31..0] : INPUT ; l_cbeni[3..0] : INPUT ; lm_req32n : INPUT ; lm_lastn : INPUT ; lm_rdyn : INPUT ; lt_rdyn : INPUT ; lt_abortn : INPUT ; lt_discn : INPUT ; lirqn : INPUT ; framen : BIDIR ; irdyn : BIDIR ; devseln : BIDIR ; trdyn : BIDIR ; stopn : BIDIR ; intan : OUTPUT ; reqn : OUTPUT ; serrn : OUTPUT ; l_adro[31..0] : OUTPUT ; l_dato[31..0] : OUTPUT ; l_beno[3..0] : OUTPUT ; l_cmdo[3..0] : OUTPUT ; lm_adr_ackn : OUTPUT ; lm_ackn : OUTPUT ; lm_dxfrn : OUTPUT ; lm_tsr[9..0] : OUTPUT ; lt_framen : OUTPUT ; lt_ackn : OUTPUT ; lt_dxfrn : OUTPUT ; lt_tsr[11..0] : OUTPUT ; cmd_reg[5..0] : OUTPUT ; stat_reg[5..0] : OUTPUT ; cache[7..0] : OUTPUT ; ad[31..0] : BIDIR ; cben[3..0] : BIDIR ; par : BIDIR ; perrn : BIDIR ; ) VARIABLE pci_mt32_inst : pci_mt32 WITH (CLASS_CODE = H"FF0000", DEVICE_ID = H"0004", REVISION_ID = H"01", SUBSYSTEM_ID = H"0000", SUBSYSTEM_VENDOR_ID = H"0000", TARGET_DEVICE = "NEW", VENDOR_ID = H"1172", MIN_GRANT = H"00", MAX_LATENCY = H"00", CAP_PTR = H"40", CIS_PTR = H"00000000", BAR0 = H"FFF00000", BAR1 = H"FFF00000", BAR2 = H"FFF00000", BAR3 = H"FFF00000", BAR4 = H"FFF00000", BAR5 = H"FFF00000", NUMBER_OF_BARS = H"00000001", HARDWIRE_BAR0 = H"00000000", HARDWIRE_BAR1 = H"00000000", HARDWIRE_BAR2 = H"00000000", HARDWIRE_BAR3 = H"00000000", HARDWIRE_BAR4 = H"00000000", HARDWIRE_BAR5 = H"00000000", HARDWIRE_EXP_ROM = H"00000001", EXP_ROM_BAR = H"FFF00000", PCI_66MHZ_CAPABLE = "NO", INTERRUPT_PIN_REG = H"00", ENABLE_BITS = H"00000000"); BEGIN pci_mt32_inst.clk = clk; pci_mt32_inst.rstn = rstn; pci_mt32_inst.gntn = gntn; pci_mt32_inst.idsel = idsel; pci_mt32_inst.l_adi [31..0] = l_adi [31..0]; pci_mt32_inst.l_cbeni [3..0] = l_cbeni [3..0]; pci_mt32_inst.lm_req32n = lm_req32n; pci_mt32_inst.lm_lastn = lm_lastn; pci_mt32_inst.lm_rdyn = lm_rdyn; pci_mt32_inst.lt_rdyn = lt_rdyn; pci_mt32_inst.lt_abortn = lt_abortn; pci_mt32_inst.lt_discn = lt_discn; pci_mt32_inst.lirqn = lirqn; intan = pci_mt32_inst.intan; reqn = pci_mt32_inst.reqn; serrn = pci_mt32_inst.serrn; l_adro [31..0] = pci_mt32_inst.l_adro [31..0] ; l_dato [31..0] = pci_mt32_inst.l_dato [31..0] ; l_beno [3..0] = pci_mt32_inst.l_beno [3..0] ; l_cmdo [3..0] = pci_mt32_inst.l_cmdo [3..0] ; lm_adr_ackn = pci_mt32_inst.lm_adr_ackn; lm_ackn = pci_mt32_inst.lm_ackn; lm_dxfrn = pci_mt32_inst.lm_dxfrn; lm_tsr [9..0] = pci_mt32_inst.lm_tsr [9..0] ; lt_framen = pci_mt32_inst.lt_framen; lt_ackn = pci_mt32_inst.lt_ackn; lt_dxfrn = pci_mt32_inst.lt_dxfrn; lt_tsr [11..0] = pci_mt32_inst.lt_tsr [11..0] ; cmd_reg [5..0] = pci_mt32_inst.cmd_reg [5..0] ; stat_reg [5..0] = pci_mt32_inst.stat_reg [5..0] ; cache [7..0] = pci_mt32_inst.cache [7..0] ; ad [31..0] = pci_mt32_inst.ad [31..0] ; cben [3..0] = pci_mt32_inst.cben [3..0] ; par = pci_mt32_inst.par; perrn = pci_mt32_inst.perrn; pci_mt32_inst.framen_in = framen; pci_mt32_inst.irdyn_in = irdyn; pci_mt32_inst.devseln_in = devseln; pci_mt32_inst.trdyn_in = trdyn; pci_mt32_inst.stopn_in = stopn; framen = pci_mt32_inst.framen_out; irdyn = pci_mt32_inst.irdyn_out; devseln = pci_mt32_inst.devseln_out; trdyn = pci_mt32_inst.trdyn_out; stopn = pci_mt32_inst.stopn_out; END; -- ========================================================= -- PCI Compiler Wizard Data -- =============================== -- DO NOT EDIT FOLLOWING DATA -- @Altera, IP Toolbench@ -- Warning: If you modify this section, PCI Compiler Wizard may not be able to reproduce your chosen configuration. -- -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- Retrieval info: -- =========================================================